[CodeGen] Rename AtomicRMWExpansionKind to AtomicExpansionKind.
[oota-llvm.git] / lib / Target / AArch64 / AArch64ISelLowering.h
2015-09-11 Ahmed Bougacha[CodeGen] Rename AtomicRMWExpansionKind to AtomicExpans...
2015-08-11 James Molloy[AArch64] Replace the custom AArch64ISD::FMIN/MAX nodes...
2015-07-29 Akira Hatanaka[AArch64] Define subtarget feature strict-align.
2015-07-28 Sanjay Patelfix TLI's combineRepeatedFPDivisors interface to return...
2015-07-28 Adhemerval ZanellaImplement __builtin_thread_pointer
2015-07-16 Matthias BraunAArch64: Implement conditional compare sequence matching.
2015-07-09 Pat GavlinAllow {e,r}bp as the target of {read,write}_register.
2015-07-09 Mehdi AminiRe-instate the EVT parameter to getScalarShiftAmountTy...
2015-07-09 Mehdi AminiMake isLegalAddressingMode() taking DataLayout as an...
2015-07-09 Mehdi AminiMake TargetLowering::getShiftAmountTy() taking DataLayo...
2015-07-09 Mehdi AminiMake TargetLowering::getPointerTy() taking DataLayout...
2015-07-05 Benjamin Kramer[TargetLowering] StringRefize asm constraint getters.
2015-06-26 Hao Liu[AArch64] Lower interleaved memory accesses to ldN...
2015-06-17 Matthias BraunRevert "AArch64: Use CMP;CCMP sequences for and/or...
2015-06-01 Matthias BraunAArch64: Use CMP;CCMP sequences for and/or/setcc trees.
2015-06-01 Matt ArsenaultAdd address space argument to isLegalAddressingMode
2015-05-07 Matthias BraunChange getTargetNodeName() to produce compiler warnings...
2015-04-07 Matthias BraunAArch64: Don't lower ISD::SELECT to ISD::SELECT_CC
2015-03-31 Quentin Colombet[AArch64] Enable the codegenprepare optimization that...
2015-03-23 Daniel Sanders[aarch64] Distinguish the 'Q' and 'm' inline assembly...
2015-03-16 Daniel SandersMake each target map all inline assembly memory constra...
2015-03-10 Ahmed Bougacha[AArch64] Avoid going through GPRs for across-vector...
2015-03-04 JF BastienMutate TargetLowering::shouldExpandAtomicRMWInIR to...
2015-03-04 Kristof BeylsFix PR22408 - LLVM producing AArch64 TLS relocations...
2015-02-26 Eric ChristophergetRegForInlineAsmConstraint wants to use TargetRegiste...
2015-02-23 Eric ChristopherRewrite the global merge pass to be subprogram agnostic...
2015-02-23 Chad RosierPrevent hoisting fmul from THEN/ELSE to IF if there...
2015-01-29 Eric ChristopherRemove getSubtargetImpl from AArch64ISelLowering and...
2015-01-28 Sanjay Patelfix typos; NFC
2014-11-28 Craig TopperAdd missing 'override' keyword.
2014-11-27 Tim NorthoverAArch64: treat [N x Ty] as a block during procedure...
2014-11-21 Hao LiuDAGCombiner: Allow the DAGCombiner to combine multiple...
2014-10-08 Chad Rosier[AArch64] Generate vector signed/unsigned mul and mla...
2014-10-03 Eric Christopherconstify TargetMachine parameter.
2014-09-17 Robin Morisset[X86] Use the generic AtomicExpandPass instead of X86At...
2014-09-04 Tim NorthoverAArch64: fix big-endian immediate materialisation
2014-09-03 Robin MorissetRefactor AtomicExpandPass and add a generic isAtomic...
2014-09-03 Benjamin KramerAdd override to overriden virtual methods, remove virtu...
2014-08-29 Robin MorissetFix typos in comments, NFC
2014-08-13 Benjamin KramerCanonicalize header guards into a common format.
2014-07-27 Matt ArsenaultAdd alignment value to allowsUnalignedMemoryAccess
2014-07-25 Akira Hatanaka[stack protector] Fix a potential security bug in stack...
2014-07-23 Chad Rosier[AArch64] Lower sdiv x, pow2 using add + select + shift.
2014-07-03 Chandler Carruth[codegen,aarch64] Add a target hook to the code generat...
2014-06-10 Eric ChristopherMove AArch64TargetLowering to AArch64Subtarget.
2014-05-24 Tim NorthoverAArch64/ARM64: move ARM64 into AArch64's place
2014-05-24 Tim NorthoverAArch64/ARM64: remove AArch64 from tree prior to renami...
2014-05-16 Rafael EspindolaRevert "Implement global merge optimization for global...
2014-05-15 Jiangning LiuImplement global merge optimization for global variables.
2014-05-11 Hal FinkelPass the value type to TLI::getRegisterByName
2014-05-11 Hal FinkelAdd 'override' to getRegisterByName in *ISelLowering.h
2014-05-06 Renato GolinImplememting named register intrinsics
2014-04-29 Craig Topper[C++11] Add 'override' keywords and remove 'virtual...
2014-04-22 Jiangning Liu[AArch64] Enable global merge pass.
2014-04-18 Jiangning LiuThis commit enables unaligned memory accesses of vector...
2014-04-12 Chad Rosier[AArch64] Implement the isLegalAddressingMode and getSc...
2014-04-09 Chad Rosier[AArch64] Implement the isZExtFree APIs.
2014-04-09 Chad Rosier[AArch64] Implement the isTruncateFree API.
2014-03-27 Logan Chien[AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS
2014-03-02 Craig TopperSwitch all uses of LLVM_OVERRIDE to just use 'override...
2014-01-27 Kevin Qin[AArch64 NEON] Try to generate CONCAT_VECTOR when lower...
2014-01-27 Kevin QinRevert r199791.
2014-01-23 Kevin Qinfix some spell mistakes around 'ConcatVector' and ...
2014-01-22 Kevin Qin[AArch64 NEON] Try to generate CONCAT_VECTOR when lower...
2014-01-07 Chandler CarruthRe-sort all of the includes with ./utils/sort_includes...
2014-01-01 Rafael EspindolaRemove the 's' DataLayout specification
2013-12-18 Kevin Qin[AArch64 NEON]Implment loading vector constant form...
2013-12-11 Kevin Qin[AArch64 NEON] Get instruction BSL matched to VSELECT.
2013-12-05 Jiangning LiuFor AArch64, add missing register cost calculation...
2013-11-26 Kevin QinRefactored the implementation of AArch64 NEON instructi...
2013-11-19 Hao LiuImplement AArch64 neon instructions class SIMD lsone...
2013-11-18 Hao LiuImplement the newly added ACLE functions for ld1/st1...
2013-11-14 Kevin QinImplement aarch64 neon instruction class SIMD misc.
2013-11-06 Jiangning LiuImplement AArch64 Neon instruction set Bitwise Extract.
2013-11-05 Hao LiuImplement AArch64 post-index vector load/store multiple...
2013-10-29 Weiming Zhao[AArch64] Implement FrameAddr and ReturnAddr
2013-10-11 Kevin QinImplement aarch64 neon instruction set AdvSIMD (copy).
2013-10-10 Hao LiuImplement AArch64 vector load/store multiple N-element...
2013-10-10 Rafael EspindolaRevert "Implement AArch64 vector load/store multiple...
2013-10-10 Hao LiuImplement AArch64 vector load/store multiple N-element...
2013-10-04 Jiangning LiuImplement aarch64 neon instruction set AdvSIMD (3V...
2013-09-04 Hao LiuInplement aarch64 neon instructions in AdvSIMD(shift...
2013-08-15 Hao LiuClang and AArch64 backend patches to support shll/shl...
2013-08-01 Tim NorthoverAArch64: add initial NEON support
2013-07-09 Stephen LinAArch64/PowerPC/SystemZ/X86: This patch fixes the inter...
2013-06-22 Chad RosierThe getRegForInlineAsmConstraint function should only...
2013-06-07 Bill WendlingDon't cache the instruction info and register info...
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 2/4.
2013-05-18 Matt ArsenaultAdd LLVMContext argument to getSetCCResultType
2013-05-04 Tim NorthoverAArch64: implement large code model access to global...
2013-02-05 Tim NorthoverFix formatting in AArch64 backend.
2013-02-05 Tim NorthoverRemove cyclic dependency in AArch64 libraries
2013-01-31 Tim NorthoverAdd AArch64 as an experimental target.