From: Chris Lattner Date: Mon, 27 Mar 2006 03:28:57 +0000 (+0000) Subject: Fix the JIT encoding of VSPLTI* X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=eeaf72af39afce402236f71702d878ce65491b6a Fix the JIT encoding of VSPLTI* git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27159 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td index 8acce42d4c4..360f7db3e56 100644 --- a/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/lib/Target/PowerPC/PPCInstrAltivec.td @@ -290,15 +290,15 @@ def VSPLTW : VXForm_1<652, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB), [(set VRRC:$vD, (vector_shuffle (v4f32 VRRC:$vB), (undef), VSPLT_shuffle_mask:$UIMM))]>; -def VSPLTISB : VXForm_1<780, (ops VRRC:$vD, s5imm:$SIMM), - "vspltisb $vD, $SIMM", VecPerm, - [(set VRRC:$vD, (v4f32 vecspltisb:$SIMM))]>; -def VSPLTISH : VXForm_1<844, (ops VRRC:$vD, s5imm:$SIMM), - "vspltish $vD, $SIMM", VecPerm, - [(set VRRC:$vD, (v4f32 vecspltish:$SIMM))]>; -def VSPLTISW : VXForm_1<908, (ops VRRC:$vD, s5imm:$SIMM), - "vspltisw $vD, $SIMM", VecPerm, - [(set VRRC:$vD, (v4f32 vecspltisw:$SIMM))]>; +def VSPLTISB : VXForm_3<780, (ops VRRC:$vD, s5imm:$SIMM), + "vspltisb $vD, $SIMM", VecPerm, + [(set VRRC:$vD, (v4f32 vecspltisb:$SIMM))]>; +def VSPLTISH : VXForm_3<844, (ops VRRC:$vD, s5imm:$SIMM), + "vspltish $vD, $SIMM", VecPerm, + [(set VRRC:$vD, (v4f32 vecspltish:$SIMM))]>; +def VSPLTISW : VXForm_3<908, (ops VRRC:$vD, s5imm:$SIMM), + "vspltisw $vD, $SIMM", VecPerm, + [(set VRRC:$vD, (v4f32 vecspltisw:$SIMM))]>; // Altivec Comparisons. diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 7319463a73f..9f87b278e67 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -663,6 +663,21 @@ class VXForm_2 xo, dag OL, string asmstr, let Inst{21-31} = xo; } +class VXForm_3 xo, dag OL, string asmstr, + InstrItinClass itin, list pattern> + : I<4, OL, asmstr, itin> { + bits<5> VD; + bits<5> IMM; + + let Pattern = pattern; + + let Inst{6-10} = VD; + let Inst{11-15} = IMM; + let Inst{16-20} = 0; + let Inst{21-31} = xo; +} + + // E-4 VXR-Form class VXRForm_1 xo, dag OL, string asmstr, InstrItinClass itin, list pattern>