From: Simon Atanasyan <simon@atanasyan.com>
Date: Tue, 26 May 2015 08:48:14 +0000 (+0000)
Subject: [mips] Move some structures represent MIPS specific ELF sections from LLD to LLVM
X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=eda9f8aa7499b2f448d5d6d947b75a4fc240384b

[mips] Move some structures represent MIPS specific ELF sections from LLD to LLVM

That allows to reuse the code in other tools like llvm-readobj etc.

No functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238188 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/Object/ELFTypes.h b/include/llvm/Object/ELFTypes.h
index 1952b9480d0..287d3670678 100644
--- a/include/llvm/Object/ELFTypes.h
+++ b/include/llvm/Object/ELFTypes.h
@@ -489,6 +489,43 @@ struct Elf_Phdr_Impl<ELFType<TargetEndianness, MaxAlign, true> > {
   Elf_Xword p_align;  // Segment alignment constraint
 };
 
+// MIPS .reginfo section
+template <class ELFT>
+struct Elf_Mips_RegInfo;
+
+template <llvm::support::endianness TargetEndianness, std::size_t MaxAlign>
+struct Elf_Mips_RegInfo<ELFType<TargetEndianness, MaxAlign, false>> {
+  LLVM_ELF_IMPORT_TYPES(TargetEndianness, MaxAlign, false)
+  Elf_Word ri_gprmask;     // bit-mask of used general registers
+  Elf_Word ri_cprmask[4];  // bit-mask of used co-processor registers
+  Elf_Addr ri_gp_value;    // gp register value
+};
+
+template <llvm::support::endianness TargetEndianness, std::size_t MaxAlign>
+struct Elf_Mips_RegInfo<ELFType<TargetEndianness, MaxAlign, true>> {
+  LLVM_ELF_IMPORT_TYPES(TargetEndianness, MaxAlign, true)
+  Elf_Word ri_gprmask;     // bit-mask of used general registers
+  Elf_Word ri_pad;         // unused padding field
+  Elf_Word ri_cprmask[4];  // bit-mask of used co-processor registers
+  Elf_Addr ri_gp_value;    // gp register value
+};
+
+// .MIPS.options section
+template <class ELFT> struct Elf_Mips_Options {
+  LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
+  uint8_t kind;     // Determines interpretation of variable part of descriptor
+  uint8_t size;     // Byte size of descriptor, including this header
+  Elf_Half section; // Section header index of section affected,
+                    // or 0 for global options
+  Elf_Word info;    // Kind-specific information
+
+  const Elf_Mips_RegInfo<ELFT> &getRegInfo() const {
+    assert(kind == llvm::ELF::ODK_REGINFO);
+    return *reinterpret_cast<const Elf_Mips_RegInfo<ELFT> *>(
+               (const uint8_t *)this + sizeof(Elf_Mips_Options));
+  }
+};
+
 // .MIPS.abiflags section content
 template <class ELFT> struct Elf_Mips_ABIFlags {
   LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)