From: Craig Topper Date: Sat, 8 Aug 2015 07:20:04 +0000 (+0000) Subject: Add SlowBTMem to Sandy Bridge and newer Intel CPUs. Reading through Agner Fog's table... X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=bef8d8f82eedc2b5e54ea771e5ef03f136392f0c Add SlowBTMem to Sandy Bridge and newer Intel CPUs. Reading through Agner Fog's table suggests there have been no improvements to these processors relative to Westmere for bit test instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244395 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index 2965cefe3d3..9a09f3e38cf 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -307,6 +307,7 @@ def : WestmereProc<"westmere">; class SandyBridgeProc : ProcessorModel; // Legacy alias. class IvyBridgeProc : ProcessorModel; // Legacy alias. class HaswellProc : ProcessorModel; // Legacy alias. class BroadwellProc : ProcessorModel; class SkylakeProc : ProcessorModel; + FeatureCMPXCHG16B, FeatureSlowBTMem, FeatureFastUAMem, + FeaturePOPCNT, FeatureAES, FeaturePCLMUL, FeatureRDRAND, + FeatureF16C, FeatureFSGSBase, FeatureMOVBE, FeatureLZCNT, + FeatureBMI, FeatureBMI2, FeatureFMA, FeatureRTM, + FeatureHLE, FeatureSlowIncDec, FeatureMPX]>; def : SkylakeProc<"skylake">; def : SkylakeProc<"skx">; // Legacy alias.