From: Daniel Sanders <daniel.sanders@imgtec.com>
Date: Thu, 17 Jul 2014 10:10:04 +0000 (+0000)
Subject: [mips] .reginfo is 8 byte aligned on N32.
X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=8f69856b52802c645d75373a0548884495afd667

[mips] .reginfo is 8 byte aligned on N32.

Differential Revision: http://reviews.llvm.org/D4540


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213246 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index e017a27d6b9..4e7216921b9 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -366,7 +366,8 @@ void MipsTargetELFStreamer::finish() {
     const MCSectionELF *Sec =
         Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO, ELF::SHF_ALLOC,
                               SectionKind::getMetadata(), 24, "");
-    MCA.getOrCreateSectionData(*Sec).setAlignment(4);
+    MCA.getOrCreateSectionData(*Sec)
+        .setAlignment(Features & Mips::FeatureN32 ? 8 : 4);
     OS.SwitchSection(Sec);
 
     OS.EmitIntValue(0, 4); // ri_gprmask
diff --git a/test/MC/Mips/elf_reginfo.s b/test/MC/Mips/elf_reginfo.s
index b88607a02d3..ba4788a39d9 100644
--- a/test/MC/Mips/elf_reginfo.s
+++ b/test/MC/Mips/elf_reginfo.s
@@ -27,6 +27,6 @@
 # CHECK_32-LABEL:    Name: .reginfo
 # CHECK_32-NEXT:     Type:  SHT_MIPS_REGINFO
 # CHECK_32-NEXT:     Flags [ (0x2)
-# CHECK_32:          AddressAlignment: 4
+# CHECK_32:          AddressAlignment: 8
 # CHECK_32:          EntrySize: 24
 # CHECK_32-LABEL:  }