From: Eric Christopher Date: Fri, 18 Jul 2014 22:34:20 +0000 (+0000) Subject: Avoid caching the relocation model on the subtarget, this is for X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=775dd6e2d6947f2919e094a9b0ee1164d0507800 Avoid caching the relocation model on the subtarget, this is for two reasons: a) we're already caching the target machine which contains it, b) which relocation model you get is dependent upon whether or not you ask before MCCodeGenInfo is constructed on the target machine, so avoid any latent issues there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213420 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 2cb97ae7f72..a03b5ca19e6 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -104,7 +104,7 @@ static std::string computeDataLayout(const MipsSubtarget &ST) { MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little, - Reloc::Model _RM, MipsTargetMachine *_TM) + MipsTargetMachine *_TM) : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false), IsFPXX(false), IsFP64bit(false), UseOddSPReg(true), IsNaN2008bit(false), @@ -113,8 +113,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false), InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false), HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), - HasMSA(false), RM(_RM), OverrideMode(NoOverride), TM(_TM), - TargetTriple(TT), + HasMSA(false), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT), DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS, TM))), TSInfo(DL), JITInfo(), InstrInfo(MipsInstrInfo::create(*TM)), FrameLowering(MipsFrameLowering::create(*TM, *this)), @@ -174,7 +173,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, // Set UseSmallSection. // TODO: Investigate the IsLinux check. I suspect it's really checking for // bare-metal. - UseSmallSection = !IsLinux && (RM == Reloc::Static); + UseSmallSection = !IsLinux && (TM->getRelocationModel() == Reloc::Static); } /// This overrides the PostRAScheduler bit in the SchedModel for any CPU. @@ -294,3 +293,7 @@ bool MipsSubtarget::useConstantIslands() { DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n"); return Mips16ConstantIslands; } + +Reloc::Model MipsSubtarget::getRelocationModel() const { + return TM->getRelocationModel(); +} diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index 7810e0ee7fa..a7c1b126ffe 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -135,9 +135,6 @@ protected: InstrItineraryData InstrItins; - // Relocation Model - Reloc::Model RM; - // We can override the determination of whether we are in mips16 mode // as from the command line enum {NoOverride, Mips16Override, NoMips16Override} OverrideMode; @@ -176,8 +173,7 @@ public: /// This constructor initializes the data members to match that /// of the specified triple. MipsSubtarget(const std::string &TT, const std::string &CPU, - const std::string &FS, bool little, Reloc::Model RM, - MipsTargetMachine *TM); + const std::string &FS, bool little, MipsTargetMachine *TM); /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. @@ -276,7 +272,7 @@ public: unsigned stackAlignment() const { return hasMips64() ? 16 : 8; } // Grab relocation model - Reloc::Model getRelocationModel() const {return RM;} + Reloc::Model getRelocationModel() const; /// \brief Reset the subtarget for the Mips target. void resetSubtarget(MachineFunction *MF); diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index ed0152fdbe5..3f2a05502b5 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -56,7 +56,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), - Subtarget(TT, CPU, FS, isLittle, RM, this) { + Subtarget(TT, CPU, FS, isLittle, this) { initAsmInfo(); }