From: Simon Pilgrim Date: Wed, 18 Nov 2015 21:17:19 +0000 (+0000) Subject: [DAGCombiner] Vector constant folding for comparisons X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=5c882ac1dc4af8526e45b71b05834e3105ed6c05 [DAGCombiner] Vector constant folding for comparisons This patch adds support for vector constant folding of integer/float comparisons. This requires FoldConstantVectorArithmetic to support scalar constant operands (in this case ISD::CONDCASE). In future we should be able to support other scalar constant types as necessary (and possibly start calling FoldConstantVectorArithmetic for all node creations) Differential Revision: http://reviews.llvm.org/D14683 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253504 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 90ab785b2a4..520edb64e2a 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -3318,21 +3318,22 @@ SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode, SDLoc DL, unsigned NumElts = VT.getVectorNumElements(); - auto IsSameVectorSize = [&](const SDValue &Op) { - return Op.getValueType().isVector() && + auto IsScalarOrSameVectorSize = [&](const SDValue &Op) { + return !Op.getValueType().isVector() || Op.getValueType().getVectorNumElements() == NumElts; }; auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) { BuildVectorSDNode *BV = dyn_cast(Op); - return (Op.getOpcode() == ISD::UNDEF) || (BV && BV->isConstant()); + return (Op.getOpcode() == ISD::UNDEF) || + (Op.getOpcode() == ISD::CONDCODE) || (BV && BV->isConstant()); }; // All operands must be vector types with the same number of elements as // the result type and must be either UNDEF or a build vector of constant // or UNDEF scalars. if (!std::all_of(Ops.begin(), Ops.end(), IsConstantBuildVectorOrUndef) || - !std::all_of(Ops.begin(), Ops.end(), IsSameVectorSize)) + !std::all_of(Ops.begin(), Ops.end(), IsScalarOrSameVectorSize)) return SDValue(); // Find legal integer scalar type for constant promotion and @@ -3353,8 +3354,11 @@ SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode, SDLoc DL, EVT InSVT = Op.getValueType().getScalarType(); BuildVectorSDNode *InBV = dyn_cast(Op); if (!InBV) { - // We've checked that this is UNDEF above. - ScalarOps.push_back(getUNDEF(InSVT)); + // We've checked that this is UNDEF or a constant of some kind. + if (Op.isUndef()) + ScalarOps.push_back(getUNDEF(InSVT)); + else + ScalarOps.push_back(Op); continue; } @@ -3919,6 +3923,10 @@ SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, // Use FoldSetCC to simplify SETCC's. if (SDValue V = FoldSetCC(VT, N1, N2, cast(N3)->get(), DL)) return V; + // Vector constant folding. + SDValue Ops[] = {N1, N2, N3}; + if (SDValue V = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops)) + return V; break; } case ISD::SELECT: diff --git a/test/CodeGen/X86/2011-10-21-widen-cmp.ll b/test/CodeGen/X86/2011-10-21-widen-cmp.ll index 115d828d4cf..d57ff67befe 100644 --- a/test/CodeGen/X86/2011-10-21-widen-cmp.ll +++ b/test/CodeGen/X86/2011-10-21-widen-cmp.ll @@ -41,24 +41,7 @@ entry: define void @mp_11193(<8 x float> * nocapture %aFOO, <8 x float>* nocapture %RET) nounwind { ; CHECK-LABEL: mp_11193: ; CHECK: # BB#0: # %allocas -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [3.000000e+00,3.000000e+00,3.000000e+00,3.000000e+00] -; CHECK-NEXT: movaps {{.*#+}} xmm1 = [9.000000e+00,1.000000e+00,9.000000e+00,1.000000e+00] -; CHECK-NEXT: cmpltps %xmm0, %xmm1 -; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] -; CHECK-NEXT: pshufb %xmm2, %xmm1 -; CHECK-NEXT: movaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] -; CHECK-NEXT: cmpltps %xmm0, %xmm3 -; CHECK-NEXT: pshufb %xmm2, %xmm3 -; CHECK-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm1[0] -; CHECK-NEXT: psllw $15, %xmm3 -; CHECK-NEXT: psraw $15, %xmm3 -; CHECK-NEXT: pextrb $0, %xmm3, %eax -; CHECK-NEXT: shlb $7, %al -; CHECK-NEXT: sarb $7, %al -; CHECK-NEXT: movsbl %al, %eax -; CHECK-NEXT: xorps %xmm0, %xmm0 -; CHECK-NEXT: cvtsi2ssl %eax, %xmm0 -; CHECK-NEXT: movss %xmm0, (%rsi) +; CHECK-NEXT: movl $-1082130432, (%rsi) # imm = 0xFFFFFFFFBF800000 ; CHECK-NEXT: retq allocas: %bincmp = fcmp olt <8 x float> , diff --git a/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll b/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll index dd8c3efa83b..af2d4ef30bd 100644 --- a/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll +++ b/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll @@ -4,37 +4,12 @@ ; 0x1 means that we only look at the first bit. define void @ui_to_fp_conv(<8 x float> * nocapture %aFOO, <8 x float>* nocapture %RET) nounwind { -; CHECK: 0x1 ; CHECK-LABEL: ui_to_fp_conv: ; CHECK: # BB#0: # %allocas -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,1.000000e+00,3.000000e+00,3.000000e+00] -; CHECK-NEXT: cmpltps {{.*}}(%rip), %xmm0 -; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] -; CHECK-NEXT: pxor %xmm1, %xmm1 -; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; CHECK-NEXT: psllw $15, %xmm0 -; CHECK-NEXT: psraw $15, %xmm0 -; CHECK-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero -; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1] -; CHECK-NEXT: pand %xmm2, %xmm1 -; CHECK-NEXT: movdqa {{.*#+}} xmm3 = [1258291200,1258291200,1258291200,1258291200] -; CHECK-NEXT: movdqa %xmm1, %xmm4 -; CHECK-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0],xmm3[1],xmm4[2],xmm3[3],xmm4[4],xmm3[5],xmm4[6],xmm3[7] -; CHECK-NEXT: psrld $16, %xmm1 -; CHECK-NEXT: movdqa {{.*#+}} xmm5 = [1392508928,1392508928,1392508928,1392508928] -; CHECK-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm5[1],xmm1[2],xmm5[3],xmm1[4],xmm5[5],xmm1[6],xmm5[7] -; CHECK-NEXT: movaps {{.*#+}} xmm6 = [-5.497642e+11,-5.497642e+11,-5.497642e+11,-5.497642e+11] -; CHECK-NEXT: addps %xmm6, %xmm1 -; CHECK-NEXT: addps %xmm4, %xmm1 -; CHECK-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7] -; CHECK-NEXT: pand %xmm2, %xmm0 -; CHECK-NEXT: pblendw {{.*#+}} xmm3 = xmm0[0],xmm3[1],xmm0[2],xmm3[3],xmm0[4],xmm3[5],xmm0[6],xmm3[7] -; CHECK-NEXT: psrld $16, %xmm0 -; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm5[1],xmm0[2],xmm5[3],xmm0[4],xmm5[5],xmm0[6],xmm5[7] -; CHECK-NEXT: addps %xmm6, %xmm0 -; CHECK-NEXT: addps %xmm3, %xmm0 -; CHECK-NEXT: movups %xmm0, 16(%rsi) -; CHECK-NEXT: movups %xmm1, (%rsi) +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,1.000000e+00,0.000000e+00,0.000000e+00] +; CHECK-NEXT: xorps %xmm1, %xmm1 +; CHECK-NEXT: movups %xmm1, 16(%rsi) +; CHECK-NEXT: movups %xmm0, (%rsi) ; CHECK-NEXT: retq allocas: %bincmp = fcmp olt <8 x float> , diff --git a/test/CodeGen/X86/vec_minmax_sint.ll b/test/CodeGen/X86/vec_minmax_sint.ll index 80ceb80663a..c38d5a0c173 100644 --- a/test/CodeGen/X86/vec_minmax_sint.ll +++ b/test/CodeGen/X86/vec_minmax_sint.ll @@ -1601,64 +1601,14 @@ define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) { ; define <2 x i64> @max_gt_v2i64c() { -; SSE2-LABEL: max_gt_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm3 -; SSE2-NEXT: pand %xmm1, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm3 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa %xmm2, %xmm0 -; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 -; SSE42-NEXT: blendvpd %xmm2, %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2 -; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -1668,124 +1618,16 @@ define <2 x i64> @max_gt_v2i64c() { } define <4 x i64> @max_gt_v4i64c() { -; SSE2-LABEL: max_gt_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pxor %xmm3, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pxor %xmm8, %xmm6 -; SSE2-NEXT: movdqa %xmm6, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm1, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm1, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3] -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm2 -; SSE2-NEXT: pxor %xmm4, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm7, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm5, %xmm2 -; SSE2-NEXT: pand %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn %xmm3, %xmm2 -; SSE2-NEXT: pand %xmm8, %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm8, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pxor %xmm2, %xmm4 -; SSE41-NEXT: pxor %xmm5, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pcmpgtd %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm4, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm7, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE41-NEXT: por %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm5, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movdqa %xmm5, %xmm3 -; SSE42-NEXT: pcmpgtq %xmm1, %xmm3 -; SSE42-NEXT: movdqa %xmm4, %xmm0 -; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 -; SSE42-NEXT: blendvpd %xmm4, %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd %xmm5, %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: max_gt_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551609,18446744073709551615] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [1,7] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: max_gt_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2 -; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: max_gt_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] +; SSE-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE-NEXT: retq ; -; AVX512-LABEL: max_gt_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2 -; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: max_gt_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp sgt <4 x i64> %1, %2 @@ -1794,26 +1636,10 @@ define <4 x i64> @max_gt_v4i64c() { } define <4 x i32> @max_gt_v4i32c() { -; SSE2-LABEL: max_gt_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1] -; SSE2-NEXT: movdqa %xmm1, %xmm0 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm1 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v4i32c: ; AVX: # BB#0: @@ -1827,35 +1653,11 @@ define <4 x i32> @max_gt_v4i32c() { } define <8 x i32> @max_gt_v8i32c() { -; SSE2-LABEL: max_gt_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1] -; SSE2-NEXT: movdqa %xmm3, %xmm1 -; SSE2-NEXT: pcmpgtd %xmm5, %xmm1 -; SSE2-NEXT: movdqa %xmm2, %xmm0 -; SSE2-NEXT: pcmpgtd %xmm4, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm1 -; SSE2-NEXT: por %xmm3, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v8i32c: ; AVX: # BB#0: @@ -1904,26 +1706,10 @@ define <16 x i16> @max_gt_v16i16c() { } define <16 x i8> @max_gt_v16i8c() { -; SSE2-LABEL: max_gt_v16i8c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0] -; SSE2-NEXT: movdqa %xmm1, %xmm0 -; SSE2-NEXT: pcmpgtb %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm1 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v16i8c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v16i8c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v16i8c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v16i8c: ; AVX: # BB#0: @@ -1937,71 +1723,14 @@ define <16 x i8> @max_gt_v16i8c() { } define <2 x i64> @max_ge_v2i64c() { -; SSE2-LABEL: max_ge_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm0, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE41-NEXT: pxor %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa %xmm1, %xmm3 -; SSE42-NEXT: pcmpgtq %xmm2, %xmm3 -; SSE42-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE42-NEXT: pxor %xmm3, %xmm0 -; SSE42-NEXT: blendvpd %xmm2, %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2 -; AVX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 -; AVX-NEXT: vpxor %xmm3, %xmm2, %xmm2 -; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -2011,139 +1740,16 @@ define <2 x i64> @max_ge_v2i64c() { } define <4 x i64> @max_ge_v4i64c() { -; SSE2-LABEL: max_ge_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm7, %xmm0 -; SSE2-NEXT: pxor %xmm8, %xmm0 -; SSE2-NEXT: movdqa %xmm7, %xmm1 -; SSE2-NEXT: pxor %xmm9, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm0, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm0, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm6 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: movdqa %xmm6, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: movdqa %xmm7, %xmm2 -; SSE2-NEXT: pxor %xmm10, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm7 -; SSE2-NEXT: movdqa %xmm7, %xmm3 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3] -; SSE2-NEXT: pand %xmm4, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm10, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm8, %xmm6 -; SSE2-NEXT: pandn %xmm9, %xmm1 -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm8, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm1, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm4, %xmm4 -; SSE41-NEXT: pxor %xmm4, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm9, %xmm6 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm6, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm6, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm0 -; SSE41-NEXT: pxor %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm9, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movdqa %xmm1, %xmm3 -; SSE42-NEXT: pcmpgtq %xmm5, %xmm3 -; SSE42-NEXT: pcmpeqd %xmm6, %xmm6 -; SSE42-NEXT: pxor %xmm6, %xmm3 -; SSE42-NEXT: movdqa %xmm2, %xmm0 -; SSE42-NEXT: pcmpgtq %xmm4, %xmm0 -; SSE42-NEXT: pxor %xmm6, %xmm0 -; SSE42-NEXT: blendvpd %xmm4, %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd %xmm5, %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: max_ge_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [7,1] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [18446744073709551615,18446744073709551609] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3 -; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: max_ge_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2 -; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 -; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2 -; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: max_ge_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] +; SSE-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE-NEXT: retq ; -; AVX512-LABEL: max_ge_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2 -; AVX512-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 -; AVX512-NEXT: vpxor %ymm3, %ymm2, %ymm2 -; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: max_ge_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp sge <4 x i64> %1, %2 @@ -2152,28 +1758,10 @@ define <4 x i64> @max_ge_v4i64c() { } define <4 x i32> @max_ge_v4i32c() { -; SSE2-LABEL: max_ge_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1] -; SSE2-NEXT: movdqa %xmm2, %xmm3 -; SSE2-NEXT: pcmpgtd %xmm1, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v4i32c: ; AVX: # BB#0: @@ -2187,39 +1775,11 @@ define <4 x i32> @max_ge_v4i32c() { } define <8 x i32> @max_ge_v8i32c() { -; SSE2-LABEL: max_ge_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1] -; SSE2-NEXT: movdqa %xmm5, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm6 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: movdqa %xmm6, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: movdqa %xmm4, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm7 -; SSE2-NEXT: pxor %xmm7, %xmm0 -; SSE2-NEXT: pandn %xmm2, %xmm7 -; SSE2-NEXT: pandn %xmm4, %xmm0 -; SSE2-NEXT: por %xmm7, %xmm0 -; SSE2-NEXT: pandn %xmm3, %xmm6 -; SSE2-NEXT: pandn %xmm5, %xmm1 -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v8i32c: ; AVX: # BB#0: @@ -2261,106 +1821,38 @@ define <16 x i16> @max_ge_v16i16c() { ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8] ; AVX-NEXT: retq %1 = insertelement <16 x i16> , i16 -7, i32 0 - %2 = insertelement <16 x i16> , i16 -1, i32 0 - %3 = icmp sge <16 x i16> %1, %2 - %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2 - ret <16 x i16> %4 -} - -define <16 x i8> @max_ge_v16i8c() { -; SSE2-LABEL: max_ge_v16i8c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0] -; SSE2-NEXT: movdqa %xmm2, %xmm3 -; SSE2-NEXT: pcmpgtb %xmm1, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v16i8c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v16i8c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] -; SSE42-NEXT: retq -; -; AVX-LABEL: max_ge_v16i8c: -; AVX: # BB#0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] -; AVX-NEXT: retq - %1 = insertelement <16 x i8> , i8 -7, i32 0 - %2 = insertelement <16 x i8> , i8 -1, i32 0 - %3 = icmp sge <16 x i8> %1, %2 - %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2 - ret <16 x i8> %4 -} - -define <2 x i64> @min_lt_v2i64c() { -; SSE2-LABEL: min_lt_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm3 -; SSE2-NEXT: pand %xmm1, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm3 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq + %2 = insertelement <16 x i16> , i16 -1, i32 0 + %3 = icmp sge <16 x i16> %1, %2 + %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2 + ret <16 x i16> %4 +} + +define <16 x i8> @max_ge_v16i8c() { +; SSE-LABEL: max_ge_v16i8c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] +; SSE-NEXT: retq ; -; SSE42-LABEL: min_lt_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa %xmm1, %xmm0 -; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 -; SSE42-NEXT: blendvpd %xmm2, %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; AVX-LABEL: max_ge_v16i8c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] +; AVX-NEXT: retq + %1 = insertelement <16 x i8> , i8 -7, i32 0 + %2 = insertelement <16 x i8> , i8 -1, i32 0 + %3 = icmp sge <16 x i8> %1, %2 + %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2 + ret <16 x i8> %4 +} + +define <2 x i64> @min_lt_v2i64c() { +; SSE-LABEL: min_lt_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2 -; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -2370,124 +1862,16 @@ define <2 x i64> @min_lt_v2i64c() { } define <4 x i64> @min_lt_v4i64c() { -; SSE2-LABEL: min_lt_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pxor %xmm8, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pxor %xmm3, %xmm6 -; SSE2-NEXT: movdqa %xmm6, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm1, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm1, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3] -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pxor %xmm4, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm7, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm5, %xmm2 -; SSE2-NEXT: pand %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn %xmm3, %xmm2 -; SSE2-NEXT: pand %xmm8, %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm8, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm1, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pxor %xmm5, %xmm4 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pcmpgtd %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm4, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm7, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE41-NEXT: por %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm5, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movdqa %xmm1, %xmm3 -; SSE42-NEXT: pcmpgtq %xmm5, %xmm3 -; SSE42-NEXT: movdqa %xmm2, %xmm0 -; SSE42-NEXT: pcmpgtq %xmm4, %xmm0 -; SSE42-NEXT: blendvpd %xmm4, %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd %xmm5, %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: min_lt_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,18446744073709551609] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [7,1] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: min_lt_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2 -; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: min_lt_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] +; SSE-NEXT: retq ; -; AVX512-LABEL: min_lt_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2 -; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: min_lt_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp slt <4 x i64> %1, %2 @@ -2496,26 +1880,10 @@ define <4 x i64> @min_lt_v4i64c() { } define <4 x i32> @min_lt_v4i32c() { -; SSE2-LABEL: min_lt_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1] -; SSE2-NEXT: movdqa %xmm2, %xmm0 -; SSE2-NEXT: pcmpgtd %xmm1, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm1 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v4i32c: ; AVX: # BB#0: @@ -2529,35 +1897,11 @@ define <4 x i32> @min_lt_v4i32c() { } define <8 x i32> @min_lt_v8i32c() { -; SSE2-LABEL: min_lt_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1] -; SSE2-NEXT: movdqa %xmm5, %xmm1 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm1 -; SSE2-NEXT: movdqa %xmm4, %xmm0 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm1 -; SSE2-NEXT: por %xmm3, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v8i32c: ; AVX: # BB#0: @@ -2606,26 +1950,10 @@ define <16 x i16> @min_lt_v16i16c() { } define <16 x i8> @min_lt_v16i8c() { -; SSE2-LABEL: min_lt_v16i8c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0] -; SSE2-NEXT: movdqa %xmm2, %xmm0 -; SSE2-NEXT: pcmpgtb %xmm1, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm1 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v16i8c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v16i8c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v16i8c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v16i8c: ; AVX: # BB#0: @@ -2639,71 +1967,14 @@ define <16 x i8> @min_lt_v16i8c() { } define <2 x i64> @min_le_v2i64c() { -; SSE2-LABEL: min_le_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm0, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE41-NEXT: pxor %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa %xmm2, %xmm3 -; SSE42-NEXT: pcmpgtq %xmm1, %xmm3 -; SSE42-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE42-NEXT: pxor %xmm3, %xmm0 -; SSE42-NEXT: blendvpd %xmm2, %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2 -; AVX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 -; AVX-NEXT: vpxor %xmm3, %xmm2, %xmm2 -; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -2713,139 +1984,16 @@ define <2 x i64> @min_le_v2i64c() { } define <4 x i64> @min_le_v4i64c() { -; SSE2-LABEL: min_le_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0] -; SSE2-NEXT: movdqa %xmm7, %xmm0 -; SSE2-NEXT: pxor %xmm9, %xmm0 -; SSE2-NEXT: movdqa %xmm7, %xmm1 -; SSE2-NEXT: pxor %xmm8, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm0, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm0, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm6 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: movdqa %xmm6, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: movdqa %xmm7, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm2 -; SSE2-NEXT: pxor %xmm10, %xmm7 -; SSE2-NEXT: movdqa %xmm7, %xmm3 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3] -; SSE2-NEXT: pand %xmm4, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm10, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm8, %xmm6 -; SSE2-NEXT: pandn %xmm9, %xmm1 -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm8, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm4, %xmm4 -; SSE41-NEXT: pxor %xmm4, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm2, %xmm6 -; SSE41-NEXT: pxor %xmm9, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm6, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm6, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm0 -; SSE41-NEXT: pxor %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm9, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7] -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movdqa %xmm5, %xmm3 -; SSE42-NEXT: pcmpgtq %xmm1, %xmm3 -; SSE42-NEXT: pcmpeqd %xmm6, %xmm6 -; SSE42-NEXT: pxor %xmm6, %xmm3 -; SSE42-NEXT: movdqa %xmm4, %xmm0 -; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 -; SSE42-NEXT: pxor %xmm6, %xmm0 -; SSE42-NEXT: blendvpd %xmm4, %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd %xmm5, %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: min_le_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,7] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [18446744073709551609,18446744073709551615] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3 -; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: min_le_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2 -; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 -; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2 -; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: min_le_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] +; SSE-NEXT: retq ; -; AVX512-LABEL: min_le_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2 -; AVX512-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 -; AVX512-NEXT: vpxor %ymm3, %ymm2, %ymm2 -; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: min_le_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp sle <4 x i64> %1, %2 @@ -2854,28 +2002,10 @@ define <4 x i64> @min_le_v4i64c() { } define <4 x i32> @min_le_v4i32c() { -; SSE2-LABEL: min_le_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1] -; SSE2-NEXT: movdqa %xmm1, %xmm3 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v4i32c: ; AVX: # BB#0: @@ -2889,39 +2019,11 @@ define <4 x i32> @min_le_v4i32c() { } define <8 x i32> @min_le_v8i32c() { -; SSE2-LABEL: min_le_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1] -; SSE2-NEXT: movdqa %xmm3, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm5, %xmm6 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: movdqa %xmm6, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: movdqa %xmm2, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm4, %xmm7 -; SSE2-NEXT: pxor %xmm7, %xmm0 -; SSE2-NEXT: pandn %xmm2, %xmm7 -; SSE2-NEXT: pandn %xmm4, %xmm0 -; SSE2-NEXT: por %xmm7, %xmm0 -; SSE2-NEXT: pandn %xmm3, %xmm6 -; SSE2-NEXT: pandn %xmm5, %xmm1 -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v8i32c: ; AVX: # BB#0: @@ -2970,28 +2072,10 @@ define <16 x i16> @min_le_v16i16c() { } define <16 x i8> @min_le_v16i8c() { -; SSE2-LABEL: min_le_v16i8c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0] -; SSE2-NEXT: movdqa %xmm1, %xmm3 -; SSE2-NEXT: pcmpgtb %xmm2, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v16i8c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v16i8c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v16i8c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v16i8c: ; AVX: # BB#0: diff --git a/test/CodeGen/X86/vec_minmax_uint.ll b/test/CodeGen/X86/vec_minmax_uint.ll index 63afd777abb..b256f0745e1 100644 --- a/test/CodeGen/X86/vec_minmax_uint.ll +++ b/test/CodeGen/X86/vec_minmax_uint.ll @@ -1740,63 +1740,14 @@ define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) { ; define <2 x i64> @max_gt_v2i64c() { -; SSE2-LABEL: max_gt_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm3 -; SSE2-NEXT: pand %xmm1, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm3 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775815] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775815] -; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -1806,122 +1757,16 @@ define <2 x i64> @max_gt_v2i64c() { } define <4 x i64> @max_gt_v4i64c() { -; SSE2-LABEL: max_gt_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pxor %xmm3, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pxor %xmm8, %xmm6 -; SSE2-NEXT: movdqa %xmm6, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm1, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm1, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3] -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm2 -; SSE2-NEXT: pxor %xmm4, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm7, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm5, %xmm2 -; SSE2-NEXT: pand %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn %xmm3, %xmm2 -; SSE2-NEXT: pand %xmm8, %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm8, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pxor %xmm2, %xmm4 -; SSE41-NEXT: pxor %xmm5, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pcmpgtd %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm4, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm7, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE41-NEXT: por %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm5, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775809,9223372036854775815] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3 -; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775807] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: max_gt_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775807] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775809,9223372036854775815] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: max_gt_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815] -; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: max_gt_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] +; SSE-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE-NEXT: retq ; -; AVX512-LABEL: max_gt_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815] -; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: max_gt_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp ugt <4 x i64> %1, %2 @@ -1930,25 +1775,10 @@ define <4 x i64> @max_gt_v4i64c() { } define <4 x i32> @max_gt_v4i32c() { -; SSE2-LABEL: max_gt_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483647,2147483649,2147483655] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v4i32c: ; AVX: # BB#0: @@ -1962,33 +1792,11 @@ define <4 x i32> @max_gt_v4i32c() { } define <8 x i32> @max_gt_v8i32c() { -; SSE2-LABEL: max_gt_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483651,2147483653,2147483655] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1 -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483643,2147483645,2147483647] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v8i32c: ; AVX: # BB#0: @@ -2002,25 +1810,10 @@ define <8 x i32> @max_gt_v8i32c() { } define <8 x i16> @max_gt_v8i16c() { -; SSE2-LABEL: max_gt_v8i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [32761,32763,32765,32767,32769,32771,32773,32775] -; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v8i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v8i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v8i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v8i16c: ; AVX: # BB#0: @@ -2034,33 +1827,11 @@ define <8 x i16> @max_gt_v8i16c() { } define <16 x i16> @max_gt_v16i16c() { -; SSE2-LABEL: max_gt_v16i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [32769,32770,32771,32772,32773,32774,32775,32776] -; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm1 -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [32761,32762,32763,32764,32765,32766,32767,32768] -; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_gt_v16i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_gt_v16i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] -; SSE42-NEXT: retq +; SSE-LABEL: max_gt_v16i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] +; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v16i16c: ; AVX: # BB#0: @@ -2091,70 +1862,14 @@ define <16 x i8> @max_gt_v16i8c() { } define <2 x i64> @max_ge_v2i64c() { -; SSE2-LABEL: max_ge_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm0, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE41-NEXT: pxor %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775807,9223372036854775809] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm2 -; SSE42-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE42-NEXT: pxor %xmm2, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775809] -; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 -; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 -; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -2164,137 +1879,16 @@ define <2 x i64> @max_ge_v2i64c() { } define <4 x i64> @max_ge_v4i64c() { -; SSE2-LABEL: max_ge_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm7, %xmm0 -; SSE2-NEXT: pxor %xmm8, %xmm0 -; SSE2-NEXT: movdqa %xmm7, %xmm1 -; SSE2-NEXT: pxor %xmm9, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm0, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm0, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm6 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: movdqa %xmm6, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: movdqa %xmm7, %xmm2 -; SSE2-NEXT: pxor %xmm10, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm7 -; SSE2-NEXT: movdqa %xmm7, %xmm3 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3] -; SSE2-NEXT: pand %xmm4, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm10, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm8, %xmm6 -; SSE2-NEXT: pandn %xmm9, %xmm1 -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm8, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm1, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm4, %xmm4 -; SSE41-NEXT: pxor %xmm4, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm9, %xmm6 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm6, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm6, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm0 -; SSE41-NEXT: pxor %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm9, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775815,9223372036854775809] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3 -; SSE42-NEXT: pcmpeqd %xmm4, %xmm4 -; SSE42-NEXT: pxor %xmm4, %xmm3 -; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775801] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 -; SSE42-NEXT: pxor %xmm4, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: max_ge_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775815,9223372036854775809] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775807,9223372036854775801] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3 -; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: max_ge_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809] -; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 -; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm1 -; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: max_ge_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] +; SSE-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE-NEXT: retq ; -; AVX512-LABEL: max_ge_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809] -; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 -; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm1 -; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: max_ge_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp uge <4 x i64> %1, %2 @@ -2303,26 +1897,10 @@ define <4 x i64> @max_ge_v4i64c() { } define <4 x i32> @max_ge_v4i32c() { -; SSE2-LABEL: max_ge_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483641,2147483655,2147483649] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v4i32c: ; AVX: # BB#0: @@ -2336,35 +1914,11 @@ define <4 x i32> @max_ge_v4i32c() { } define <8 x i32> @max_ge_v8i32c() { -; SSE2-LABEL: max_ge_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483655,2147483653,2147483651,2147483649] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 -; SSE2-NEXT: movdqa %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483645,2147483643,2147483641] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: pxor %xmm0, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm3 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1 -; SSE2-NEXT: por %xmm3, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v8i32c: ; AVX: # BB#0: @@ -2378,28 +1932,10 @@ define <8 x i32> @max_ge_v8i32c() { } define <8 x i16> @max_ge_v8i16c() { -; SSE2-LABEL: max_ge_v8i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65535,65533,65531,65529,7,5,3,1] -; SSE2-NEXT: movdqa %xmm2, %xmm3 -; SSE2-NEXT: psubusw %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm0, %xmm0 -; SSE2-NEXT: pcmpeqw %xmm3, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm1 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v8i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v8i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v8i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v8i16c: ; AVX: # BB#0: @@ -2413,38 +1949,11 @@ define <8 x i16> @max_ge_v8i16c() { } define <16 x i16> @max_ge_v16i16c() { -; SSE2-LABEL: max_ge_v16i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65529,65530,65531,65532,65533,65534,65535,0] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,2,3,4,5,6,7,8] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [65535,65534,65533,65532,65531,65530,65529,0] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,6,5,4,3,2,1,0] -; SSE2-NEXT: movdqa %xmm5, %xmm1 -; SSE2-NEXT: psubusw %xmm3, %xmm1 -; SSE2-NEXT: pxor %xmm6, %xmm6 -; SSE2-NEXT: pcmpeqw %xmm6, %xmm1 -; SSE2-NEXT: movdqa %xmm4, %xmm0 -; SSE2-NEXT: psubusw %xmm2, %xmm0 -; SSE2-NEXT: pcmpeqw %xmm6, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm1 -; SSE2-NEXT: por %xmm3, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: max_ge_v16i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] -; SSE41-NEXT: retq -; -; SSE42-LABEL: max_ge_v16i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] -; SSE42-NEXT: retq +; SSE-LABEL: max_ge_v16i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] +; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v16i16c: ; AVX: # BB#0: @@ -2475,63 +1984,14 @@ define <16 x i8> @max_ge_v16i8c() { } define <2 x i64> @min_lt_v2i64c() { -; SSE2-LABEL: min_lt_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm3 -; SSE2-NEXT: pand %xmm1, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm3 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775809] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775809] -; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -2541,122 +2001,16 @@ define <2 x i64> @min_lt_v2i64c() { } define <4 x i64> @min_lt_v4i64c() { -; SSE2-LABEL: min_lt_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pxor %xmm8, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pxor %xmm3, %xmm6 -; SSE2-NEXT: movdqa %xmm6, %xmm7 -; SSE2-NEXT: pcmpgtd %xmm1, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm1, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3] -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pxor %xmm4, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm7, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm5, %xmm2 -; SSE2-NEXT: pand %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn %xmm3, %xmm2 -; SSE2-NEXT: pand %xmm8, %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm8, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm1, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pxor %xmm5, %xmm4 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pcmpgtd %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm4, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm7, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3] -; SSE41-NEXT: por %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm5, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775815,9223372036854775809] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3 -; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775801] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: min_lt_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775801] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775815,9223372036854775809] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: min_lt_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809] -; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: min_lt_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] +; SSE-NEXT: retq ; -; AVX512-LABEL: min_lt_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809] -; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: min_lt_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp ult <4 x i64> %1, %2 @@ -2665,25 +2019,10 @@ define <4 x i64> @min_lt_v4i64c() { } define <4 x i32> @min_lt_v4i32c() { -; SSE2-LABEL: min_lt_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483641,2147483655,2147483649] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v4i32c: ; AVX: # BB#0: @@ -2697,33 +2036,11 @@ define <4 x i32> @min_lt_v4i32c() { } define <8 x i32> @min_lt_v8i32c() { -; SSE2-LABEL: min_lt_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483655,2147483653,2147483651,2147483649] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1 -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483647,2147483645,2147483643,2147483641] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v8i32c: ; AVX: # BB#0: @@ -2737,27 +2054,10 @@ define <8 x i32> @min_lt_v8i32c() { } define <8 x i16> @min_lt_v8i16c() { -; SSE2-LABEL: min_lt_v8i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7] -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: psubusw {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pxor %xmm0, %xmm0 -; SSE2-NEXT: pcmpeqw %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v8i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v8i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v8i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v8i16c: ; AVX: # BB#0: @@ -2771,33 +2071,11 @@ define <8 x i16> @min_lt_v8i16c() { } define <16 x i16> @min_lt_v16i16c() { -; SSE2-LABEL: min_lt_v16i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [32775,32774,32773,32772,32771,32770,32769,32768] -; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm1 -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [32769,32766,32765,32764,32763,32762,32761,32768] -; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_lt_v16i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_lt_v16i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] -; SSE42-NEXT: retq +; SSE-LABEL: min_lt_v16i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] +; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v16i16c: ; AVX: # BB#0: @@ -2828,70 +2106,14 @@ define <16 x i8> @min_lt_v16i8c() { } define <2 x i64> @min_le_v2i64c() { -; SSE2-LABEL: min_le_v2i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm0 -; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm3 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v2i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3] -; SSE41-NEXT: por %xmm0, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE41-NEXT: pxor %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm2, %xmm1 -; SSE41-NEXT: movapd %xmm1, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v2i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [18446744073709551615,1] -; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775801,9223372036854775815] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm2 -; SSE42-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE42-NEXT: pxor %xmm2, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v2i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v2i64c: ; AVX: # BB#0: -; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [18446744073709551615,1] -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775815] -; AVX-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 -; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 -; AVX-NEXT: vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] ; AVX-NEXT: retq %1 = insertelement <2 x i64> , i64 -7, i32 0 %2 = insertelement <2 x i64> , i64 -1, i32 0 @@ -2901,137 +2123,16 @@ define <2 x i64> @min_le_v2i64c() { } define <4 x i64> @min_le_v4i64c() { -; SSE2-LABEL: min_le_v4i64c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615] -; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609] -; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1] -; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648] -; SSE2-NEXT: movdqa %xmm7, %xmm0 -; SSE2-NEXT: pxor %xmm9, %xmm0 -; SSE2-NEXT: movdqa %xmm7, %xmm1 -; SSE2-NEXT: pxor %xmm8, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm6 -; SSE2-NEXT: pcmpgtd %xmm0, %xmm6 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm0, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm2, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE2-NEXT: por %xmm0, %xmm6 -; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 -; SSE2-NEXT: movdqa %xmm6, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: movdqa %xmm7, %xmm2 -; SSE2-NEXT: pxor %xmm5, %xmm2 -; SSE2-NEXT: pxor %xmm10, %xmm7 -; SSE2-NEXT: movdqa %xmm7, %xmm3 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm3 -; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2] -; SSE2-NEXT: pcmpeqd %xmm2, %xmm7 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3] -; SSE2-NEXT: pand %xmm4, %xmm2 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] -; SSE2-NEXT: por %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm10, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 -; SSE2-NEXT: pandn %xmm8, %xmm6 -; SSE2-NEXT: pandn %xmm9, %xmm1 -; SSE2-NEXT: por %xmm6, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v4i64c: -; SSE41: # BB#0: -; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615] -; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648] -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm8, %xmm6 -; SSE41-NEXT: movdqa %xmm6, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm3, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm3, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] -; SSE41-NEXT: pand %xmm4, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm3 -; SSE41-NEXT: pcmpeqd %xmm4, %xmm4 -; SSE41-NEXT: pxor %xmm4, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm6 -; SSE41-NEXT: pxor %xmm2, %xmm6 -; SSE41-NEXT: pxor %xmm9, %xmm0 -; SSE41-NEXT: movdqa %xmm0, %xmm7 -; SSE41-NEXT: pcmpgtd %xmm6, %xmm7 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2] -; SSE41-NEXT: pcmpeqd %xmm6, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm6 -; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3] -; SSE41-NEXT: por %xmm6, %xmm0 -; SSE41-NEXT: pxor %xmm4, %xmm0 -; SSE41-NEXT: blendvpd %xmm9, %xmm2 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: blendvpd %xmm8, %xmm1 -; SSE41-NEXT: movapd %xmm2, %xmm0 -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v4i64c: -; SSE42: # BB#0: -; SSE42-NEXT: movapd {{.*#+}} xmm1 = [7,1] -; SSE42-NEXT: movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609] -; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [9223372036854775809,9223372036854775815] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm3 -; SSE42-NEXT: pcmpeqd %xmm4, %xmm4 -; SSE42-NEXT: pxor %xmm4, %xmm3 -; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775807] -; SSE42-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 -; SSE42-NEXT: pxor %xmm4, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm2 -; SSE42-NEXT: movdqa %xmm3, %xmm0 -; SSE42-NEXT: blendvpd {{.*}}(%rip), %xmm1 -; SSE42-NEXT: movapd %xmm2, %xmm0 -; SSE42-NEXT: retq -; -; AVX1-LABEL: min_le_v4i64c: -; AVX1: # BB#0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775809,9223372036854775815] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775801,9223372036854775807] -; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3 -; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 -; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX1-NEXT: retq -; -; AVX2-LABEL: min_le_v4i64c: -; AVX2: # BB#0: -; AVX2-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815] -; AVX2-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 -; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm1 -; AVX2-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX2-NEXT: retq +; SSE-LABEL: min_le_v4i64c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] +; SSE-NEXT: retq ; -; AVX512-LABEL: min_le_v4i64c: -; AVX512: # BB#0: -; AVX512-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1] -; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815] -; AVX512-NEXT: vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1 -; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 -; AVX512-NEXT: vpxor %ymm2, %ymm1, %ymm1 -; AVX512-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0 -; AVX512-NEXT: retq +; AVX-LABEL: min_le_v4i64c: +; AVX: # BB#0: +; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] +; AVX-NEXT: retq %1 = insertelement <4 x i64> , i64 -7, i32 0 %2 = insertelement <4 x i64> , i64 -1, i32 0 %3 = icmp ule <4 x i64> %1, %2 @@ -3040,26 +2141,10 @@ define <4 x i64> @min_le_v4i64c() { } define <4 x i32> @min_le_v4i32c() { -; SSE2-LABEL: min_le_v4i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483647,2147483649,2147483655] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 -; SSE2-NEXT: pxor %xmm0, %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v4i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v4i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v4i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v4i32c: ; AVX: # BB#0: @@ -3073,35 +2158,11 @@ define <4 x i32> @min_le_v4i32c() { } define <8 x i32> @min_le_v8i32c() { -; SSE2-LABEL: min_le_v8i32c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483651,2147483653,2147483655] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 -; SSE2-NEXT: movdqa %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483641,2147483643,2147483645,2147483647] -; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 -; SSE2-NEXT: pxor %xmm0, %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm3 -; SSE2-NEXT: pandn {{.*}}(%rip), %xmm1 -; SSE2-NEXT: por %xmm3, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v8i32c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v8i32c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v8i32c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v8i32c: ; AVX: # BB#0: @@ -3115,28 +2176,10 @@ define <8 x i32> @min_le_v8i32c() { } define <8 x i16> @min_le_v8i16c() { -; SSE2-LABEL: min_le_v8i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7] -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65535,65533,65531,65529,7,5,3,1] -; SSE2-NEXT: movdqa %xmm1, %xmm3 -; SSE2-NEXT: psubusw %xmm2, %xmm3 -; SSE2-NEXT: pxor %xmm0, %xmm0 -; SSE2-NEXT: pcmpeqw %xmm3, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm1 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v8i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v8i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v8i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v8i16c: ; AVX: # BB#0: @@ -3150,38 +2193,11 @@ define <8 x i16> @min_le_v8i16c() { } define <16 x i16> @min_le_v16i16c() { -; SSE2-LABEL: min_le_v16i16c: -; SSE2: # BB#0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65529,65530,65531,65532,65533,65534,65535,0] -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,2,3,4,5,6,7,8] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [65535,65534,65533,65532,65531,65530,65529,0] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,6,5,4,3,2,1,0] -; SSE2-NEXT: movdqa %xmm3, %xmm1 -; SSE2-NEXT: psubusw %xmm5, %xmm1 -; SSE2-NEXT: pxor %xmm6, %xmm6 -; SSE2-NEXT: pcmpeqw %xmm6, %xmm1 -; SSE2-NEXT: movdqa %xmm2, %xmm0 -; SSE2-NEXT: psubusw %xmm4, %xmm0 -; SSE2-NEXT: pcmpeqw %xmm6, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm2 -; SSE2-NEXT: pandn %xmm4, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 -; SSE2-NEXT: pand %xmm1, %xmm3 -; SSE2-NEXT: pandn %xmm5, %xmm1 -; SSE2-NEXT: por %xmm3, %xmm1 -; SSE2-NEXT: retq -; -; SSE41-LABEL: min_le_v16i16c: -; SSE41: # BB#0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0] -; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] -; SSE41-NEXT: retq -; -; SSE42-LABEL: min_le_v16i16c: -; SSE42: # BB#0: -; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0] -; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] -; SSE42-NEXT: retq +; SSE-LABEL: min_le_v16i16c: +; SSE: # BB#0: +; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] +; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v16i16c: ; AVX: # BB#0: