From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Sat, 14 Feb 2015 02:55:54 +0000 (+0000)
Subject: R600/SI: Add hack to copy from a VGPR to VCC
X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=582d603f1778704b2fc7c45c37257e2420385f4f

R600/SI: Add hack to copy from a VGPR to VCC

This hopefully should be fixed when VReg_1 is removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229225 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp
index 7762b6eccf8..13775b5ec31 100644
--- a/lib/Target/R600/SIInstrInfo.cpp
+++ b/lib/Target/R600/SIInstrInfo.cpp
@@ -332,6 +332,16 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
     return;
 
   } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
+    if (DestReg == AMDGPU::VCC) {
+      // FIXME: Hack until VReg_1 removed.
+
+      assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
+      BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
+        .addImm(0)
+        .addReg(SrcReg, getKillRegState(KillSrc));
+      return;
+    }
+
     assert(AMDGPU::SReg_64RegClass.contains(SrcReg));
     BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
             .addReg(SrcReg, getKillRegState(KillSrc));