From: Peizhao Ou <peizhaoo@uci.edu>
Date: Tue, 13 Mar 2018 02:07:17 +0000 (-0700)
Subject: Don't taint relaxed loads that immediately comes before an AcqRel read-modify-write op
X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=53395c948459c88257c8ae57b65831fab51e4646;hp=e3322525f86c7a54cd2ab9b66bf35e8dd1c48dc2

Don't taint relaxed loads that immediately comes before an AcqRel read-modify-write op
---

diff --git a/include/llvm/IR/Instructions.h b/include/llvm/IR/Instructions.h
index 28e1fd90fdf..cc6c25974cd 100644
--- a/include/llvm/IR/Instructions.h
+++ b/include/llvm/IR/Instructions.h
@@ -228,6 +228,14 @@ public:
   LoadInst(Value *Ptr, const char *NameStr, bool isVolatile,
            BasicBlock *InsertAtEnd);
 
+  bool getHasSubsequentAcqlRMW() {
+    return hasSubsequentAcqlRMW_;
+  }
+
+  void setHasSubsequentAcqlRMW(bool val) {
+    hasSubsequentAcqlRMW_ = val;
+  }
+
   /// isVolatile - Return true if this is a load from a volatile memory
   /// location.
   ///
@@ -306,6 +314,8 @@ private:
   void setInstructionSubclassData(unsigned short D) {
     Instruction::setInstructionSubclassData(D);
   }
+
+  bool hasSubsequentAcqlRMW_;
 };
 
 //===----------------------------------------------------------------------===//
diff --git a/lib/CodeGen/AtomicExpandPass.cpp b/lib/CodeGen/AtomicExpandPass.cpp
index c8308afe9c1..077c52b19a7 100644
--- a/lib/CodeGen/AtomicExpandPass.cpp
+++ b/lib/CodeGen/AtomicExpandPass.cpp
@@ -71,6 +71,33 @@ namespace {
     bool isIdempotentRMW(AtomicRMWInst *AI);
     bool simplifyIdempotentRMW(AtomicRMWInst *AI);
   };
+
+
+  // If 'LI' is a relaxed load, and it is immediately followed by a
+// atomic read-modify-write that has acq_rel parameter, we don't have to do
+// anything since the rmw serves as a natural barrier.
+void MarkRelaxedLoadBeforeAcqrelRMW(LoadInst* LI) {
+  auto* BB = LI->getParent();
+  auto BBI = LI->getIterator();
+  for (BBI++; BBI != BB->end(); BBI++) {
+    Instruction* CurInst = &*BBI;
+    if (!CurInst) {
+      return;
+    }
+    if (!CurInst->isAtomic()) {
+      continue;
+    }
+    auto* RMW = dyn_cast<AtomicRMWInst>(CurInst);
+    if (!RMW) {
+      return;
+    }
+    if (RMW->getOrdering() == AcquireRelease ||
+        RMW->getOrdering() == SequentiallyConsistent) {
+      LI->setHasSubsequentAcqlRMW(true);
+    }
+  }
+}
+
 }
 
 char AtomicExpand::ID = 0;
@@ -133,7 +160,8 @@ bool AtomicExpand::runOnFunction(Function &F) {
                          << *LI << '\n');
             LI->setOrdering(Acquire);
             */
-            MonotonicLoadInsts.push_back(LI);
+//            MonotonicLoadInsts.push_back(LI);
+            MarkRelaxedLoadBeforeAcqrelRMW(LI);
           }
           break;
         }
diff --git a/lib/CodeGen/CodeGenPrepare.cpp b/lib/CodeGen/CodeGenPrepare.cpp
index 96fa10bbb8e..1837ba2bd5d 100644
--- a/lib/CodeGen/CodeGenPrepare.cpp
+++ b/lib/CodeGen/CodeGenPrepare.cpp
@@ -1413,7 +1413,8 @@ bool CodeGenPrepare::runOnFunction(Function &F) {
       switch (I->getOpcode()) {
         case Instruction::Load: {
           auto* LI = dyn_cast<LoadInst>(&*I);
-          if (LI->getOrdering() == Monotonic) {
+          if (LI->getOrdering() == Monotonic &&
+              !LI->getHasSubsequentAcqlRMW()) {
             MonotonicLoadInsts.insert(LI);
           }
           break;