From: Dan Gohman Date: Wed, 9 Sep 2015 00:52:47 +0000 (+0000) Subject: [WebAssembly] Implement WebAssemblyInstrInfo::copyPhysReg X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=48a473e770c4c987cb6c87228b0a0007caac5053 [WebAssembly] Implement WebAssemblyInstrInfo::copyPhysReg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247110 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index eb1343292d3..c2e71c1489b 100644 --- a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -269,28 +269,32 @@ void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) { OS << "(setlocal @" << TargetRegisterInfo::virtReg2Index(Reg) << ' '; } - OS << '(' << OpcodeName(TII, MI); - for (const MachineOperand &MO : MI->uses()) - switch (MO.getType()) { - default: - llvm_unreachable("unexpected machine operand type"); - case MachineOperand::MO_Register: { - if (MO.isImplicit()) - continue; - unsigned Reg = MO.getReg(); - OS << " @" << TargetRegisterInfo::virtReg2Index(Reg); - } break; - case MachineOperand::MO_Immediate: { - OS << ' ' << MO.getImm(); - } break; - case MachineOperand::MO_FPImmediate: { - OS << ' ' << toString(MO.getFPImm()->getValueAPF()); - } break; - case MachineOperand::MO_GlobalAddress: { - OS << ' ' << toSymbol(MO.getGlobal()->getName()); - } break; - } - OS << ')'; + if (MI->getOpcode() == WebAssembly::COPY) { + OS << '@' << TargetRegisterInfo::virtReg2Index(MI->getOperand(1).getReg()); + } else { + OS << '(' << OpcodeName(TII, MI); + for (const MachineOperand &MO : MI->uses()) + switch (MO.getType()) { + default: + llvm_unreachable("unexpected machine operand type"); + case MachineOperand::MO_Register: { + if (MO.isImplicit()) + continue; + unsigned Reg = MO.getReg(); + OS << " @" << TargetRegisterInfo::virtReg2Index(Reg); + } break; + case MachineOperand::MO_Immediate: { + OS << ' ' << MO.getImm(); + } break; + case MachineOperand::MO_FPImmediate: { + OS << ' ' << toString(MO.getFPImm()->getValueAPF()); + } break; + case MachineOperand::MO_GlobalAddress: { + OS << ' ' << toSymbol(MO.getGlobal()->getName()); + } break; + } + OS << ')'; + } if (NumDefs != 0) OS << ')'; diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp b/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp index d4c65a4b98c..1898ad8f8eb 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp +++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp @@ -29,3 +29,11 @@ using namespace llvm; WebAssemblyInstrInfo::WebAssemblyInstrInfo(const WebAssemblySubtarget &STI) : RI(STI.getTargetTriple()) {} + +void WebAssemblyInstrInfo::copyPhysReg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator I, + DebugLoc DL, unsigned DestReg, + unsigned SrcReg, bool KillSrc) const { + BuildMI(MBB, I, DL, get(WebAssembly::COPY), DestReg) + .addReg(SrcReg, KillSrc ? RegState::Kill : 0); +} diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.h b/lib/Target/WebAssembly/WebAssemblyInstrInfo.h index 29fdcb0e6cb..29feee2d831 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.h +++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.h @@ -33,6 +33,10 @@ public: explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI); const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; } + + void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + DebugLoc DL, unsigned DestReg, unsigned SrcReg, + bool KillSrc) const override; }; } // end namespace llvm diff --git a/test/CodeGen/WebAssembly/phi.ll b/test/CodeGen/WebAssembly/phi.ll index 13fb5ebc530..24cab2f6607 100644 --- a/test/CodeGen/WebAssembly/phi.ll +++ b/test/CodeGen/WebAssembly/phi.ll @@ -8,6 +8,8 @@ target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128" target triple = "wasm32-unknown-unknown" +; Basic phi triangle. + ; CHECK-LABEL: test0 ; CHECK: (setlocal [[REG:@.*]] (argument 0)) ; CHECK: (setlocal [[REG]] (sdiv [[REG]] {{.*}})) @@ -23,3 +25,27 @@ done: %s = phi i32 [ %a, %true ], [ %p, %entry ] ret i32 %s } + +; Swap phis. + +; CHECK-LABEL: test1 +; CHECK: BB0_1: +; CHECK: (setlocal [[REG0:@.*]] [[REG1:@.*]]) +; CHECK: (setlocal [[REG1]] [[REG2:@.*]]) +; CHECK: (setlocal [[REG2]] [[REG0]]) +define i32 @test1(i32 %n) { +entry: + br label %loop + +loop: + %a = phi i32 [ 0, %entry ], [ %b, %loop ] + %b = phi i32 [ 1, %entry ], [ %a, %loop ] + %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] + + %i.next = add i32 %i, 1 + %t = icmp slt i32 %i.next, %n + br i1 %t, label %loop, label %exit + +exit: + ret i32 %a +}