From: Junmo Park Date: Sat, 9 Jan 2016 07:30:13 +0000 (+0000) Subject: [BranchFolding] Set correct mem refs X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=1ff11017d2669b933b29fcbb6451cfcda34ad693 [BranchFolding] Set correct mem refs Merge MBBICommon and MBBI's MMOs. Differential Revision: http://reviews.llvm.org/D15990 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257253 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp index 60803490a5d..df5cac5a9f7 100644 --- a/lib/CodeGen/BranchFolding.cpp +++ b/lib/CodeGen/BranchFolding.cpp @@ -780,7 +780,7 @@ removeMMOsFromMemoryOperations(MachineBasicBlock::iterator MBBIStartPos, assert(MBBICommon->isIdenticalTo(&*MBBI) && "Expected matching MIIs!"); if (MBBICommon->mayLoad() || MBBICommon->mayStore()) - MBBICommon->setMemRefs(MBBI->mergeMemRefsWith(*MBBI)); + MBBICommon->setMemRefs(MBBICommon->mergeMemRefsWith(*MBBI)); ++MBBI; ++MBBICommon; diff --git a/test/CodeGen/AArch64/branch-folder-merge-mmos.ll b/test/CodeGen/AArch64/branch-folder-merge-mmos.ll new file mode 100644 index 00000000000..c62c16a25fc --- /dev/null +++ b/test/CodeGen/AArch64/branch-folder-merge-mmos.ll @@ -0,0 +1,53 @@ +; RUN: opt < %s -O3 | llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null | FileCheck %s +target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" + +; Function Attrs: nounwind +define void @test(float* %test_arr) #0 { +entry: + %test_arr.addr = alloca float*, align 8 + store float* %test_arr, float** %test_arr.addr, align 8 + %0 = load float*, float** %test_arr.addr, align 8 + %arrayidx = getelementptr inbounds float, float* %0, i64 0 + %1 = load float, float* %arrayidx, align 4 + %2 = load float*, float** %test_arr.addr, align 8 + %arrayidx1 = getelementptr inbounds float, float* %2, i64 1 + %3 = load float, float* %arrayidx1, align 4 + %sub = fsub float %1, %3 + %4 = load float*, float** %test_arr.addr, align 8 + %arrayidx2 = getelementptr inbounds float, float* %4, i64 0 + store float %sub, float* %arrayidx2, align 4 + ret void +} + +; Function Attrs: nounwind +define void @foo(i32 %a, i32 %b, float* %foo_arr) #0 { +; CHECK: (load 4 from %ir.arrayidx1.i2), (load 4 from %ir.arrayidx1.i) +entry: + %a.addr = alloca i32, align 4 + %b.addr = alloca i32, align 4 + %foo_arr.addr = alloca float*, align 8 + store i32 %a, i32* %a.addr, align 4 + store i32 %b, i32* %b.addr, align 4 + store float* %foo_arr, float** %foo_arr.addr, align 8 + %0 = load i32, i32* %a.addr, align 4 + %cmp = icmp sgt i32 %0, 0 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + %1 = load float*, float** %foo_arr.addr, align 8 + call void @test(float* %1) + br label %if.end3 + +if.end: ; preds = %entry + %2 = load i32, i32* %b.addr, align 4 + %cmp1 = icmp sgt i32 %2, 0 + br i1 %cmp1, label %if.then2, label %if.end3 + +if.then2: ; preds = %if.end + %3 = load float*, float** %foo_arr.addr, align 8 + call void @test(float* %3) + br label %if.end3 + +if.end3: ; preds = %if.then, %if.then2, %if.end + ret void +}