From: Artyom Skrobov <Artyom.Skrobov@arm.com>
Date: Mon, 16 Nov 2015 12:08:05 +0000 (+0000)
Subject: NFC refactorings in lib/Support/TargetParser.cpp
X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=commitdiff_plain;h=05400e9493fe6f8290516f854f911932835d34ef

NFC refactorings in lib/Support/TargetParser.cpp

Summary:
* declare FPUNames, ARCHNames, ARCHExtNames, HWDivNames, CPUNames
  as static const
* implement getDefaultExtensions with a StringSwitch, in the same
  way getDefaultFPU is implemented

Reviewers: rengolin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253201 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Support/TargetParser.cpp b/lib/Support/TargetParser.cpp
index 4dbc44690ae..05b06fbae5e 100644
--- a/lib/Support/TargetParser.cpp
+++ b/lib/Support/TargetParser.cpp
@@ -27,7 +27,7 @@ namespace {
 // features they correspond to (use getFPUFeatures).
 // FIXME: TableGen this.
 // The entries must appear in the order listed in ARM::FPUKind for correct indexing
-struct {
+static const struct {
   const char *NameCStr;
   size_t NameLength;
   ARM::FPUKind ID;
@@ -50,7 +50,7 @@ struct {
 // of the triples and are not conforming with their official names.
 // Check to see if the expectation should be changed.
 // FIXME: TableGen this.
-struct {
+static const struct {
   const char *NameCStr;
   size_t NameLength;
   ARM::ArchKind ID;
@@ -78,7 +78,7 @@ struct {
 
 // List of Arch Extension names.
 // FIXME: TableGen this.
-struct {
+static const struct {
   const char *NameCStr;
   size_t NameLength;
   unsigned ID;
@@ -92,7 +92,7 @@ struct {
 // List of HWDiv names (use getHWDivSynonym) and which architectural
 // features they correspond to (use getHWDivFeatures).
 // FIXME: TableGen this.
-struct {
+static const struct {
   const char *NameCStr;
   size_t NameLength;
   unsigned ID;
@@ -108,7 +108,7 @@ struct {
 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
 // When this becomes table-generated, we'd probably need two tables.
 // FIXME: TableGen this.
-struct {
+static const struct {
   const char *NameCStr;
   size_t NameLength;
   ARM::ArchKind ArchID;
@@ -163,6 +163,17 @@ unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
     .Default(ARM::FK_INVALID);
 }
 
+unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
+  if (CPU == "generic")
+    return ARCHNames[ArchKind].ArchBaseExtensions;
+
+  return StringSwitch<unsigned>(CPU)
+#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
+    .Case(NAME, ARCHNames[ID].ArchBaseExtensions | DEFAULT_EXT)
+#include "llvm/Support/ARMTargetParser.def"
+    .Default(ARM::AEK_INVALID);
+}
+
 bool llvm::ARM::getHWDivFeatures(unsigned HWDivKind,
                                  std::vector<const char *> &Features) {
 
@@ -323,17 +334,6 @@ StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
   return StringRef();
 }
 
-unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
-  if (CPU == "generic")
-    return ARCHNames[ArchKind].ArchBaseExtensions;
-
-  for (const auto C : CPUNames) {
-    if (CPU == C.getName())
-      return (ARCHNames[C.ArchID].ArchBaseExtensions | C.DefaultExtensions);
-  }
-  return ARM::AEK_INVALID;
-}
-
 StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
   unsigned AK = parseArch(Arch);
   if (AK == ARM::AK_INVALID)