Add attribute name and type to SubtargetFeatures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24012 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Alpha/Alpha.td b/lib/Target/Alpha/Alpha.td
index ae2286c06be40cee12324f8904cfd3e557a8f3c3..7cbb0f181f774c660062dacf487d4d8dfb1e727b 100644 (file)
--- a/lib/Target/Alpha/Alpha.td
+++ b/lib/Target/Alpha/Alpha.td
@@ -20,8 +20,10 @@ include "../Target.td"
 // Subtarget Features
 //===----------------------------------------------------------------------===//
 
-def FeatureCIX : SubtargetFeature<"CIX", "Enable CIX extentions">;
-def FeatureFIX : SubtargetFeature<"FIX", "Enable FIX extentions">;
+def FeatureCIX : SubtargetFeature<"CIX", "bool", "HasCT",
+                                  "Enable CIX extentions">;
+def FeatureFIX : SubtargetFeature<"FIX", "bool", "HasF2I",
+                                  "Enable FIX extentions">;
 
 //===----------------------------------------------------------------------===//
 // Register File Description

diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td
index 93edd0dc348622fde3a88f41a95c7de8862de92f..1de838f7aaa899f4fef70609d7b1d1bdd89f20f1 100644 (file)
--- a/lib/Target/PowerPC/PPC.td
+++ b/lib/Target/PowerPC/PPC.td
@@ -19,15 +19,15 @@ include "../Target.td"
 // PowerPC Subtarget features.
 //
  
-def Feature64Bit     : SubtargetFeature<"64bit",
+def Feature64Bit     : SubtargetFeature<"64bit", "bool", "Is64Bit",
                                         "Enable 64-bit instructions">;
-def Feature64BitRegs : SubtargetFeature<"64bitregs",
+def Feature64BitRegs : SubtargetFeature<"64bitregs", "bool", "Has64BitRegs",
                                         "Enable 64-bit registers [beta]">;
-def FeatureAltivec   : SubtargetFeature<"altivec",
+def FeatureAltivec   : SubtargetFeature<"altivec", "bool", "HasAltivec",
                                         "Enable Altivec instructions">;
-def FeatureGPUL      : SubtargetFeature<"gpul",
+def FeatureGPUL      : SubtargetFeature<"gpul", "bool", "IsGigaProcessor",
                                         "Enable GPUL instructions">;
-def FeatureFSqrt     : SubtargetFeature<"fsqrt",
+def FeatureFSqrt     : SubtargetFeature<"fsqrt", "bool", "HasFSQRT",
                                         "Enable the fsqrt instruction">; 
 
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 3ce329f9f768a8121aaf12504a4491529d9f35ab..7de2d3f5eb4b56c156a8b89320fb4b5d048452cd 100644 (file)
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -252,12 +252,20 @@ class Target {
 //===----------------------------------------------------------------------===//
 // SubtargetFeature - A characteristic of the chip set.
 //
-class SubtargetFeature<string n, string d> {
+class SubtargetFeature<string n, string t, string a, string d> {
   // Name - Feature name.  Used by command line (-mattr=) to determine the
   // appropriate target chip.
   //
   string Name = n;
   
+  // Type - Type of attribute to be set by feature.
+  //
+  string Type = t;
+  
+  // Attribute - Attribute to be set by feature.
+  //
+  string Attribute = a;
+  
   // Desc - Feature description.  Used by command line (-mattr=) to display help
   // information.
   //