Add support for the signx instrution alias of SPARCv9.
authorJoerg Sonnenberger <joerg@bec.de>
Mon, 10 Aug 2015 22:32:25 +0000 (22:32 +0000)
committerJoerg Sonnenberger <joerg@bec.de>
Mon, 10 Aug 2015 22:32:25 +0000 (22:32 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244519 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Sparc/SparcInstrAliases.td
test/MC/Sparc/sparcv9-instructions.s

index 25cc652dbd9e3c081a2b9369d0a696769d90e790..41a6fca75a56ebc16474fbb280fc017f3d1b441f 100644 (file)
@@ -450,3 +450,8 @@ def : InstAlias<"fcmpeq $rs1, $rs2", (V9FCMPEQ FCC0, QFPRegs:$rs1,
                                                      QFPRegs:$rs2)>,
                 Requires<[HasHardQuad]>;
 
+// signx rd -> sra rd, %g0, rd
+def : InstAlias<"signx $rd", (SRArr IntRegs:$rd, IntRegs:$rd, G0), 0>, Requires<[HasV9]>;
+
+// signx reg, rd -> sra reg, %g0, rd
+def : InstAlias<"signx $rs1, $rd", (SRArr IntRegs:$rd, IntRegs:$rs1, G0), 0>, Requires<[HasV9]>;
index e2cb87e06303476110a741f14c15f87b73d42592..6125469b8e8c1c2b53d189e9279313fef4624410 100644 (file)
         ! V9:      popc %g1, %g2                ! encoding: [0x85,0x70,0x00,0x01]
         popc %g1, %g2
 
+
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: signx %g1, %g2
+        ! V9: sra %g1, %g0, %g2               ! encoding: [0x85,0x38,0x40,0x00]
+        signx %g1, %g2
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: signx %g1
+        ! V9: sra %g1, %g0, %g1               ! encoding: [0x83,0x38,0x40,0x00]
+        signx %g1