Update BitRecTy::convertValue to allow if expressions with bit values on both sides...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215087 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/TableGen/Record.cpp b/lib/TableGen/Record.cpp
index 8267a36426118d32a2ec23e225d6a1178eb99bfd..cb21be7b7627ae17100ec3ae432c497bd711e3ac 100644 (file)
--- a/lib/TableGen/Record.cpp
+++ b/lib/TableGen/Record.cpp
@@ -119,6 +119,16 @@ Init *BitRecTy::convertValue(TypedInit *VI) {
   if (auto *BitsTy = dyn_cast<BitsRecTy>(Ty))
     // Accept only bits<1> expression.
     return BitsTy->getNumBits() == 1 ? VI : nullptr;
+  // Ternary !if can be converted to bit, but only if both sides are
+  // convertible to a bit.
+  if (TernOpInit *TOI = dyn_cast<TernOpInit>(VI)) {
+    if (TOI->getOpcode() != TernOpInit::TernaryOp::IF)
+      return nullptr;
+    if (!TOI->getMHS()->convertInitializerTo(BitRecTy::get()) ||
+        !TOI->getRHS()->convertInitializerTo(BitRecTy::get()))
+      return nullptr;
+    return TOI;
+  }
   return nullptr;
 }
 

diff --git a/test/TableGen/ifbit.td b/test/TableGen/ifbit.td
index 88f575e9acfcf61d1730cfd2b0834ecb231cc0f1..18797cac11075aef1c4ac35ef4d6ff4422f48b88 100644 (file)
--- a/test/TableGen/ifbit.td
+++ b/test/TableGen/ifbit.td
@@ -5,6 +5,8 @@
 
 class A<bit b = 1> {
   int a = !if(b, 5, 6);
+  bit c = !if(b, 0, 1);
+  bits<1> d = !if(b, 0, 1);
 }
 
 def X : A<0>;