AVX-512: store <4 x i1> and <2 x i1> values in memory
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 2 Sep 2015 09:20:58 +0000 (09:20 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 2 Sep 2015 09:20:58 +0000 (09:20 +0000)
Enabled DAG pattern lowering for SKX with DQI predicate.

Differential Revision: http://reviews.llvm.org/D12550

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246625 91177308-0d34-0410-b5e6-96231b3b80d8


No differences found