Register allocator: set CSRFirstUseCost to 5 for ARM64.

A value of 5 means if we have a split or spill option that has a really
low cost (1 << 14 is the entry frequency), we will choose to spill
or split the really cold path before using a callee-saved register.

This gives us the performance benefit on SPECInt2k and is also conservative.

rdar://16162005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205248 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM64/ARM64RegisterInfo.h b/lib/Target/ARM64/ARM64RegisterInfo.h
index 78265f743457708eae4da5611d28951dab875164..ac9382700c26676230c7ca60a4d05c1bdd508814 100644 (file)
--- a/lib/Target/ARM64/ARM64RegisterInfo.h
+++ b/lib/Target/ARM64/ARM64RegisterInfo.h
@@ -40,6 +40,13 @@ public:
   getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
   const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
 
+  unsigned getCSRFirstUseCost() const {
+    // The cost will be compared against BlockFrequency where entry has the
+    // value of 1 << 14. A value of 5 will choose to spill or split really
+    // cold path instead of using a callee-saved register.
+    return 5;
+  }
+
   // Calls involved in thread-local variable lookup save more registers than
   // normal calls, so they need a different mask to represent this.
   const uint32_t *getTLSCallPreservedMask() const;