CXX.Flags += -fPIC
CPP.BaseFlags += -fPIC
endif
-endif
-ifeq ($(ARCH),Alpha)
LD.Flags += -Wl,--no-relax
endif
Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;;
PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
- Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;;
+ Alpha) AC_SUBST(TARGET_HAS_JIT,0) ;;
ARM) AC_SUBST(TARGET_HAS_JIT,1) ;;
Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
;;
x86_64) TARGET_HAS_JIT=1
;;
- Alpha) TARGET_HAS_JIT=1
+ Alpha) TARGET_HAS_JIT=0
;;
ARM) TARGET_HAS_JIT=1
;;
+++ /dev/null
-//===-- Alpha/AlphaCodeEmitter.cpp - Convert Alpha code to machine code ---===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains the pass that transforms the Alpha machine instructions
-// into relocatable machine code.
-//
-//===----------------------------------------------------------------------===//
-
-#define DEBUG_TYPE "alpha-emitter"
-#include "AlphaTargetMachine.h"
-#include "AlphaRelocations.h"
-#include "Alpha.h"
-#include "llvm/PassManager.h"
-#include "llvm/CodeGen/JITCodeEmitter.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Function.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
-using namespace llvm;
-
-namespace {
- class AlphaCodeEmitter : public MachineFunctionPass {
- JITCodeEmitter &MCE;
- const AlphaInstrInfo *II;
- public:
- static char ID;
-
- AlphaCodeEmitter(JITCodeEmitter &mce) : MachineFunctionPass(ID),
- MCE(mce) {}
-
- /// getBinaryCodeForInstr - This function, generated by the
- /// CodeEmitterGenerator using TableGen, produces the binary encoding for
- /// machine instructions.
-
- unsigned getBinaryCodeForInstr(const MachineInstr &MI) const;
-
- /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
-
- unsigned getMachineOpValue(const MachineInstr &MI,
- const MachineOperand &MO) const;
-
- bool runOnMachineFunction(MachineFunction &MF);
-
- virtual const char *getPassName() const {
- return "Alpha Machine Code Emitter";
- }
-
- private:
- void emitBasicBlock(MachineBasicBlock &MBB);
- };
-}
-
-char AlphaCodeEmitter::ID = 0;
-
-
-/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha
-/// code to the specified MCE object.
-
-FunctionPass *llvm::createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM,
- JITCodeEmitter &JCE) {
- return new AlphaCodeEmitter(JCE);
-}
-
-bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
- II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
-
- do {
- MCE.startFunction(MF);
- for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
- emitBasicBlock(*I);
- } while (MCE.finishFunction(MF));
-
- return false;
-}
-
-void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
- MCE.StartMachineBasicBlock(&MBB);
- for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
- I != E; ++I) {
- const MachineInstr &MI = *I;
- MCE.processDebugLoc(MI.getDebugLoc(), true);
- switch(MI.getOpcode()) {
- default:
- MCE.emitWordLE(getBinaryCodeForInstr(*I));
- break;
- case Alpha::ALTENT:
- case Alpha::PCLABEL:
- case Alpha::MEMLABEL:
- case TargetOpcode::IMPLICIT_DEF:
- case TargetOpcode::KILL:
- break; //skip these
- }
- MCE.processDebugLoc(MI.getDebugLoc(), false);
- }
-}
-
-static unsigned getAlphaRegNumber(unsigned Reg) {
- switch (Reg) {
- case Alpha::R0 : case Alpha::F0 : return 0;
- case Alpha::R1 : case Alpha::F1 : return 1;
- case Alpha::R2 : case Alpha::F2 : return 2;
- case Alpha::R3 : case Alpha::F3 : return 3;
- case Alpha::R4 : case Alpha::F4 : return 4;
- case Alpha::R5 : case Alpha::F5 : return 5;
- case Alpha::R6 : case Alpha::F6 : return 6;
- case Alpha::R7 : case Alpha::F7 : return 7;
- case Alpha::R8 : case Alpha::F8 : return 8;
- case Alpha::R9 : case Alpha::F9 : return 9;
- case Alpha::R10 : case Alpha::F10 : return 10;
- case Alpha::R11 : case Alpha::F11 : return 11;
- case Alpha::R12 : case Alpha::F12 : return 12;
- case Alpha::R13 : case Alpha::F13 : return 13;
- case Alpha::R14 : case Alpha::F14 : return 14;
- case Alpha::R15 : case Alpha::F15 : return 15;
- case Alpha::R16 : case Alpha::F16 : return 16;
- case Alpha::R17 : case Alpha::F17 : return 17;
- case Alpha::R18 : case Alpha::F18 : return 18;
- case Alpha::R19 : case Alpha::F19 : return 19;
- case Alpha::R20 : case Alpha::F20 : return 20;
- case Alpha::R21 : case Alpha::F21 : return 21;
- case Alpha::R22 : case Alpha::F22 : return 22;
- case Alpha::R23 : case Alpha::F23 : return 23;
- case Alpha::R24 : case Alpha::F24 : return 24;
- case Alpha::R25 : case Alpha::F25 : return 25;
- case Alpha::R26 : case Alpha::F26 : return 26;
- case Alpha::R27 : case Alpha::F27 : return 27;
- case Alpha::R28 : case Alpha::F28 : return 28;
- case Alpha::R29 : case Alpha::F29 : return 29;
- case Alpha::R30 : case Alpha::F30 : return 30;
- case Alpha::R31 : case Alpha::F31 : return 31;
- default:
- llvm_unreachable("Unhandled reg");
- }
-}
-
-unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
- const MachineOperand &MO) const {
-
- unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
- // or things that get fixed up later by the JIT.
-
- if (MO.isReg()) {
- rv = getAlphaRegNumber(MO.getReg());
- } else if (MO.isImm()) {
- rv = MO.getImm();
- } else if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
- DEBUG(errs() << MO << " is a relocated op for " << MI << "\n");
- unsigned Reloc = 0;
- int Offset = 0;
- bool useGOT = false;
- switch (MI.getOpcode()) {
- case Alpha::BSR:
- Reloc = Alpha::reloc_bsr;
- break;
- case Alpha::LDLr:
- case Alpha::LDQr:
- case Alpha::LDBUr:
- case Alpha::LDWUr:
- case Alpha::LDSr:
- case Alpha::LDTr:
- case Alpha::LDAr:
- case Alpha::STQr:
- case Alpha::STLr:
- case Alpha::STWr:
- case Alpha::STBr:
- case Alpha::STSr:
- case Alpha::STTr:
- Reloc = Alpha::reloc_gprellow;
- break;
- case Alpha::LDAHr:
- Reloc = Alpha::reloc_gprelhigh;
- break;
- case Alpha::LDQl:
- Reloc = Alpha::reloc_literal;
- useGOT = true;
- break;
- case Alpha::LDAg:
- case Alpha::LDAHg:
- Reloc = Alpha::reloc_gpdist;
- Offset = MI.getOperand(3).getImm();
- break;
- default:
- llvm_unreachable("unknown relocatable instruction");
- }
- if (MO.isGlobal())
- MCE.addRelocation(MachineRelocation::getGV(
- MCE.getCurrentPCOffset(),
- Reloc,
- const_cast<GlobalValue *>(MO.getGlobal()),
- Offset,
- isa<Function>(MO.getGlobal()),
- useGOT));
- else if (MO.isSymbol())
- MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
- Reloc, MO.getSymbolName(),
- Offset, true));
- else
- MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
- Reloc, MO.getIndex(), Offset));
- } else if (MO.isMBB()) {
- MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
- Alpha::reloc_bsr, MO.getMBB()));
- } else {
-#ifndef NDEBUG
- errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
-#endif
- llvm_unreachable(0);
- }
-
- return rv;
-}
-
-#include "AlphaGenCodeEmitter.inc"
+++ /dev/null
-//===-- AlphaJITInfo.cpp - Implement the JIT interfaces for the Alpha ---===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements the JIT interfaces for the Alpha target.
-//
-//===----------------------------------------------------------------------===//
-
-#define DEBUG_TYPE "jit"
-#include "AlphaJITInfo.h"
-#include "AlphaRelocations.h"
-#include "llvm/Function.h"
-#include "llvm/CodeGen/JITCodeEmitter.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
-#include <cstdlib>
-using namespace llvm;
-
-#define BUILD_OFormatI(Op, RA, LIT, FUN, RC) \
- ((Op << 26) | (RA << 21) | (LIT << 13) | (1 << 12) | (FUN << 5) | (RC))
-#define BUILD_OFormat(Op, RA, RB, FUN, RC) \
- ((Op << 26) | (RA << 21) | (RB << 16) | (FUN << 5) | (RC))
-
-#define BUILD_LDA(RD, RS, IMM16) \
- ((0x08 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
-#define BUILD_LDAH(RD, RS, IMM16) \
- ((0x09 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
-
-#define BUILD_LDQ(RD, RS, IMM16) \
- ((0x29 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 0xFFFF))
-
-#define BUILD_JMP(RD, RS, IMM16) \
- ((0x1A << 26) | ((RD) << 21) | ((RS) << 16) | (0x00 << 14) | ((IMM16) & 0x3FFF))
-#define BUILD_JSR(RD, RS, IMM16) \
- ((0x1A << 26) | ((RD) << 21) | ((RS) << 16) | (0x01 << 14) | ((IMM16) & 0x3FFF))
-
-#define BUILD_SLLi(RD, RS, IMM8) \
- (BUILD_OFormatI(0x12, RS, IMM8, 0x39, RD))
-
-#define BUILD_ORi(RD, RS, IMM8) \
- (BUILD_OFormatI(0x11, RS, IMM8, 0x20, RD))
-
-#define BUILD_OR(RD, RS, RT) \
- (BUILD_OFormat(0x11, RS, RT, 0x20, RD))
-
-
-
-static void EmitBranchToAt(void *At, void *To) {
- unsigned long Fn = (unsigned long)To;
-
- unsigned *AtI = (unsigned*)At;
-
- AtI[0] = BUILD_OR(0, 27, 27);
-
- DEBUG(errs() << "Stub targeting " << To << "\n");
-
- for (int x = 1; x <= 8; ++x) {
- AtI[2*x - 1] = BUILD_SLLi(27,27,8);
- unsigned d = (Fn >> (64 - 8 * x)) & 0x00FF;
- //DEBUG(errs() << "outputing " << hex << d << dec << "\n");
- AtI[2*x] = BUILD_ORi(27, 27, d);
- }
- AtI[17] = BUILD_JMP(31,27,0); //jump, preserving ra, and setting pv
- AtI[18] = 0x00FFFFFF; //mark this as a stub
-}
-
-void AlphaJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
- //FIXME
- llvm_unreachable(0);
-}
-
-static TargetJITInfo::JITCompilerFn JITCompilerFunction;
-//static AlphaJITInfo* AlphaJTI;
-
-extern "C" {
-#ifdef __alpha
-
- void AlphaCompilationCallbackC(long* oldpv, void* CameFromStub)
- {
- void* Target = JITCompilerFunction(CameFromStub);
-
- //rewrite the stub to an unconditional branch
- if (((unsigned*)CameFromStub)[18] == 0x00FFFFFF) {
- DEBUG(errs() << "Came from a stub, rewriting\n");
- EmitBranchToAt(CameFromStub, Target);
- } else {
- DEBUG(errs() << "confused, didn't come from stub at " << CameFromStub
- << " old jump vector " << oldpv
- << " new jump vector " << Target << "\n");
- }
-
- //Change pv to new Target
- *oldpv = (long)Target;
- }
-
- void AlphaCompilationCallback(void);
-
- asm(
- ".text\n"
- ".globl AlphaCompilationCallbackC\n"
- ".align 4\n"
- ".globl AlphaCompilationCallback\n"
- ".ent AlphaCompilationCallback\n"
-"AlphaCompilationCallback:\n"
- // //get JIT's GOT
- "ldgp $29, 0($27)\n"
- //Save args, callee saved, and perhaps others?
- //args: $16-$21 $f16-$f21 (12)
- //callee: $9-$14 $f2-$f9 (14)
- //others: fp:$15 ra:$26 pv:$27 (3)
- "lda $30, -232($30)\n"
- "stq $16, 0($30)\n"
- "stq $17, 8($30)\n"
- "stq $18, 16($30)\n"
- "stq $19, 24($30)\n"
- "stq $20, 32($30)\n"
- "stq $21, 40($30)\n"
- "stt $f16, 48($30)\n"
- "stt $f17, 56($30)\n"
- "stt $f18, 64($30)\n"
- "stt $f19, 72($30)\n"
- "stt $f20, 80($30)\n"
- "stt $f21, 88($30)\n"
- "stq $9, 96($30)\n"
- "stq $10, 104($30)\n"
- "stq $11, 112($30)\n"
- "stq $12, 120($30)\n"
- "stq $13, 128($30)\n"
- "stq $14, 136($30)\n"
- "stt $f2, 144($30)\n"
- "stt $f3, 152($30)\n"
- "stt $f4, 160($30)\n"
- "stt $f5, 168($30)\n"
- "stt $f6, 176($30)\n"
- "stt $f7, 184($30)\n"
- "stt $f8, 192($30)\n"
- "stt $f9, 200($30)\n"
- "stq $15, 208($30)\n"
- "stq $26, 216($30)\n"
- "stq $27, 224($30)\n"
-
- "addq $30, 224, $16\n" //pass the addr of saved pv as the first arg
- "bis $0, $0, $17\n" //pass the roughly stub addr in second arg
- "jsr $26, AlphaCompilationCallbackC\n" //call without saving ra
-
- "ldq $16, 0($30)\n"
- "ldq $17, 8($30)\n"
- "ldq $18, 16($30)\n"
- "ldq $19, 24($30)\n"
- "ldq $20, 32($30)\n"
- "ldq $21, 40($30)\n"
- "ldt $f16, 48($30)\n"
- "ldt $f17, 56($30)\n"
- "ldt $f18, 64($30)\n"
- "ldt $f19, 72($30)\n"
- "ldt $f20, 80($30)\n"
- "ldt $f21, 88($30)\n"
- "ldq $9, 96($30)\n"
- "ldq $10, 104($30)\n"
- "ldq $11, 112($30)\n"
- "ldq $12, 120($30)\n"
- "ldq $13, 128($30)\n"
- "ldq $14, 136($30)\n"
- "ldt $f2, 144($30)\n"
- "ldt $f3, 152($30)\n"
- "ldt $f4, 160($30)\n"
- "ldt $f5, 168($30)\n"
- "ldt $f6, 176($30)\n"
- "ldt $f7, 184($30)\n"
- "ldt $f8, 192($30)\n"
- "ldt $f9, 200($30)\n"
- "ldq $15, 208($30)\n"
- "ldq $26, 216($30)\n"
- "ldq $27, 224($30)\n" //this was updated in the callback with the target
-
- "lda $30, 232($30)\n" //restore sp
- "jmp $31, ($27)\n" //jump to the new function
- ".end AlphaCompilationCallback\n"
- );
-#else
- void AlphaCompilationCallback() {
- llvm_unreachable("Cannot call AlphaCompilationCallback() on a non-Alpha arch!");
- }
-#endif
-}
-
-TargetJITInfo::StubLayout AlphaJITInfo::getStubLayout() {
- // The stub contains 19 4-byte instructions, aligned at 4 bytes:
- // R0 = R27
- // 8 x "R27 <<= 8; R27 |= 8-bits-of-Target" == 16 instructions
- // JMP R27
- // Magic number so the compilation callback can recognize the stub.
- StubLayout Result = {19 * 4, 4};
- return Result;
-}
-
-void *AlphaJITInfo::emitFunctionStub(const Function* F, void *Fn,
- JITCodeEmitter &JCE) {
- //assert(Fn == AlphaCompilationCallback && "Where are you going?\n");
- //Do things in a stupid slow way!
- void* Addr = (void*)(intptr_t)JCE.getCurrentPCValue();
- for (int x = 0; x < 19; ++ x)
- JCE.emitWordLE(0);
- EmitBranchToAt(Addr, Fn);
- DEBUG(errs() << "Emitting Stub to " << Fn << " at [" << Addr << "]\n");
- return Addr;
-}
-
-TargetJITInfo::LazyResolverFn
-AlphaJITInfo::getLazyResolverFunction(JITCompilerFn F) {
- JITCompilerFunction = F;
- // setZerothGOTEntry((void*)AlphaCompilationCallback);
- return AlphaCompilationCallback;
-}
-
-//These describe LDAx
-static const int IMM_LOW = -32768;
-static const int IMM_HIGH = 32767;
-static const int IMM_MULT = 65536;
-
-static long getUpper16(long l)
-{
- long y = l / IMM_MULT;
- if (l % IMM_MULT > IMM_HIGH)
- ++y;
- if (l % IMM_MULT < IMM_LOW)
- --y;
- assert((short)y == y && "displacement out of range");
- return y;
-}
-
-static long getLower16(long l)
-{
- long h = getUpper16(l);
- long y = l - h * IMM_MULT;
- assert(y == (short)y && "Displacement out of range");
- return y;
-}
-
-void AlphaJITInfo::relocate(void *Function, MachineRelocation *MR,
- unsigned NumRelocs, unsigned char* GOTBase) {
- for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
- unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
- long idx = 0;
- bool doCommon = true;
- switch ((Alpha::RelocationType)MR->getRelocationType()) {
- default: llvm_unreachable("Unknown relocation type!");
- case Alpha::reloc_literal:
- //This is a LDQl
- idx = MR->getGOTIndex();
- DEBUG(errs() << "Literal relocation to slot " << idx);
- idx = (idx - GOToffset) * 8;
- DEBUG(errs() << " offset " << idx << "\n");
- break;
- case Alpha::reloc_gprellow:
- idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8];
- idx = getLower16(idx);
- DEBUG(errs() << "gprellow relocation offset " << idx << "\n");
- DEBUG(errs() << " Pointer is " << (void*)MR->getResultPointer()
- << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n");
- break;
- case Alpha::reloc_gprelhigh:
- idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8];
- idx = getUpper16(idx);
- DEBUG(errs() << "gprelhigh relocation offset " << idx << "\n");
- DEBUG(errs() << " Pointer is " << (void*)MR->getResultPointer()
- << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n");
- break;
- case Alpha::reloc_gpdist:
- switch (*RelocPos >> 26) {
- case 0x09: //LDAH
- idx = &GOTBase[GOToffset * 8] - (unsigned char*)RelocPos;
- idx = getUpper16(idx);
- DEBUG(errs() << "LDAH: " << idx << "\n");
- //add the relocation to the map
- gpdistmap[std::make_pair(Function, MR->getConstantVal())] = RelocPos;
- break;
- case 0x08: //LDA
- assert(gpdistmap[std::make_pair(Function, MR->getConstantVal())] &&
- "LDAg without seeing LDAHg");
- idx = &GOTBase[GOToffset * 8] -
- (unsigned char*)gpdistmap[std::make_pair(Function, MR->getConstantVal())];
- idx = getLower16(idx);
- DEBUG(errs() << "LDA: " << idx << "\n");
- break;
- default:
- llvm_unreachable("Cannot handle gpdist yet");
- }
- break;
- case Alpha::reloc_bsr: {
- idx = (((unsigned char*)MR->getResultPointer() -
- (unsigned char*)RelocPos) >> 2) + 1; //skip first 2 inst of fun
- *RelocPos |= (idx & ((1 << 21)-1));
- doCommon = false;
- break;
- }
- }
- if (doCommon) {
- short x = (short)idx;
- assert(x == idx);
- *(short*)RelocPos = x;
- }
- }
-}
+++ /dev/null
-//===- AlphaJITInfo.h - Alpha impl. of the JIT interface ----*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains the Alpha implementation of the TargetJITInfo class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef ALPHA_JITINFO_H
-#define ALPHA_JITINFO_H
-
-#include "llvm/Target/TargetJITInfo.h"
-#include <map>
-
-namespace llvm {
- class TargetMachine;
-
- class AlphaJITInfo : public TargetJITInfo {
- protected:
- TargetMachine &TM;
-
- //because gpdist are paired and relative to the pc of the first inst,
- //we need to have some state
- std::map<std::pair<void*, int>, void*> gpdistmap;
- public:
- explicit AlphaJITInfo(TargetMachine &tm) : TM(tm)
- { useGOT = true; }
-
- virtual StubLayout getStubLayout();
- virtual void *emitFunctionStub(const Function* F, void *Fn,
- JITCodeEmitter &JCE);
- virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn);
- virtual void relocate(void *Function, MachineRelocation *MR,
- unsigned NumRelocs, unsigned char* GOTBase);
-
- /// replaceMachineCodeForFunction - Make it so that calling the function
- /// whose machine code is at OLD turns into a call to NEW, perhaps by
- /// overwriting OLD with a branch to NEW. This is used for self-modifying
- /// code.
- ///
- virtual void replaceMachineCodeForFunction(void *Old, void *New);
- private:
- static const unsigned GOToffset = 4096;
-
- };
-}
-
-#endif
//===----------------------------------------------------------------------===//
#include "Alpha.h"
-#include "AlphaJITInfo.h"
#include "AlphaMCAsmInfo.h"
#include "AlphaTargetMachine.h"
#include "llvm/PassManager.h"
: LLVMTargetMachine(T, TT),
DataLayout("e-f128:128:128-n64"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
- JITInfo(*this),
Subtarget(TT, FS),
TLInfo(*this),
TSInfo(*this) {
PM.add(createAlphaLLRPPass(*this));
return false;
}
-bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
- CodeGenOpt::Level OptLevel,
- JITCodeEmitter &JCE) {
- PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
- return false;
-}
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "AlphaInstrInfo.h"
-#include "AlphaJITInfo.h"
#include "AlphaISelLowering.h"
#include "AlphaSelectionDAGInfo.h"
#include "AlphaSubtarget.h"
const TargetData DataLayout; // Calculates type size & alignment
AlphaInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
- AlphaJITInfo JITInfo;
AlphaSubtarget Subtarget;
AlphaTargetLowering TLInfo;
AlphaSelectionDAGInfo TSInfo;
return &TSInfo;
}
virtual const TargetData *getTargetData() const { return &DataLayout; }
- virtual AlphaJITInfo* getJITInfo() {
- return &JITInfo;
- }
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
- virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
- JITCodeEmitter &JCE);
};
} // end namespace llvm
return;
case MachineOperand::MO_Immediate:
- llvm_unreachable("printOp() does not handle immediate values");
+ assert(0 && "printOp() does not handle immediate values");
return;
case MachineOperand::MO_MachineBasicBlock:
tablegen(AlphaGenRegisterInfo.inc -gen-register-desc)
tablegen(AlphaGenInstrNames.inc -gen-instr-enums)
tablegen(AlphaGenInstrInfo.inc -gen-instr-desc)
-tablegen(AlphaGenCodeEmitter.inc -gen-emitter)
tablegen(AlphaGenAsmWriter.inc -gen-asm-writer)
tablegen(AlphaGenDAGISel.inc -gen-dag-isel)
tablegen(AlphaGenCallingConv.inc -gen-callingconv)
AlphaInstrInfo.cpp
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp
- AlphaJITInfo.cpp
AlphaLLRP.cpp
AlphaMCAsmInfo.cpp
AlphaRegisterInfo.cpp
# Make sure that tblgen is run, first thing.
BUILT_SOURCES = AlphaGenRegisterInfo.h.inc AlphaGenRegisterNames.inc \
AlphaGenRegisterInfo.inc AlphaGenInstrNames.inc \
- AlphaGenInstrInfo.inc AlphaGenCodeEmitter.inc \
+ AlphaGenInstrInfo.inc \
AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \
AlphaGenCallingConv.inc AlphaGenSubtarget.inc
projects / oota-llvm.git / commitdiff