TableGen'ing instruction encodings.
authorEvan Cheng <evan.cheng@apple.com>
Fri, 29 Aug 2008 07:42:03 +0000 (07:42 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Fri, 29 Aug 2008 07:42:03 +0000 (07:42 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55533 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/Makefile

index febc333d605e122b87f2f32618059bf77bc6f333..b5d7172d88e55b9fd518144dc7dbe33b9024549e 100644 (file)
@@ -15,7 +15,8 @@ TARGET = ARM
 BUILT_SOURCES = ARMGenRegisterInfo.h.inc ARMGenRegisterNames.inc \
                 ARMGenRegisterInfo.inc ARMGenInstrNames.inc \
                 ARMGenInstrInfo.inc ARMGenAsmWriter.inc \
-                ARMGenDAGISel.inc ARMGenSubtarget.inc
+                ARMGenDAGISel.inc ARMGenSubtarget.inc \
+                ARMGenCodeEmitter.inc
 
 DIRS = AsmPrinter