std::runtime_error::operator=(toCopy)));
}
- ~OurCppRunException (void) throw ();
+ ~OurCppRunException (void) throw () {}
};
-OurCppRunException::~OurCppRunException() throw () {}
-
/// Throws foreign C++ exception.
/// @param ignoreIt unused parameter that allows function to match implied
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
- virtual ~ExprAST();
+ virtual ~ExprAST() {}
};
-ExprAST::~ExprAST() {}
-
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
public:
NumberExprAST(double val) {}
- virtual ~NumberExprAST();
};
-NumberExprAST::~NumberExprAST() {}
-
/// VariableExprAST - Expression class for referencing a variable, like "a".
class VariableExprAST : public ExprAST {
std::string Name;
public:
VariableExprAST(const std::string &name) : Name(name) {}
- virtual ~VariableExprAST();
};
-VariableExprAST::~VariableExprAST() {}
-
/// BinaryExprAST - Expression class for a binary operator.
class BinaryExprAST : public ExprAST {
public:
BinaryExprAST(char op, ExprAST *lhs, ExprAST *rhs) {}
- virtual ~BinaryExprAST();
};
-BinaryExprAST::~BinaryExprAST() {}
-
/// CallExprAST - Expression class for function calls.
class CallExprAST : public ExprAST {
std::string Callee;
public:
CallExprAST(const std::string &callee, std::vector<ExprAST*> &args)
: Callee(callee), Args(args) {}
- virtual ~CallExprAST();
};
-CallExprAST::~CallExprAST() {}
-
/// PrototypeAST - This class represents the "prototype" for a function,
/// which captures its name, and its argument names (thus implicitly the number
/// of arguments the function takes).
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
- virtual ~ExprAST();
+ virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
-ExprAST::~ExprAST() {}
-
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
- virtual ~ExprAST();
+ virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
-ExprAST::~ExprAST() {}
-
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
- virtual ~ExprAST();
+ virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
-ExprAST::~ExprAST() {}
-
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
- virtual ~ExprAST();
+ virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
-ExprAST::~ExprAST() {}
-
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
- virtual ~ExprAST();
+ virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
-ExprAST::~ExprAST() {}
-
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;
class MachineRegisterInfo {
public:
class Delegate {
- virtual void anchor();
public:
- virtual void MRI_NoteNewVirtualRegister(unsigned Reg) = 0;
+ virtual void MRI_NoteNewVirtualRegister(unsigned Reg) {}
virtual ~Delegate() {}
};
/// Initialization sequence:
/// initPolicy -> shouldTrackPressure -> initialize(DAG) -> registerRoots
class MachineSchedStrategy {
- virtual void anchor();
public:
virtual ~MachineSchedStrategy() {}
/// Mutate the DAG as a postpass after normal DAG building.
class ScheduleDAGMutation {
- virtual void anchor();
public:
virtual ~ScheduleDAGMutation() {}
public:
ObjectBuffer() {}
ObjectBuffer(MemoryBuffer* Buf) : Buffer(Buf) {}
+ virtual ~ObjectBuffer() {}
/// getMemBuffer - Like MemoryBuffer::getMemBuffer() this function
/// returns a pointer to an object that is owned by the caller. However,
class ObjectBufferStream : public ObjectBuffer {
public:
ObjectBufferStream() : OS(SV) {}
+ virtual ~ObjectBufferStream() {}
raw_ostream &getOStream() { return OS; }
void flush()
/// ExecutionEngine for the purpose of avoiding compilation for Modules that
/// have already been compiled and an object file is available.
class ObjectCache {
- virtual void anchor();
public:
ObjectCache() { }
class ObjectImage {
ObjectImage() LLVM_DELETED_FUNCTION;
ObjectImage(const ObjectImage &other) LLVM_DELETED_FUNCTION;
- virtual void anchor();
protected:
OwningPtr<ObjectBuffer> Buffer;
/// \brief Represents a contiguous range of either instructions (a TextAtom)
/// or data (a DataAtom). Address ranges are expressed as _closed_ intervals.
class MCAtom {
- virtual void anchor();
public:
virtual ~MCAtom() {}
// FIXME: declared here because it is used from
// lib/CodeGen/AsmPrinter/ARMException.cpp.
class ARMTargetStreamer : public MCTargetStreamer {
- virtual void anchor();
public:
virtual void emitFnStart() = 0;
virtual void emitFnEnd() = 0;
class MCWinCOFFObjectTargetWriter {
const unsigned Machine;
- virtual void anchor();
-
protected:
MCWinCOFFObjectTargetWriter(unsigned Machine_);
struct GenericOptionValue {
virtual ~GenericOptionValue() {}
virtual bool compare(const GenericOptionValue &V) const = 0;
-
-private:
- virtual void anchor();
};
template<class DataType> struct OptionValue;
/// \brief Saves strings in the inheritor's stable storage and returns a stable
/// raw character pointer.
class StringSaver {
- virtual void anchor();
public:
virtual const char *SaveString(const char *Str) = 0;
virtual ~StringSaver() {}; // Pacify -Wnon-virtual-dtor.
/// rearrange itself when the pointer changes). Unlike ValueHandleBase, this
/// class has a vtable and a virtual destructor.
class CallbackVH : public ValueHandleBase {
- virtual void anchor();
protected:
CallbackVH(const CallbackVH &RHS)
: ValueHandleBase(Callback, RHS) {}
///
/// All implementations must remove the reference from this object to the
/// Value that's being destroyed.
- virtual void deleted() { setValPtr(NULL); }
+ virtual void deleted();
/// Called when this->getValPtr()->replaceAllUsesWith(new_value) is called,
/// _before_ any of the uses have actually been replaced. If WeakVH were
/// implemented as a CallbackVH, it would use this method to call
/// setValPtr(new_value). AssertingVH would do nothing in this method.
- virtual void allUsesReplacedWith(Value *) {}
+ virtual void allUsesReplacedWith(Value *);
};
} // End llvm namespace
/// @brief Abstract base class for all Nodes.
class Node {
- virtual void anchor();
public:
enum NodeKind {
NK_Null,
/// Example:
/// !!null null
class NullNode : public Node {
- virtual void anchor();
public:
NullNode(OwningPtr<Document> &D)
: Node(NK_Null, D, StringRef(), StringRef()) {}
/// Example:
/// Adena
class ScalarNode : public Node {
- virtual void anchor();
public:
ScalarNode(OwningPtr<Document> &D, StringRef Anchor, StringRef Tag,
StringRef Val)
/// Example:
/// Section: .text
class KeyValueNode : public Node {
- virtual void anchor();
public:
KeyValueNode(OwningPtr<Document> &D)
: Node(NK_KeyValue, D, StringRef(), StringRef())
/// Name: _main
/// Scope: Global
class MappingNode : public Node {
- virtual void anchor();
public:
enum MappingType {
MT_Block,
/// - Hello
/// - World
class SequenceNode : public Node {
- virtual void anchor();
public:
enum SequenceType {
ST_Block,
/// Example:
/// *AnchorName
class AliasNode : public Node {
- virtual void anchor();
public:
AliasNode(OwningPtr<Document> &D, StringRef Val)
: Node(NK_Alias, D, StringRef(), StringRef()), Name(Val) {}
virtual bool canElideEmptySequence();
class HNode {
- virtual void anchor();
public:
HNode(Node *n) : _node(n) { }
virtual ~HNode() { }
};
class EmptyHNode : public HNode {
- virtual void anchor();
public:
EmptyHNode(Node *n) : HNode(n) { }
+ virtual ~EmptyHNode() {}
static inline bool classof(const HNode *n) {
return NullNode::classof(n->_node);
}
};
class ScalarHNode : public HNode {
- virtual void anchor();
public:
ScalarHNode(Node *n, StringRef s) : HNode(n), _value(s) { }
+ virtual ~ScalarHNode() { }
StringRef value() const { return _value; }
};
class MapHNode : public HNode {
- virtual void anchor();
public:
MapHNode(Node *n) : HNode(n) { }
virtual ~MapHNode();
};
class SequenceHNode : public HNode {
- virtual void anchor();
public:
SequenceHNode(Node *n) : HNode(n) { }
virtual ~SequenceHNode();
using namespace llvm;
-// pin vtable to this file
-void MachineRegisterInfo::Delegate::anchor() {}
-
MachineRegisterInfo::MachineRegisterInfo(const TargetMachine &TM)
: TM(TM), TheDelegate(0), IsSSA(true), TracksLiveness(true) {
VRegInfo.reserve(256);
// DAG subtrees must have at least this many nodes.
static const unsigned MinSubtreeSize = 8;
-// pin vtable to this file
-void MachineSchedStrategy::anchor() {}
-void ScheduleDAGMutation::anchor() {}
-
//===----------------------------------------------------------------------===//
// Machine Instruction Scheduling Pass and Registry
//===----------------------------------------------------------------------===//
// RegAllocBase Implementation
//===----------------------------------------------------------------------===//
-// pin vtable to this file
-void RegAllocBase::anchor() {}
-
void RegAllocBase::init(VirtRegMap &vrm,
LiveIntervals &lis,
LiveRegMatrix &mat) {
/// live range splitting. They must also override enqueue/dequeue to provide an
/// assignment order.
class RegAllocBase {
- virtual void anchor();
protected:
const TargetRegisterInfo *TRI;
MachineRegisterInfo *MRI;
#define DEBUG_TYPE "jit"
#include "llvm/ExecutionEngine/ExecutionEngine.h"
#include "llvm/ExecutionEngine/JITMemoryManager.h"
-#include "llvm/ExecutionEngine/ObjectCache.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ExecutionEngine/GenericValue.h"
STATISTIC(NumInitBytes, "Number of bytes of global vars initialized");
STATISTIC(NumGlobals , "Number of global vars initialized");
-// pin vtable to this file
-void ObjectCache::anchor() {}
-
ExecutionEngine *(*ExecutionEngine::JITCtor)(
Module *M,
std::string *ErrorStr,
/// Global access point for the JIT debugging interface.
class JITRegistrar {
- virtual void anchor();
public:
/// Instantiates the JIT service.
JITRegistrar() {}
class ObjectImageCommon : public ObjectImage {
ObjectImageCommon(); // = delete
ObjectImageCommon(const ObjectImageCommon &other); // = delete
- virtual void anchor();
protected:
object::ObjectFile *ObjFile;
#define DEBUG_TYPE "dyld"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
-#include "JITRegistrar.h"
#include "ObjectImageCommon.h"
#include "RuntimeDyldELF.h"
#include "RuntimeDyldImpl.h"
// Empty out-of-line virtual destructor as the key function.
RuntimeDyldImpl::~RuntimeDyldImpl() {}
-// pin JITRegistrar.h and ObjectImage*.h vtables to this file
-void JITRegistrar::anchor() {}
-void ObjectImage::anchor() {}
-void ObjectImageCommon::anchor() {}
-
namespace llvm {
void RuntimeDyldImpl::registerEHFrames() {
AttributeImpl(AttrEntryKind KindID) : KindID(KindID) {}
public:
+ virtual ~AttributeImpl();
+
bool isEnumAttribute() const { return KindID == EnumAttrEntry; }
bool isAlignAttribute() const { return KindID == AlignAttrEntry; }
bool isStringAttribute() const { return KindID == StringAttrEntry; }
// AttributeImpl Definition
//===----------------------------------------------------------------------===//
+AttributeImpl::~AttributeImpl() {}
+
bool AttributeImpl::hasAttribute(Attribute::AttrKind A) const {
if (isStringAttribute()) return false;
return getKindAsEnum() == A;
public:
MDNodeOperand(Value *V) : CallbackVH(V) {}
- virtual ~MDNodeOperand();
+ ~MDNodeOperand() {}
void set(Value *V) {
unsigned IsFirst = this->getValPtrInt();
};
} // end namespace llvm.
-MDNodeOperand::~MDNodeOperand() {}
-
void MDNodeOperand::deleted() {
getParent()->replaceOperand(this, 0);
#endif
}
-// pin vtable to this file
-void CallbackVH::anchor() {}
+// Default implementation for CallbackVH.
+void CallbackVH::allUsesReplacedWith(Value *) {}
+
+void CallbackVH::deleted() {
+ setValPtr(NULL);
+}
using namespace llvm;
-// pin vtable to this file
-void MCAtom::anchor() {}
-
void MCAtom::remap(uint64_t NewBegin, uint64_t NewEnd) {
Parent->remap(this, NewBegin, NewEnd);
}
#include <cstdlib>
using namespace llvm;
-// pin vtables to this file
MCTargetStreamer::~MCTargetStreamer() {}
-void ARMTargetStreamer::anchor() {}
MCStreamer::MCStreamer(MCContext &Ctx, MCTargetStreamer *TargetStreamer)
: Context(Ctx), TargetStreamer(TargetStreamer), EmitEHFrame(true),
symbol_map SymbolMap;
WinCOFFObjectWriter(MCWinCOFFObjectTargetWriter *MOTW, raw_ostream &OS);
- virtual ~WinCOFFObjectWriter();
+ ~WinCOFFObjectWriter();
COFFSymbol *createSymbol(StringRef Name);
COFFSymbol *GetOrCreateCOFFSymbol(const MCSymbol * Symbol);
Machine(Machine_) {
}
-// pin vtable to this file
-void MCWinCOFFObjectTargetWriter::anchor() {}
-
//------------------------------------------------------------------------------
// WinCOFFObjectWriter factory function
TEMPLATE_INSTANTIATION(class opt<bool>);
} } // end namespace llvm::cl
-void GenericOptionValue::anchor() {}
void OptionValue<boolOrDefault>::anchor() {}
void OptionValue<std::string>::anchor() {}
void Option::anchor() {}
void parser<float>::anchor() {}
void parser<std::string>::anchor() {}
void parser<char>::anchor() {}
-void StringSaver::anchor() {}
//===----------------------------------------------------------------------===//
#include "llvm/ADT/Twine.h"
#include "llvm/Config/config.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/Signals.h"
#include "llvm/Support/Threading.h"
#include "llvm/Support/raw_ostream.h"
void LLVMResetFatalErrorHandler() {
remove_fatal_error_handler();
}
-
namespace llvm {
namespace yaml {
-/// pin the vtables to this file
-void Node::anchor() {}
-void NullNode::anchor() {}
-void ScalarNode::anchor() {}
-void KeyValueNode::anchor() {}
-void MappingNode::anchor() {}
-void SequenceNode::anchor() {}
-void AliasNode::anchor() {}
-
/// Token - A single YAML token.
struct Token : ilist_node<Token> {
enum TokenKind {
SrcMgr.setDiagHandler(Handler, Ctxt);
}
-/// pin the vtables to this file
-void Input::HNode::anchor() {}
-void Input::EmptyHNode::anchor() {}
-void Input::ScalarHNode::anchor() {}
-void Input::MapHNode::anchor() {}
-void Input::SequenceHNode::anchor() {}
-
bool Input::outputting() const {
return false;
}
#include <algorithm>
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "AArch64GenInstrInfo.inc"
using namespace llvm;
using namespace llvm;
-// pin vtable to this file
-void AArch64Subtarget::anchor() {}
-
AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS)
: AArch64GenSubtargetInfo(TT, CPU, FS), HasFPARMv8(false), HasNEON(false),
HasCrypto(false), TargetTriple(TT), CPUString(CPU) {
class GlobalValue;
class AArch64Subtarget : public AArch64GenSubtargetInfo {
- virtual void anchor();
protected:
bool HasFPARMv8;
bool HasNEON;
// Exceptions handling
ExceptionsType = ExceptionHandling::DwarfCFI;
}
-
-void AArch64ELFMCAsmInfo::anchor() {}
namespace llvm {
-struct AArch64ELFMCAsmInfo : public MCAsmInfoELF {
- explicit AArch64ELFMCAsmInfo();
-
-private:
- virtual void anchor();
-};
+ struct AArch64ELFMCAsmInfo : public MCAsmInfoELF {
+ explicit AArch64ELFMCAsmInfo();
+ };
} // namespace llvm
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "ARMGenInstrInfo.inc"
using namespace llvm;
HexagonFrameLowering.cpp
HexagonHardwareLoops.cpp
HexagonFixupHwLoops.cpp
- HexagonMachineFunctionInfo.cpp
HexagonMachineScheduler.cpp
HexagonMCInstLower.cpp
HexagonInstrInfo.cpp
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#define GET_INSTRMAP_INFO
#include "HexagonGenInstrInfo.inc"
#include "HexagonGenDFAPacketizer.inc"
const int Hexagon_MEMB_AUTOINC_MAX = 7;
const int Hexagon_MEMB_AUTOINC_MIN = -8;
-// pin vtable to this file
-void HexagonInstrInfo::anchor() {}
HexagonInstrInfo::HexagonInstrInfo(HexagonSubtarget &ST)
: HexagonGenInstrInfo(Hexagon::ADJCALLSTACKDOWN, Hexagon::ADJCALLSTACKUP),
const HexagonSubtarget &Subtarget;
typedef unsigned Opcode_t;
- virtual void anchor();
-
public:
explicit HexagonInstrInfo(HexagonSubtarget &ST);
+++ /dev/null
-//= HexagonMachineFunctionInfo.cpp - Hexagon machine function info *- C++ -*-=//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "HexagonMachineFunctionInfo.h"
-
-using namespace llvm;
-
-// pin vtable to this file
-void HexagonMachineFunctionInfo::anchor() {}
-
-//=- HexagonMachineFunctionInfo.h - Hexagon machine function info -*- C++ -*-=//
+//=- HexagonMachineFuctionInfo.h - Hexagon machine function info --*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
#ifndef HexagonMACHINEFUNCTIONINFO_H
#define HexagonMACHINEFUNCTIONINFO_H
-#include <map>
#include "llvm/CodeGen/MachineFunction.h"
namespace llvm {
std::map<const MachineInstr*, unsigned> PacketInfo;
- virtual void anchor();
public:
HexagonMachineFunctionInfo() : SRetReturnReg(0), HasClobberLR(0),
ModeIEEERndNear = false;
}
-HexagonSubtarget::~HexagonSubtarget() {}
public:
HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS);
- virtual ~HexagonSubtarget();
/// getInstrItins - Return the instruction itineraies based on subtarget
/// selection.
using namespace llvm;
-// pin vtable to this file
-void HexagonMCAsmInfo::anchor() {}
-
HexagonMCAsmInfo::HexagonMCAsmInfo(StringRef TT) {
Data16bitsDirective = "\t.half\t";
Data32bitsDirective = "\t.word\t";
namespace llvm {
class HexagonMCAsmInfo : public MCAsmInfoELF {
- virtual void anchor();
public:
explicit HexagonMCAsmInfo(StringRef TT);
};
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "MSP430GenInstrInfo.inc"
using namespace llvm;
-// pin vtable to this file
-void MSP430InstrInfo::anchor() {}
-
MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
: MSP430GenInstrInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP),
RI(tm) {}
class MSP430InstrInfo : public MSP430GenInstrInfo {
const MSP430RegisterInfo RI;
- virtual void anchor();
public:
explicit MSP430InstrInfo(MSP430TargetMachine &TM);
static cl::opt<bool> PrintHackDirectives("print-hack-directives",
cl::init(false), cl::Hidden);
-// pin vtable to this file
-void MipsTargetStreamer::anchor() {}
-
static std::string ParseMipsTriple(StringRef TT, StringRef CPU) {
std::string MipsArchFeature;
size_t DashPosition = 0;
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "MipsGenInstrInfo.inc"
using namespace llvm;
-// pin vtable to this file
-void MipsInstrInfo::anchor() {}
-
MipsInstrInfo::MipsInstrInfo(MipsTargetMachine &tm, unsigned UncondBr)
: MipsGenInstrInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
TM(tm), UncondBrOpc(UncondBr) {}
namespace llvm {
class MipsInstrInfo : public MipsGenInstrInfo {
- virtual void anchor();
protected:
MipsTargetMachine &TM;
unsigned UncondBrOpc;
namespace llvm {
class MipsTargetStreamer : public MCTargetStreamer {
- virtual void anchor();
public:
virtual void emitMipsHackELFFlags(unsigned Flags) = 0;
virtual void emitMipsHackSTOCG(MCSymbol *Sym, unsigned Val) = 0;
return;
}
}
-
-// pin NVPTXSection.h and NVPTXTargetObjectFile.h vtables to this file
-void NVPTXSection::anchor() {}
-
-NVPTXTargetObjectFile::~NVPTXTargetObjectFile() {
- delete TextSection;
- delete DataSection;
- delete BSSSection;
- delete ReadOnlySection;
-
- delete StaticCtorSection;
- delete StaticDtorSection;
- delete LSDASection;
- delete EHFrameSection;
- delete DwarfAbbrevSection;
- delete DwarfInfoSection;
- delete DwarfLineSection;
- delete DwarfFrameSection;
- delete DwarfPubTypesSection;
- delete DwarfDebugInlineSection;
- delete DwarfStrSection;
- delete DwarfLocSection;
- delete DwarfARangesSection;
- delete DwarfRangesSection;
- delete DwarfMacroInfoSection;
-}
#include "NVPTX.h"
#include "NVPTXInstrInfo.h"
#include "NVPTXTargetMachine.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "NVPTXGenInstrInfo.inc"
#include "llvm/IR/Function.h"
#include "llvm/ADT/STLExtras.h"
using namespace llvm;
-// pin vtable to this file
-void NVPTXInstrInfo::anchor() {}
-
// FIXME: Add the subtarget support on this constructor.
NVPTXInstrInfo::NVPTXInstrInfo(NVPTXTargetMachine &tm)
: NVPTXGenInstrInfo(), TM(tm), RegInfo(*TM.getSubtargetImpl()) {}
class NVPTXInstrInfo : public NVPTXGenInstrInfo {
NVPTXTargetMachine &TM;
const NVPTXRegisterInfo RegInfo;
- virtual void anchor();
public:
explicit NVPTXInstrInfo(NVPTXTargetMachine &TM);
/// the ASMPrint interface.
///
class NVPTXSection : public MCSection {
- virtual void anchor();
+
public:
NVPTXSection(SectionVariant V, SectionKind K) : MCSection(V, K) {}
- virtual ~NVPTXSection() {}
+ ~NVPTXSection() {}
/// Override this as NVPTX has its own way of printing switching
/// to a section.
using namespace llvm;
-// pin vtable to this file
-void NVPTXSubtarget::anchor() {}
-
NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
: NVPTXGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit), PTXVersion(0),
// SM version x.y is represented as 10*x+y, e.g. 3.1 == 31
unsigned int SmVersion;
- virtual void anchor();
-
public:
/// This constructor initializes the data members to match that
/// of the specified module.
DwarfMacroInfoSection = 0;
}
- virtual ~NVPTXTargetObjectFile();
+ ~NVPTXTargetObjectFile() {
+ delete TextSection;
+ delete DataSection;
+ delete BSSSection;
+ delete ReadOnlySection;
+
+ delete StaticCtorSection;
+ delete StaticDtorSection;
+ delete LSDASection;
+ delete EHFrameSection;
+ delete DwarfAbbrevSection;
+ delete DwarfInfoSection;
+ delete DwarfLineSection;
+ delete DwarfFrameSection;
+ delete DwarfPubTypesSection;
+ delete DwarfDebugInlineSection;
+ delete DwarfStrSection;
+ delete DwarfLocSection;
+ delete DwarfARangesSection;
+ delete DwarfRangesSection;
+ delete DwarfMacroInfoSection;
+ }
virtual void Initialize(MCContext &ctx, const TargetMachine &TM) {
TargetLoweringObjectFile::Initialize(ctx, TM);
using namespace llvm;
-// pin vtable to this file
-PPCTargetStreamer::~PPCTargetStreamer() {}
-
static MCInstrInfo *createPPCMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitPPCMCInstrInfo(X);
#include "llvm/Support/raw_ostream.h"
#define GET_INSTRMAP_INFO
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "PPCGenInstrInfo.inc"
using namespace llvm;
static cl::opt<bool> DisableCmpOpt("disable-ppc-cmp-opt",
cl::desc("Disable compare instruction optimization"), cl::Hidden);
-//pin vtable to this file
-void PPCInstrInfo::anchor() {}
-
PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
: PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP),
TM(tm), RI(*TM.getSubtargetImpl()) {}
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs,
bool &NonRI, bool &SpillsVRS) const;
- virtual void anchor();
public:
explicit PPCInstrInfo(PPCTargetMachine &TM);
namespace llvm {
class PPCTargetStreamer : public MCTargetStreamer {
public:
- virtual ~PPCTargetStreamer();
virtual void emitTCEntry(const MCSymbol &S) = 0;
};
}
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#define GET_INSTRINFO_NAMED_OPS
#define GET_INSTRMAP_INFO
#include "AMDGPUGenInstrInfo.inc"
using namespace llvm;
-
-// pin vtable to this file
-void AMDGPUInstrInfo::anchor() {}
-
AMDGPUInstrInfo::AMDGPUInstrInfo(TargetMachine &tm)
: AMDGPUGenInstrInfo(-1,-1), RI(tm), TM(tm) { }
const AMDGPURegisterInfo RI;
bool getNextBranchInstr(MachineBasicBlock::iterator &iter,
MachineBasicBlock &MBB) const;
- virtual void anchor();
protected:
TargetMachine &TM;
public:
static const char *const ShaderTypeAttribute = "ShaderType";
-// pin vtable to this file
-void AMDGPUMachineFunction::anchor() {}
-
AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
MachineFunctionInfo() {
ShaderType = ShaderType::COMPUTE;
namespace llvm {
class AMDGPUMachineFunction : public MachineFunctionInfo {
- virtual void anchor();
public:
AMDGPUMachineFunction(const MachineFunction &MF);
unsigned ShaderType;
+++ /dev/null
-//===-- AMDGPUCodeEmitter.cpp - AMDGPU Code Emitter interface -------------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief CodeEmitter interface for R600 and SI codegen.
-//
-//===----------------------------------------------------------------------===//
-
-#include "AMDGPUMCCodeEmitter.h"
-
-using namespace llvm;
-
-// pin vtable to this file
-void AMDGPUMCCodeEmitter::anchor() {}
-
class MCOperand;
class AMDGPUMCCodeEmitter : public MCCodeEmitter {
- virtual void anchor();
public:
uint64_t getBinaryCodeForInstr(const MCInst &MI,
add_llvm_library(LLVMR600Desc
AMDGPUAsmBackend.cpp
AMDGPUELFObjectWriter.cpp
- AMDGPUMCCodeEmitter.cpp
AMDGPUMCTargetDesc.cpp
AMDGPUMCAsmInfo.cpp
R600MCCodeEmitter.cpp
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "AMDGPUGenDFAPacketizer.inc"
using namespace llvm;
using namespace llvm;
-
-// pin vtable to this file
-void R600MachineFunctionInfo::anchor() {}
-
R600MachineFunctionInfo::R600MachineFunctionInfo(const MachineFunction &MF)
: AMDGPUMachineFunction(MF) { }
+
+
namespace llvm {
class R600MachineFunctionInfo : public AMDGPUMachineFunction {
- virtual void anchor();
public:
R600MachineFunctionInfo(const MachineFunction &MF);
SmallVector<unsigned, 4> LiveOuts;
using namespace llvm;
-
-// pin vtable to this file
-void SIMachineFunctionInfo::anchor() {}
-
SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
: AMDGPUMachineFunction(MF),
PSInputAddr(0) { }
/// This class keeps track of the SPI_SP_INPUT_ADDR config register, which
/// tells the hardware which interpolation parameters to load.
class SIMachineFunctionInfo : public AMDGPUMachineFunction {
- virtual void anchor();
public:
SIMachineFunctionInfo(const MachineFunction &MF);
unsigned PSInputAddr;
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "SparcGenInstrInfo.inc"
using namespace llvm;
-
-// pin vtable to this file
-void SparcInstrInfo::anchor() {}
-
SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST)
: SparcGenInstrInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP),
RI(ST), Subtarget(ST) {
class SparcInstrInfo : public SparcGenInstrInfo {
const SparcRegisterInfo RI;
const SparcSubtarget& Subtarget;
- virtual void anchor();
public:
explicit SparcInstrInfo(SparcSubtarget &ST);
SystemZISelLowering.cpp
SystemZInstrInfo.cpp
SystemZLongBranch.cpp
- SystemZMachineFunctionInfo.cpp
SystemZMCInstLower.cpp
SystemZRegisterInfo.cpp
SystemZSelectionDAGInfo.cpp
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#define GET_INSTRMAP_INFO
#include "SystemZGenInstrInfo.inc"
return false;
}
-// pin vtable to this file
-void SystemZInstrInfo::anchor() {}
-
SystemZInstrInfo::SystemZInstrInfo(SystemZTargetMachine &tm)
: SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
RI(tm), TM(tm) {
void emitGRX32Move(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
DebugLoc DL, unsigned DestReg, unsigned SrcReg,
unsigned LowLowOpcode, unsigned Size, bool KillSrc) const;
- virtual void anchor();
public:
explicit SystemZInstrInfo(SystemZTargetMachine &TM);
+++ /dev/null
-//== SystemZMachineFuctionInfo.cpp - SystemZ machine function info-*- C++ -*-=//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "SystemZMachineFunctionInfo.h"
-
-using namespace llvm;
-
-
-// pin vtable to this file
-void SystemZMachineFunctionInfo::anchor() {}
-
unsigned RegSaveFrameIndex;
bool ManipulatesSP;
- virtual void anchor();
-
public:
explicit SystemZMachineFunctionInfo(MachineFunction &MF)
: LowSavedGPR(0), HighSavedGPR(0), VarArgsFirstGPR(0), VarArgsFirstFPR(0),
using namespace llvm;
-// pin vtabel to this file
-void SystemZSubtarget::anchor() {}
-
SystemZSubtarget::SystemZSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS)
class StringRef;
class SystemZSubtarget : public SystemZGenSubtargetInfo {
- virtual void anchor();
protected:
bool HasDistinctOps;
bool HasLoadStoreOnCond;
public:
X86WinCOFFObjectWriter(bool Is64Bit_);
- virtual ~X86WinCOFFObjectWriter();
+ ~X86WinCOFFObjectWriter();
virtual unsigned getRelocType(const MCValue &Target,
const MCFixup &Fixup,
#include "llvm/Target/TargetOptions.h"
#include <limits>
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "X86GenInstrInfo.inc"
using namespace llvm;
uint16_t Flags;
};
-// pin vtable to this file
-void X86InstrInfo::anchor() {}
-
X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
: X86GenInstrInfo((tm.getSubtarget<X86Subtarget>().is64Bit()
? X86::ADJCALLSTACKDOWN64
MemOp2RegOpTableType &M2RTable,
unsigned RegOp, unsigned MemOp, unsigned Flags);
- virtual void anchor();
-
public:
explicit X86InstrInfo(X86TargetMachine &tm);
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
-#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRINFO_CTOR
#include "XCoreGenInstrInfo.inc"
namespace llvm {
using namespace llvm;
-
-// pin vtable to this file
-void XCoreInstrInfo::anchor() {}
-
XCoreInstrInfo::XCoreInstrInfo()
: XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP),
RI() {
class XCoreInstrInfo : public XCoreGenInstrInfo {
const XCoreRegisterInfo RI;
- virtual void anchor();
public:
XCoreInstrInfo();
BB(Block),PT(PT),Ran(R),Context(BB->getContext()) {}
/// virtual D'tor to silence warnings.
- virtual ~Modifier();
+ virtual ~Modifier() {}
/// Add a new instruction.
virtual void Act() = 0;
LLVMContext &Context;
};
-Modifier::~Modifier() {}
-
struct LoadModifier: public Modifier {
LoadModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
- virtual ~LoadModifier();
virtual void Act() {
// Try to use predefined pointers. If non exist, use undef pointer value;
Value *Ptr = getRandomPointerValue();
}
};
-LoadModifier::~LoadModifier() {}
-
struct StoreModifier: public Modifier {
StoreModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
- virtual ~StoreModifier();
virtual void Act() {
// Try to use predefined pointers. If non exist, use undef pointer value;
Value *Ptr = getRandomPointerValue();
}
};
-StoreModifier::~StoreModifier() {}
-
struct BinModifier: public Modifier {
BinModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
- virtual ~BinModifier();
virtual void Act() {
Value *Val0 = getRandomVal();
}
};
-BinModifier::~BinModifier() {}
-
/// Generate constant values.
struct ConstModifier: public Modifier {
ConstModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
- virtual ~ConstModifier();
-
virtual void Act() {
Type *Ty = pickType();
}
};
-ConstModifier::~ConstModifier() {}
-
struct AllocaModifier: public Modifier {
AllocaModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R){}
- virtual ~AllocaModifier();
virtual void Act() {
Type *Tp = pickType();
}
};
-AllocaModifier::~AllocaModifier() {}
-
struct ExtractElementModifier: public Modifier {
ExtractElementModifier(BasicBlock *BB, PieceTable *PT, Random *R):
Modifier(BB, PT, R) {}
- virtual ~ExtractElementModifier();
virtual void Act() {
Value *Val0 = getRandomVectorValue();
}
};
-ExtractElementModifier::~ExtractElementModifier() {}
-
struct ShuffModifier: public Modifier {
ShuffModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
- virtual ~ShuffModifier();
-
virtual void Act() {
Value *Val0 = getRandomVectorValue();
}
};
-ShuffModifier::~ShuffModifier() {}
-
struct InsertElementModifier: public Modifier {
InsertElementModifier(BasicBlock *BB, PieceTable *PT, Random *R):
Modifier(BB, PT, R) {}
- virtual ~InsertElementModifier();
virtual void Act() {
Value *Val0 = getRandomVectorValue();
};
-InsertElementModifier::~InsertElementModifier() {}
-
struct CastModifier: public Modifier {
CastModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
- virtual ~CastModifier();
-
virtual void Act() {
Value *V = getRandomVal();
};
-CastModifier::~CastModifier() {}
-
struct SelectModifier: public Modifier {
SelectModifier(BasicBlock *BB, PieceTable *PT, Random *R):
Modifier(BB, PT, R) {}
- virtual ~SelectModifier();
virtual void Act() {
// Try a bunch of different select configuration until a valid one is found.
}
};
-SelectModifier::~SelectModifier() {}
struct CmpModifier: public Modifier {
CmpModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
- virtual ~CmpModifier();
-
virtual void Act() {
Value *Val0 = getRandomVal();
}
};
-CmpModifier::~CmpModifier() {}
-
void FillFunction(Function *F, Random &R) {
// Create a legal entry block.
BasicBlock *BB = BasicBlock::Create(F->getContext(), "BB", F);
namespace llvm {
struct VirtualRefCounted : public RefCountedBaseVPTR {
- virtual void f();
+ virtual void f() {}
};
-void VirtualRefCounted::f() {}
-
// Run this test with valgrind to detect memory leaks.
TEST(IntrusiveRefCntPtr, RefCountedBaseVPTRCopyDoesNotLeak) {
VirtualRefCounted *V1 = new VirtualRefCounted;
UnsupportedOSs.push_back(Triple::Cygwin);
}
- virtual void SetUp();
-
+ virtual void SetUp() {
+ didCallAllocateCodeSection = false;
+ Module = 0;
+ Function = 0;
+ Engine = 0;
+ Error = 0;
+ }
+
virtual void TearDown() {
if (Engine)
LLVMDisposeExecutionEngine(Engine);
char *Error;
};
-void MCJITCAPITest::SetUp() {
- didCallAllocateCodeSection = false;
- Module = 0;
- Function = 0;
- Engine = 0;
- Error = 0;
-}
-
TEST_F(MCJITCAPITest, simple_function) {
SKIP_UNSUPPORTED_PLATFORM;
using namespace llvm;
-class MCJITMultipleModuleTest : public testing::Test,
- public MCJITTestBase {
-public:
- virtual ~MCJITMultipleModuleTest();
-};
-
-MCJITMultipleModuleTest::~MCJITMultipleModuleTest() {}
+class MCJITMultipleModuleTest : public testing::Test, public MCJITTestBase {};
namespace {
class MCJITTest : public testing::Test, public MCJITTestBase {
protected:
- virtual void SetUp();
+ virtual void SetUp() {
+ M.reset(createEmptyModule("<main>"));
+ }
};
-void MCJITTest::SetUp() {
- M.reset(createEmptyModule("<main>"));
-}
-
namespace {
// FIXME: Ensure creating an execution engine does not crash when constructed
// (instrs a, b, ...) Evaluate and union all arguments. Identical to AddOp.
struct InstrsOp : public SetTheory::Operator {
- virtual void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
- ArrayRef<SMLoc> Loc);
+ void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
+ ArrayRef<SMLoc> Loc) {
+ ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts, Loc);
+ }
};
-void InstrsOp::apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
- ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts, Loc);
-}
-
// (instregex "OpcPat",...) Find all instructions matching an opcode pattern.
//
// TODO: Since this is a prefix match, perform a binary search over the
const CodeGenTarget &Target;
InstRegexOp(const CodeGenTarget &t): Target(t) {}
- virtual void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
- ArrayRef<SMLoc> Loc);
-};
-
-void InstRegexOp::apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
- SmallVector<Regex*, 4> RegexList;
- for (DagInit::const_arg_iterator
- AI = Expr->arg_begin(), AE = Expr->arg_end(); AI != AE; ++AI) {
- StringInit *SI = dyn_cast<StringInit>(*AI);
- if (!SI)
- PrintFatalError(Loc, "instregex requires pattern string: "
- + Expr->getAsString());
- std::string pat = SI->getValue();
- // Implement a python-style prefix match.
- if (pat[0] != '^') {
- pat.insert(0, "^(");
- pat.insert(pat.end(), ')');
- }
- RegexList.push_back(new Regex(pat));
- }
- for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
- E = Target.inst_end(); I != E; ++I) {
- for (SmallVectorImpl<Regex*>::iterator
- RI = RegexList.begin(), RE = RegexList.end(); RI != RE; ++RI) {
- if ((*RI)->match((*I)->TheDef->getName()))
- Elts.insert((*I)->TheDef);
+ void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
+ ArrayRef<SMLoc> Loc) {
+ SmallVector<Regex*, 4> RegexList;
+ for (DagInit::const_arg_iterator
+ AI = Expr->arg_begin(), AE = Expr->arg_end(); AI != AE; ++AI) {
+ StringInit *SI = dyn_cast<StringInit>(*AI);
+ if (!SI)
+ PrintFatalError(Loc, "instregex requires pattern string: "
+ + Expr->getAsString());
+ std::string pat = SI->getValue();
+ // Implement a python-style prefix match.
+ if (pat[0] != '^') {
+ pat.insert(0, "^(");
+ pat.insert(pat.end(), ')');
+ }
+ RegexList.push_back(new Regex(pat));
+ }
+ for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
+ E = Target.inst_end(); I != E; ++I) {
+ for (SmallVectorImpl<Regex*>::iterator
+ RI = RegexList.begin(), RE = RegexList.end(); RI != RE; ++RI) {
+ if ((*RI)->match((*I)->TheDef->getName()))
+ Elts.insert((*I)->TheDef);
+ }
}
+ DeleteContainerPointers(RegexList);
}
- DeleteContainerPointers(RegexList);
-}
+};
/// CodeGenModels ctor interprets machine model records and populates maps.
CodeGenSchedModels::CodeGenSchedModels(RecordKeeper &RK,
OS << "namespace llvm {\n";
OS << "struct " << ClassName << " : public TargetInstrInfo {\n"
<< " explicit " << ClassName << "(int SO = -1, int DO = -1);\n"
- << " virtual ~" << ClassName << "();\n"
<< "};\n";
OS << "} // End llvm namespace \n";
OS << "#endif // GET_INSTRINFO_HEADER\n\n";
- OS << "\n#ifdef GET_INSTRINFO_CTOR_DTOR\n";
- OS << "#undef GET_INSTRINFO_CTOR_DTOR\n";
+ OS << "\n#ifdef GET_INSTRINFO_CTOR\n";
+ OS << "#undef GET_INSTRINFO_CTOR\n";
OS << "namespace llvm {\n";
OS << "extern const MCInstrDesc " << TargetName << "Insts[];\n";
<< " : TargetInstrInfo(SO, DO) {\n"
<< " InitMCInstrInfo(" << TargetName << "Insts, "
<< TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, "
- << NumberedInstructions.size() << ");\n}\n"
- << ClassName << "::~" << ClassName << "() {}\n";
+ << NumberedInstructions.size() << ");\n}\n";
OS << "} // End llvm namespace \n";
- OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n";
+ OS << "#endif // GET_INSTRINFO_CTOR\n\n";
emitOperandNameMappings(OS, Target, NumberedInstructions);
// (add a, b, ...) Evaluate and union all arguments.
struct AddOp : public SetTheory::Operator {
- virtual void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, ArrayRef<SMLoc> Loc) {
ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts, Loc);
}
};
// (sub Add, Sub, ...) Set difference.
struct SubOp : public SetTheory::Operator {
- virtual void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, ArrayRef<SMLoc> Loc) {
if (Expr->arg_size() < 2)
PrintFatalError(Loc, "Set difference needs at least two arguments: " +
Expr->getAsString());
// (and S1, S2) Set intersection.
struct AndOp : public SetTheory::Operator {
- virtual void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, ArrayRef<SMLoc> Loc) {
if (Expr->arg_size() != 2)
PrintFatalError(Loc, "Set intersection requires two arguments: " +
Expr->getAsString());
RecSet &Set, int64_t N,
RecSet &Elts, ArrayRef<SMLoc> Loc) =0;
- virtual void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, ArrayRef<SMLoc> Loc) {
if (Expr->arg_size() != 2)
PrintFatalError(Loc, "Operator requires (Op Set, Int) arguments: " +
Expr->getAsString());
// (shl S, N) Shift left, remove the first N elements.
struct ShlOp : public SetIntBinOp {
- virtual void apply2(SetTheory &ST, DagInit *Expr,
- RecSet &Set, int64_t N,
- RecSet &Elts, ArrayRef<SMLoc> Loc) {
+ void apply2(SetTheory &ST, DagInit *Expr,
+ RecSet &Set, int64_t N,
+ RecSet &Elts, ArrayRef<SMLoc> Loc) {
if (N < 0)
PrintFatalError(Loc, "Positive shift required: " +
Expr->getAsString());
// (trunc S, N) Truncate after the first N elements.
struct TruncOp : public SetIntBinOp {
- virtual void apply2(SetTheory &ST, DagInit *Expr,
- RecSet &Set, int64_t N,
- RecSet &Elts, ArrayRef<SMLoc> Loc) {
+ void apply2(SetTheory &ST, DagInit *Expr,
+ RecSet &Set, int64_t N,
+ RecSet &Elts, ArrayRef<SMLoc> Loc) {
if (N < 0)
PrintFatalError(Loc, "Positive length required: " +
Expr->getAsString());
RotOp(bool Rev) : Reverse(Rev) {}
- virtual void apply2(SetTheory &ST, DagInit *Expr,
- RecSet &Set, int64_t N,
- RecSet &Elts, ArrayRef<SMLoc> Loc) {
+ void apply2(SetTheory &ST, DagInit *Expr,
+ RecSet &Set, int64_t N,
+ RecSet &Elts, ArrayRef<SMLoc> Loc) {
if (Reverse)
N = -N;
// N > 0 -> rotate left, N < 0 -> rotate right.
// (decimate S, N) Pick every N'th element of S.
struct DecimateOp : public SetIntBinOp {
- virtual void apply2(SetTheory &ST, DagInit *Expr,
- RecSet &Set, int64_t N,
- RecSet &Elts, ArrayRef<SMLoc> Loc) {
+ void apply2(SetTheory &ST, DagInit *Expr,
+ RecSet &Set, int64_t N,
+ RecSet &Elts, ArrayRef<SMLoc> Loc) {
if (N <= 0)
PrintFatalError(Loc, "Positive stride required: " +
Expr->getAsString());
// (interleave S1, S2, ...) Interleave elements of the arguments.
struct InterleaveOp : public SetTheory::Operator {
- virtual void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, ArrayRef<SMLoc> Loc) {
// Evaluate the arguments individually.
SmallVector<RecSet, 4> Args(Expr->getNumArgs());
unsigned MaxSize = 0;
// (sequence "Format", From, To) Generate a sequence of records by name.
struct SequenceOp : public SetTheory::Operator {
- virtual void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, ArrayRef<SMLoc> Loc) {
int Step = 1;
if (Expr->arg_size() > 4)
PrintFatalError(Loc, "Bad args to (sequence \"Format\", From, To): " +
FieldExpander(StringRef fn) : FieldName(fn) {}
- virtual void expand(SetTheory &ST, Record *Def, RecSet &Elts) {
+ void expand(SetTheory &ST, Record *Def, RecSet &Elts) {
ST.evaluate(Def->getValueInit(FieldName), Elts, Def->getLoc());
}
};
} // end anonymous namespace
-// pin vtables to this file
-void SetTheory::Operator::anchor() {}
-void SetTheory::Expander::anchor() {}
+void SetTheory::Operator::anchor() { }
+void SetTheory::Expander::anchor() { }
SetTheory::SetTheory() {
addOperator("add", new AddOp);
}
Type(TypeKind K) : Kind(K) {}
virtual unsigned getSizeInBits() const = 0;
- virtual ~Type();
+ virtual ~Type() {}
};
-Type::~Type() {}
-
}
class ExtendedIntegerType : public Type {
public:
explicit ExtendedIntegerType(unsigned bits)
: Type(TK_ExtendedIntegerType), BitWidth(bits) {}
- virtual ~ExtendedIntegerType();
static bool classof(const Type *T) {
return T->getKind() == TK_ExtendedIntegerType;
}
- virtual unsigned getSizeInBits() const {
+ unsigned getSizeInBits() const {
return getBitWidth();
}
unsigned getBitWidth() const {
}
};
-ExtendedIntegerType::~ExtendedIntegerType() {}
-
-
class ExtendedVectorType : public Type {
EVT ElementType;
unsigned NumElements;
public:
ExtendedVectorType(EVT elty, unsigned num)
: Type(TK_ExtendedVectorType), ElementType(elty), NumElements(num) {}
- virtual ~ExtendedVectorType();
static bool classof(const Type *T) {
return T->getKind() == TK_ExtendedVectorType;
}
- virtual unsigned getSizeInBits() const {
+ unsigned getSizeInBits() const {
return getNumElements() * getElementType().getSizeInBits();
}
EVT getElementType() const {
}
};
-ExtendedVectorType::~ExtendedVectorType() {}
-
-
static std::map<unsigned, const Type *>
ExtendedIntegerTypeMap;
static std::map<std::pair<uintptr_t, uintptr_t>, const Type *>
// This interface knows how to report a test part result.
class TestPartResultReporterInterface {
public:
- virtual ~TestPartResultReporterInterface();
+ virtual ~TestPartResultReporterInterface() {}
virtual void ReportTestPartResult(const TestPartResult& result) = 0;
};
class Environment {
public:
// The d'tor is virtual as we need to subclass Environment.
- virtual ~Environment();
+ virtual ~Environment() {}
// Override this to define how to set up the environment.
virtual void SetUp() {}
// the order the corresponding events are fired.
class TestEventListener {
public:
- virtual ~TestEventListener();
+ virtual ~TestEventListener() {}
// Fired before any test activity starts.
virtual void OnTestProgramStart(const UnitTest& unit_test) = 0;
// comments about each method please see the definition of TestEventListener
// above.
class EmptyTestEventListener : public TestEventListener {
- virtual void anchor();
public:
virtual void OnTestProgramStart(const UnitTest& /*unit_test*/) {}
virtual void OnTestIterationStart(const UnitTest& /*unit_test*/,
static bool Create(const char* statement, const RE* regex,
const char* file, int line, DeathTest** test);
DeathTest();
- virtual ~DeathTest();
+ virtual ~DeathTest() { }
// A helper class that aborts a death test when it's deleted.
class ReturnSentinel {
// Factory interface for death tests. May be mocked out for testing.
class DeathTestFactory {
public:
- virtual ~DeathTestFactory();
+ virtual ~DeathTestFactory() { }
virtual bool Create(const char* statement, const RE* regex,
const char* file, int line, DeathTest** test) = 0;
};
#if !GTEST_NO_LLVM_RAW_OSTREAM
namespace llvm {
class convertible_fwd_ostream : public std::ostream {
- virtual void anchor();
raw_os_ostream ros_;
public:
// of a Test object.
class TestFactoryBase {
public:
- virtual ~TestFactoryBase();
+ virtual ~TestFactoryBase() {}
// Creates a test instance to run. The instance is both created and destroyed
// within TestInfoImpl::Run()
// and calls RegisterTests() on each of them when asked.
class ParameterizedTestCaseInfoBase {
public:
- virtual ~ParameterizedTestCaseInfoBase();
+ virtual ~ParameterizedTestCaseInfoBase() {}
// Base part of test case name for display purposes.
virtual const string& GetTestCaseName() const = 0;
// problem.
class ThreadWithParamBase {
public:
- virtual ~ThreadWithParamBase();
+ virtual ~ThreadWithParamBase() {}
virtual void Run() = 0;
};
// ThreadLocalValueHolderBase.
class ThreadLocalValueHolderBase {
public:
- virtual ~ThreadLocalValueHolderBase();
+ virtual ~ThreadLocalValueHolderBase() {}
};
// Called by pthread to delete thread-local data stored by
}
}
-DeathTest::~DeathTest() {}
-
// Creates and returns a death test by dispatching to the current
// death test factory.
bool DeathTest::Create(const char* statement, const RE* regex,
class OsStackTraceGetterInterface {
public:
OsStackTraceGetterInterface() {}
- virtual ~OsStackTraceGetterInterface();
+ virtual ~OsStackTraceGetterInterface() {}
// Returns the current OS stack trace as a String. Parameters:
//
return value == NULL ? default_value : value;
}
-#if GTEST_HAS_PTHREAD
-ThreadWithParamBase::~ThreadWithParamBase() {}
-ThreadLocalValueHolderBase::~ThreadLocalValueHolderBase() {}
-#endif
-TestFactoryBase::~TestFactoryBase() {}
-
} // namespace internal
} // namespace testing
-
-#if !GTEST_NO_LLVM_RAW_OSTREAM
-namespace llvm {
-void convertible_fwd_ostream::anchor() {}
-}
-#endif
internal::InitGoogleTestImpl(argc, argv);
}
-Environment::~Environment() {}
-TestPartResultReporterInterface::~TestPartResultReporterInterface() {}
-TestEventListener::~TestEventListener() {}
-void EmptyTestEventListener::anchor() {}
-namespace internal {
-OsStackTraceGetterInterface::~OsStackTraceGetterInterface() {}
-ParameterizedTestCaseInfoBase::~ParameterizedTestCaseInfoBase() {}
-}
-
} // namespace testing
projects / oota-llvm.git / commitdiff