Try addding datalayout in case that's what Hexagon doesn't like.

Just a wild stab in the dark really, but in the absence of any ability to
reproduce the problem...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201658 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll b/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll
index c4ee79cd7fb2ed78d7688adee0e66a842cfd70b2..e945b03c33ae9375c352c2e016d65a616b0bf23b 100644 (file)
--- a/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll
+++ b/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll
@@ -1,5 +1,8 @@
-; RUN: opt -S -codegenprepare -mtriple=x86_64-apple-macosx10.9 -mcpu=core-avx2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
-; RUN: opt -S -codegenprepare -mtriple=x86_64-apple-macosx10.9 -mcpu=corei7 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SSE2
+; RUN: opt -S -codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
+; RUN: opt -S -codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SSE2
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-darwin10.9.0"
 
 define <16 x i8> @test_8bit(<16 x i8> %lhs, <16 x i8> %tmp, i1 %tst) {
 ; CHECK-LABEL: @test_8bit