small refinement to r157218 to save a tiny amount of table size in the common

case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157312 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/VMCore/Function.cpp b/lib/VMCore/Function.cpp
index 6339c6791d4d35ddd40d24612e943b3344debd5d..d0479a95db35a72661836a59f7998bafe67c3890 100644 (file)
--- a/lib/VMCore/Function.cpp
+++ b/lib/VMCore/Function.cpp
@@ -388,7 +388,9 @@ static Type *DecodeFixedType(unsigned &NextElt, ArrayRef<unsigned char> Infos,
     return VectorType::get(DecodeFixedType(NextElt, Infos, Tys, Context), 16);
   case IIT_V32:
     return VectorType::get(DecodeFixedType(NextElt, Infos, Tys, Context), 32);
-  case IIT_PTR: {
+  case IIT_PTR:
+    return PointerType::getUnqual(DecodeFixedType(NextElt, Infos, Tys,Context));
+  case IIT_ANYPTR: {  // [ANYPTR addrspace, subtype]
     unsigned AddrSpace = Infos[NextElt++];
     Type *PtrTy = DecodeFixedType(NextElt, Infos, Tys,Context);
     return PointerType::get(PtrTy, AddrSpace);

diff --git a/utils/TableGen/IntrinsicEmitter.cpp b/utils/TableGen/IntrinsicEmitter.cpp
index a595b1edd76ce4c5d4976175383a006f1724b8f7..2a22c974a93aada97d05e5243e9735b75f1882cd 100644 (file)
--- a/utils/TableGen/IntrinsicEmitter.cpp
+++ b/utils/TableGen/IntrinsicEmitter.cpp
@@ -338,7 +338,8 @@ enum IIT_Info {
   IIT_STRUCT4 = 20,
   IIT_STRUCT5 = 21,
   IIT_EXTEND_VEC_ARG = 22,
-  IIT_TRUNC_VEC_ARG = 23
+  IIT_TRUNC_VEC_ARG = 23,
+  IIT_ANYPTR = 24
 };
 
 
@@ -412,13 +413,17 @@ static void EncodeFixedType(Record *R, unsigned &NextArgNo,
   }
   
   if (VT == MVT::iPTR) {
-    Sig.push_back(IIT_PTR);
     unsigned AddrSpace = 0;
     if (R->isSubClassOf("LLVMQualPointerType")) {
       AddrSpace = R->getValueAsInt("AddrSpace");
       assert(AddrSpace < 256 && "Address space exceeds 255");
     }
-    Sig.push_back(AddrSpace);
+    if (AddrSpace) {
+      Sig.push_back(IIT_ANYPTR);
+      Sig.push_back(AddrSpace);
+    } else {
+      Sig.push_back(IIT_PTR);
+    }
     return EncodeFixedType(R->getValueAsDef("ElTy"), NextArgNo, Sig);
   }
   
@@ -491,7 +496,8 @@ void IntrinsicEmitter::EmitGenerator(const std::vector<CodeGenIntrinsic> &Ints,
   OS << "  IIT_STRUCT4 = 20,\n";
   OS << "  IIT_STRUCT5 = 21,\n";
   OS << "  IIT_EXTEND_VEC_ARG = 22,\n";
-  OS << "  IIT_TRUNC_VEC_ARG = 23\n";
+  OS << "  IIT_TRUNC_VEC_ARG = 23,\n";
+  OS << "  IIT_ANYPTR = 24\n";
   OS << "};\n\n";