Match (fneg (fma) to vfnma. rdar://10139676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154469 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td
index a9ad4fa4ec48362aa3a44dbeb58c052230e18c24..1b0d58784ddffe7bb08f56337ba615d6d6e1caf6 100644 (file)
--- a/lib/Target/ARM/ARMInstrVFP.td
+++ b/lib/Target/ARM/ARMInstrVFP.td
@@ -1140,6 +1140,14 @@ def : Pat<(fsub_mlx (fneg (fmul_su SPR:$a, SPR:$b)), SPR:$dstin),
           (VFNMAS SPR:$dstin, SPR:$a, SPR:$b)>,
           Requires<[HasVFP4,DontUseNEONForFP,FPContractions]>;
 
+// Match @llvm.fma.* intrinsics
+def : Pat<(fneg (fma (f64 DPR:$Ddin), (f64 DPR:$Dn), (f64 DPR:$Dm))),
+          (VFNMAD DPR:$Ddin, DPR:$Dn, DPR:$Dm)>,
+      Requires<[HasVFP4]>;
+def : Pat<(fneg (fma (f32 SPR:$Sdin), (f32 SPR:$Sn), (f32 SPR:$Sm))),
+          (VFNMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
+      Requires<[HasVFP4]>;
+
 def VFNMSD : ADbI<0b11101, 0b01, 0, 0,
                   (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
                   IIC_fpFMAC64, "vfnms", ".f64\t$Dd, $Dn, $Dm",

diff --git a/test/CodeGen/ARM/fusedMAC.ll b/test/CodeGen/ARM/fusedMAC.ll
index 381eb437e04e6314faa2f7de5c66413aacae2a4d..b5398c7a58776e0dbe49759d58778418fa2055f3 100644 (file)
--- a/test/CodeGen/ARM/fusedMAC.ll
+++ b/test/CodeGen/ARM/fusedMAC.ll
@@ -99,30 +99,49 @@ define <4 x float> @fusedMACTest12(<4 x float> %a, <4 x float> %b) {
   ret <4 x float> %sub
 }
 
-define float @test_f32(float %a, float %b, float %c) nounwind readnone ssp {
+define float @test_fma_f32(float %a, float %b, float %c) nounwind readnone ssp {
 entry:
-; CHECK: test_f32
+; CHECK: test_fma_f32
 ; CHECK: vfma.f32
   %call = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
   ret float %call
 }
 
-define double @test_f64(double %a, double %b, double %c) nounwind readnone ssp {
+define double @test_fma_f64(double %a, double %b, double %c) nounwind readnone ssp {
 entry:
-; CHECK: test_f64
+; CHECK: test_fma_f64
 ; CHECK: vfma.f64
   %call = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone
   ret double %call
 }
 
-define <2 x float> @test_v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind readnone ssp {
+define <2 x float> @test_fma_v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind readnone ssp {
 entry:
-; CHECK: test_v2f32
+; CHECK: test_fma_v2f32
 ; CHECK: vfma.f32
   %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind
   ret <2 x float> %0
 }
 
+define float @test_fnma_f32(float %a, float %b, float %c) nounwind readnone ssp {
+entry:
+; CHECK: test_fnma_f32
+; CHECK: vfnma.f32
+  %call = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
+  %tmp1 = fsub float -0.0, %call
+  %tmp2 = fsub float %tmp1, %c
+  ret float %tmp2
+}
+
+define double @test_fnma_f64(double %a, double %b, double %c) nounwind readnone ssp {
+entry:
+; CHECK: test_fnma_f64
+; CHECK: vfnma.f64
+  %call = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone
+  %tmp = fsub double -0.0, %call
+  ret double %tmp
+}
+
 declare float @llvm.fma.f32(float, float, float) nounwind readnone
 declare double @llvm.fma.f64(double, double, double) nounwind readnone
 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone