fix some 80-col violations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55565 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 2b51b2f7ab518594cee358218399e60059de7c17..e12cedc76df4063f2f02ec244a4241ba75489b3a 100644 (file)
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -1089,7 +1089,8 @@ public:
        (Ret.getOperand(0) == SDValue(Call.getNode(),1) ||
         Ret.getOperand(0) == SDValue(Call.getNode(),0))) ||
       (NumOps > 1 &&
-       Ret.getOperand(0) == SDValue(Call.getNode(),Call.getNode()->getNumValues()-1) &&
+       Ret.getOperand(0) == SDValue(Call.getNode(),
+                                    Call.getNode()->getNumValues()-1) &&
        Ret.getOperand(1) == SDValue(Call.getNode(),0)))
       return true;
     return false;

diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index 5ced8ef80e8b3f4f61348e5665e62b5ffc94d39c..ffbf18629bada4a6bb453e348207c112846f4ca8 100644 (file)
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -359,7 +359,8 @@ SDNode *IA64DAGToDAGISel::Select(SDValue Op) {
 
     Chain = CurDAG->getCopyToReg(Chain, IA64::r1, targetGP, InFlag);
     InFlag = Chain.getValue(1);
-    Chain = CurDAG->getCopyToReg(Chain, IA64::B6, targetEntryPoint, InFlag); // FLAG these?
+    Chain = CurDAG->getCopyToReg(Chain, IA64::B6,
+                                 targetEntryPoint, InFlag); // FLAG these?
     InFlag = Chain.getValue(1);
     
     CallOperand = CurDAG->getRegister(IA64::B6, MVT::i64);
@@ -520,7 +521,8 @@ SDNode *IA64DAGToDAGISel::Select(SDValue Op) {
         AddToISelQueue(Tmp);
         Tmp =
           SDValue(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial,
-                                          CurDAG->getTargetConstant(1, MVT::i64),
+                                          CurDAG->getTargetConstant(1,
+                                                                    MVT::i64),
                                           Tmp), 0);
         return CurDAG->SelectNodeTo(N, Opc, MVT::Other, Address, Tmp, Chain);
       }

diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index 6b75c3c5b06b604fcc508f559d1be51600e344c0..9cd9ef0fb80de884d791238983426dc03d9246a3 100644 (file)
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -398,7 +398,7 @@ IA64TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
       }
 
       if(ValToConvert.getNode()) {
-        Converts.push_back(DAG.getNode(IA64ISD::GETFD, MVT::i64, ValToConvert)); 
+        Converts.push_back(DAG.getNode(IA64ISD::GETFD, MVT::i64, ValToConvert));
       }
     }