ArchV7M implies HW division instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110797 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
index bf95e99d8d724e80ed59e88973edec3ecd24f553..5da83a6dd883f3064a29c3a757a3d6a9a57703b9 100644 (file)
--- a/lib/Target/ARM/ARM.td
+++ b/lib/Target/ARM/ARM.td
@@ -78,7 +78,7 @@ def ArchV7A     : SubtargetFeature<"v7a", "ARMArchVersion", "V7A",
                                    [FeatureThumb2, FeatureNEON, FeatureDB]>;
 def ArchV7M     : SubtargetFeature<"v7m", "ARMArchVersion", "V7M",
                                    "ARM v7M",
-                                   [FeatureThumb2, FeatureDB]>;
+                                   [FeatureThumb2, FeatureDB, FeatureHWDiv]>;
 
 //===----------------------------------------------------------------------===//
 // ARM Processors supported.
@@ -151,8 +151,8 @@ def : Processor<"cortex-a9",        CortexA9Itineraries,
                 [ArchV7A, FeatureT2XtPk]>;
 
 // V7M Processors.
-def : ProcNoItin<"cortex-m3",       [ArchV7M, FeatureHWDiv]>;
-def : ProcNoItin<"cortex-m4",       [ArchV7M, FeatureHWDiv]>;
+def : ProcNoItin<"cortex-m3",       [ArchV7M]>;
+def : ProcNoItin<"cortex-m4",       [ArchV7M]>;
 
 //===----------------------------------------------------------------------===//
 // Register File Description