[X86] Add AMD mwaitx, monitorx, and clzero instructions to the assembly parser and...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250911 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 2db827ea58298d775cd41606706de6d476f8e324..9bf0d6d3ffa219b451979bf23a99838e1447ffc5 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2401,6 +2401,32 @@ defm T1MSKC  : tbm_binary_intr<0x01, "t1mskc", MRM7r, MRM7m>;
 defm TZMSK   : tbm_binary_intr<0x01, "tzmsk", MRM4r, MRM4m>;
 } // HasTBM, EFLAGS
 
 defm TZMSK   : tbm_binary_intr<0x01, "tzmsk", MRM4r, MRM4m>;
 } // HasTBM, EFLAGS
 

+//===----------------------------------------------------------------------===//
+// MONITORX/MWAITX Instructions
+//
+let SchedRW = [WriteSystem] in {
+let Uses = [EAX, ECX, EDX] in
+def MONITORXrrr : I<0x01, MRM_FA, (outs), (ins), "monitorx", [],
+                    IIC_SSE_MONITOR>, TB;
+let Uses = [ECX, EAX, EBX] in
+def MWAITXrr   : I<0x01, MRM_FB, (outs), (ins), "mwaitx", [], IIC_SSE_MWAIT>,
+                 TB;
+} // SchedRW
+
+def : InstAlias<"mwaitx\t{%eax, %ecx, %ebx|ebx, ecx, eax}", (MWAITXrr)>, Requires<[Not64BitMode]>;
+def : InstAlias<"mwaitx\t{%rax, %rcx, %rbx|rbx, rcx, rax}", (MWAITXrr)>, Requires<[In64BitMode]>;
+
+def : InstAlias<"monitorx\t{%eax, %ecx, %edx|edx, ecx, eax}", (MONITORXrrr)>,
+      Requires<[Not64BitMode]>;
+def : InstAlias<"monitorx\t{%rax, %rcx, %rdx|rdx, rcx, rax}", (MONITORXrrr)>,
+      Requires<[In64BitMode]>;
+
+//===----------------------------------------------------------------------===//
+// CLZERO Instruction
+//
+let Uses = [EAX] in
+def CLZEROr : I<0x01, MRM_FC, (outs), (ins), "clzero", []>, TB;
+

 //===----------------------------------------------------------------------===//
 // Pattern fragments to auto generate TBM instructions.
 //===----------------------------------------------------------------------===//
 //===----------------------------------------------------------------------===//
 // Pattern fragments to auto generate TBM instructions.
 //===----------------------------------------------------------------------===//

diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s
index e14031d67f1ef16b1664415d7d19e161546592fb..10a1288bd57f78de587cfa55fc979982af67264c 100644 (file)
--- a/test/MC/X86/x86-32-coverage.s
+++ b/test/MC/X86/x86-32-coverage.s
@@ -10742,3 +10742,23 @@ btcq $4, (%eax)
 // CHECK: getsec
 // CHECK:  encoding: [0x0f,0x37]
                getsec
 // CHECK: getsec
 // CHECK:  encoding: [0x0f,0x37]
                getsec

+
+// CHECK:      monitorx
+// CHECK:  encoding: [0x0f,0x01,0xfa]
+               monitorx
+
+// CHECK:      monitorx
+// CHECK:  encoding: [0x0f,0x01,0xfa]
+               monitorx %eax, %ecx, %edx
+
+// CHECK:      mwaitx
+// CHECK:  encoding: [0x0f,0x01,0xfb]
+               mwaitx
+
+// CHECK:      mwaitx
+// CHECK:  encoding: [0x0f,0x01,0xfb]
+               mwaitx %eax, %ecx, %ebx
+
+// CHECK:      clzero
+// CHECK:  encoding: [0x0f,0x01,0xfc]
+               clzero

diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s
index 096e90039abde90cf0d1a53cf2cf27940ed19d3f..d49e7b3fc24436407bdfcb6e1a54b031cf6d50bc 100644 (file)
--- a/test/MC/X86/x86-64.s
+++ b/test/MC/X86/x86-64.s
@@ -1392,3 +1392,19 @@ vmovq %xmm0, %rax
 // CHECK: seto 3735928559(%r10,%r9,8)
 // CHECK:  encoding: [0x43,0x0f,0x90,0x84,0xca,0xef,0xbe,0xad,0xde]
        seto 0xdeadbeef(%r10,%r9,8)
 // CHECK: seto 3735928559(%r10,%r9,8)
 // CHECK:  encoding: [0x43,0x0f,0x90,0x84,0xca,0xef,0xbe,0xad,0xde]
        seto 0xdeadbeef(%r10,%r9,8)

+
+// CHECK:      monitorx
+// CHECK:  encoding: [0x0f,0x01,0xfa]
+               monitorx
+
+// CHECK:      monitorx
+// CHECK:  encoding: [0x0f,0x01,0xfa]
+               monitorx %rax, %rcx, %rdx
+
+// CHECK:      mwaitx
+// CHECK:  encoding: [0x0f,0x01,0xfb]
+               mwaitx
+
+// CHECK:      mwaitx
+// CHECK:  encoding: [0x0f,0x01,0xfb]
+               mwaitx %rax, %rcx, %rbx