ARM: implement allowTruncateForTailCall

Now that it's in place, it seems silly not to let ARM make use of the extra
tail call opportunities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187795 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 61c5bd14c95c85a122d35cfb625114fcd33aebf3..caec11e108f57c7c1232e7453aa64f593f7148dd 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -9993,6 +9993,21 @@ bool ARMTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
   return false;
 }
 
+bool ARMTargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
+  if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())
+    return false;
+
+  if (!isTypeLegal(EVT::getEVT(Ty1)))
+    return false;
+
+  assert(Ty1->getPrimitiveSizeInBits() <= 64 && "i128 is probably not a noop");
+
+  // Assuming the caller doesn't have a zeroext or signext return parameter,
+  // truncation all the way down to i1 is valid.
+  return true;
+}
+
+
 static bool isLegalT1AddressImmediate(int64_t V, EVT VT) {
   if (V < 0)
     return false;

diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index beba5ce7715f5eeb77688b840c38f749af14cf43..44c769f8221368d57c4642438d30824d322a863d 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -298,6 +298,9 @@ namespace llvm {
     using TargetLowering::isZExtFree;
     virtual bool isZExtFree(SDValue Val, EVT VT2) const;
 
+    virtual bool allowTruncateForTailCall(Type *Ty1, Type *Ty2) const;
+
+
     /// isLegalAddressingMode - Return true if the addressing mode represented
     /// by AM is legal for this target, for a load/store of the specified type.
     virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;

diff --git a/test/CodeGen/ARM/returned-trunc-tail-calls.ll b/test/CodeGen/ARM/returned-trunc-tail-calls.ll
new file mode 100644 (file)
index 0000000..5946727
--- /dev/null
+++ b/test/CodeGen/ARM/returned-trunc-tail-calls.ll
@@ -0,0 +1,111 @@
+; RUN: llc < %s -mtriple=armv7 -arm-tail-calls | FileCheck %s
+
+declare i16 @ret16(i16 returned)
+declare i32 @ret32(i32 returned)
+
+define i32 @test1(i32 %val) {
+; CHECK-LABEL: test1:
+; CHECK: bl {{_?}}ret16
+  %in = trunc i32 %val to i16
+  tail call i16 @ret16(i16 returned %in)
+  ret i32 %val
+}
+
+define i16 @test2(i32 %val) {
+; CHECK-LABEL: test2:
+; CHECK: b {{_?}}ret16
+  %in = trunc i32 %val to i16
+  tail call i16 @ret16(i16 returned %in)
+  ret i16 %in
+}
+
+declare {i32, i8} @take_i32_i8({i32, i8} returned)
+define { i8, i8 } @test_nocommon_value({i32, i32} %in) {
+; CHECK-LABEL: test_nocommon_value:
+; CHECK: b {{_?}}take_i32_i8
+
+  %first = extractvalue {i32, i32} %in, 0
+  %first.trunc = trunc i32 %first to i8
+
+  %second = extractvalue {i32, i32} %in, 1
+  %second.trunc = trunc i32 %second to i8
+
+  %tmp = insertvalue {i32, i8} undef, i32 %first, 0
+  %callval = insertvalue {i32, i8} %tmp, i8 %second.trunc, 1
+  tail call {i32, i8} @take_i32_i8({i32, i8} returned %callval)
+
+  %restmp = insertvalue {i8, i8} undef, i8 %first.trunc, 0
+  %res = insertvalue {i8, i8} %restmp, i8 %second.trunc, 1
+  ret {i8, i8} %res
+}
+
+declare {i32, {i32, i32}} @give_i32_i32_i32()
+define {{i32, i32}, i32} @test_structs_different_shape() {
+; CHECK-LABEL: test_structs_different_shape:
+; CHECK: b {{_?}}give_i32_i32_i32
+  %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
+
+  %first = extractvalue {i32, {i32, i32}} %val, 0
+  %second = extractvalue {i32, {i32, i32}} %val, 1, 0
+  %third = extractvalue {i32, {i32, i32}} %val, 1, 1
+
+  %restmp = insertvalue {{i32, i32}, i32} undef, i32 %first, 0, 0
+  %reseventmper = insertvalue {{i32, i32}, i32} %restmp, i32 %second, 0, 1
+  %res = insertvalue {{i32, i32}, i32} %reseventmper, i32 %third, 1
+
+  ret {{i32, i32}, i32} %res
+}
+
+define i32 @test_undef_asymmetry() {
+; CHECK: test_undef_asymmetry:
+; CHECK: bl {{_?}}ret32
+; CHECK-NOT: jmp
+  tail call i32 @ret32(i32 returned undef)
+  ret i32 2
+}
+
+define {{}, {{}, i32, {}}, [1 x i32]} @evil_empty_aggregates() {
+; CHECK-LABEL: evil_empty_aggregates:
+; CHECK: b {{_?}}give_i32_i32_i32
+  %agg = tail call {i32, {i32, i32}} @give_i32_i32_i32()
+
+  %first = extractvalue {i32, {i32, i32}} %agg, 0
+  %second = extractvalue {i32, {i32, i32}} %agg, 1, 0
+
+  %restmp = insertvalue {{}, {{}, i32, {}}, [1 x i32]} undef, i32 %first, 1, 1
+  %res = insertvalue {{}, {{}, i32, {}}, [1 x i32]} %restmp, i32 %second, 2, 0
+  ret {{}, {{}, i32, {}}, [1 x i32]} %res
+}
+
+define i32 @structure_is_unimportant() {
+; CHECK-LABEL: structure_is_unimportant:
+; CHECK: b {{_?}}give_i32_i32_i32
+  %val = tail call {i32, {i32, i32}} @give_i32_i32_i32()
+
+  %res = extractvalue {i32, {i32, i32}} %val, 0
+  ret i32 %res
+}
+
+declare i64 @give_i64()
+define i64 @direct_i64_ok() {
+; CHECK-LABEL: direct_i64_ok:
+; CHECK: b {{_?}}give_i64
+  %val = tail call i64 @give_i64()
+  ret i64 %val
+}
+
+declare {i64, i32} @give_i64_i32()
+define {i32, i32} @trunc_i64_not_ok() {
+; CHECK-LABEL: trunc_i64_not_ok:
+; CHECK: bl {{_?}}give_i64_i32
+  %agg = tail call {i64, i32} @give_i64_i32()
+
+  %first = extractvalue {i64, i32} %agg, 0
+  %second = extractvalue {i64, i32} %agg, 1
+  %first.trunc = trunc i64 %first to i32
+
+  %tmp = insertvalue {i32, i32} undef, i32 %first.trunc, 0
+  %ret = insertvalue {i32, i32} %tmp, i32 %second, 1
+
+  ret {i32, i32} %ret
+}