[x32] Change the condition from bitness to LP64 for TCRETURNdi64.

TCRETURNmi64, which was mistakenly changed in r227307 will wait for another day.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227317 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td
index 06f795b33c38a4553b35407df8d904c4b3cb877d..be0e4b790a2b57c3841db799df78f1a8c51eb476 100644 (file)
--- a/lib/Target/X86/X86InstrCompiler.td
+++ b/lib/Target/X86/X86InstrCompiler.td
@@ -1076,7 +1076,7 @@ def : Pat<(X86tcret ptr_rc_tailcall:$dst, imm:$off),
 // There wouldn't be enough scratch registers for base+index.
 def : Pat<(X86tcret_6regs (load addr:$dst), imm:$off),
           (TCRETURNmi64 addr:$dst, imm:$off)>,
-          Requires<[IsLP64]>;
+          Requires<[In64BitMode]>;
 
 def : Pat<(X86tcret (i64 tglobaladdr:$dst), imm:$off),
           (TCRETURNdi64 tglobaladdr:$dst, imm:$off)>,
@@ -1084,7 +1084,7 @@ def : Pat<(X86tcret (i64 tglobaladdr:$dst), imm:$off),
 
 def : Pat<(X86tcret (i64 texternalsym:$dst), imm:$off),
           (TCRETURNdi64 texternalsym:$dst, imm:$off)>,
-          Requires<[In64BitMode]>;
+          Requires<[IsLP64]>;
 
 // Normal calls, with various flavors of addresses.
 def : Pat<(X86call (i32 tglobaladdr:$dst)),