Should not add instructions to a BB after a return instruction. The machine instructi...
authorBill Wendling <isanbard@gmail.com>
Thu, 13 Oct 2011 07:42:32 +0000 (07:42 +0000)
committerBill Wendling <isanbard@gmail.com>
Thu, 13 Oct 2011 07:42:32 +0000 (07:42 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141856 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86FrameLowering.cpp
test/CodeGen/X86/segmented-stacks.ll

index 23b071673de8c467d4b1683ab4bddec4a6cc9a64..757cef2d7f7dc708edf63f482cb1c8a9213e3179 100644 (file)
@@ -1414,11 +1414,12 @@ X86FrameLowering::adjustForSegmentedStacks(MachineFunction &MF) const {
   if (!Is64Bit)
     BuildMI(allocMBB, DL, TII.get(X86::ADD32ri), X86::ESP).addReg(X86::ESP)
       .addImm(8);
   if (!Is64Bit)
     BuildMI(allocMBB, DL, TII.get(X86::ADD32ri), X86::ESP).addReg(X86::ESP)
       .addImm(8);
-  BuildMI(allocMBB, DL, TII.get(X86::RET));
 
   if (Is64Bit && IsNested)
     BuildMI(allocMBB, DL, TII.get(X86::MOV64rr), X86::R10).addReg(X86::RAX);
 
 
   if (Is64Bit && IsNested)
     BuildMI(allocMBB, DL, TII.get(X86::MOV64rr), X86::R10).addReg(X86::RAX);
 
+  BuildMI(allocMBB, DL, TII.get(X86::RET));
+
   allocMBB->addSuccessor(&prologueMBB);
   checkMBB->addSuccessor(allocMBB);
   checkMBB->addSuccessor(&prologueMBB);
   allocMBB->addSuccessor(&prologueMBB);
   checkMBB->addSuccessor(allocMBB);
   checkMBB->addSuccessor(&prologueMBB);
index 3f0067e2926b3c72eab2d8f023c91f33ec37a99e..37f082c730a833f0428f72031cef6e15549d96de 100644 (file)
@@ -81,7 +81,7 @@ define i32 @test_nested(i32 * nest %closure, i32 %other) {
 ; X64-NEXT: movabsq $0, %r10
 ; X64-NEXT: movabsq $0, %r11
 ; X64-NEXT: callq __morestack
 ; X64-NEXT: movabsq $0, %r10
 ; X64-NEXT: movabsq $0, %r11
 ; X64-NEXT: callq __morestack
-; X64-NEXT: ret
 ; X64-NEXT: movq %rax, %r10
 ; X64-NEXT: movq %rax, %r10
+; X64-NEXT: ret
 
 }
 
 }