PR20557: Fix the bug that bogus cpu parameter crashes llc on AArch64 backend.
authorHao Liu <Hao.Liu@arm.com>
Fri, 31 Oct 2014 02:35:34 +0000 (02:35 +0000)
committerHao Liu <Hao.Liu@arm.com>
Fri, 31 Oct 2014 02:35:34 +0000 (02:35 +0000)
Initial patch by Oleg Ranevskyy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220945 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/TargetLoweringBase.cpp
test/CodeGen/AArch64/legalize-bug-bogus-cpu.ll [new file with mode: 0644]

index a5889db9104d156c6b80609f062e71d08fdd3ac6..d0acf0e6913190b628fb5f555c75932fec8247c5 100644 (file)
@@ -1200,8 +1200,12 @@ void TargetLoweringBase::computeRegisterProperties() {
         TransformToType[i] = MVT::Other;
         if (PreferredAction == TypeScalarizeVector)
           ValueTypeActions.setTypeAction(VT, TypeScalarizeVector);
         TransformToType[i] = MVT::Other;
         if (PreferredAction == TypeScalarizeVector)
           ValueTypeActions.setTypeAction(VT, TypeScalarizeVector);
-        else
+        else if (PreferredAction == TypeSplitVector)
           ValueTypeActions.setTypeAction(VT, TypeSplitVector);
           ValueTypeActions.setTypeAction(VT, TypeSplitVector);
+        else
+          // Set type action according to the number of elements.
+          ValueTypeActions.setTypeAction(VT, NElts == 1 ? TypeScalarizeVector
+                                                        : TypeSplitVector);
       } else {
         TransformToType[i] = NVT;
         ValueTypeActions.setTypeAction(VT, TypeWidenVector);
       } else {
         TransformToType[i] = NVT;
         ValueTypeActions.setTypeAction(VT, TypeWidenVector);
diff --git a/test/CodeGen/AArch64/legalize-bug-bogus-cpu.ll b/test/CodeGen/AArch64/legalize-bug-bogus-cpu.ll
new file mode 100644 (file)
index 0000000..b785a8f
--- /dev/null
@@ -0,0 +1,8 @@
+; RUN: llc -march=aarch64 -mcpu=bogus -o - %s
+
+; Fix the bug in PR20557. Set mcpu to a bogus name, llc will crash in type
+; legalization.
+define <4 x float> @fneg4(<4 x float> %x) {
+  %sub = fsub <4 x float> zeroinitializer, %x
+  ret <4 x float> %sub
+}