Switch lowering: Fix broken 'Figure out which block is next' code
authorHans Wennborg <hans@hanshq.net>
Sat, 29 Nov 2014 21:17:05 +0000 (21:17 +0000)
committerHans Wennborg <hans@hanshq.net>
Sat, 29 Nov 2014 21:17:05 +0000 (21:17 +0000)
This doesn't seem to have worked in a long time, but other optimizations
would clean it up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222961 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
test/CodeGen/X86/switch-default-only.ll [new file with mode: 0644]
test/DebugInfo/unconditional-branch.ll

index 8f582f1..196d26d 100644 (file)
@@ -2694,6 +2694,9 @@ void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
 
   // Figure out which block is immediately after the current one.
   MachineBasicBlock *NextBlock = nullptr;
+  if (SwitchMBB + 1 != FuncInfo.MF->end())
+    NextBlock = SwitchMBB + 1;
+
   MachineBasicBlock *Default = FuncInfo.MBBMap[SI.getDefaultDest()];
 
   // If there is only the default destination, branch to it if it is not the
diff --git a/test/CodeGen/X86/switch-default-only.ll b/test/CodeGen/X86/switch-default-only.ll
new file mode 100644 (file)
index 0000000..360ace5
--- /dev/null
@@ -0,0 +1,14 @@
+; RUN: llc -O0 -fast-isel=false -march=x86 < %s | FileCheck %s
+
+; No need for branching when the default and only destination follows
+; immediately after the switch.
+; CHECK-LABEL: no_branch:
+; CHECK-NOT: jmp
+; CHECK: ret
+
+define void @no_branch(i32 %x) {
+entry:
+  switch i32 %x, label %exit [ ]
+exit:
+  ret void
+}
index 95f5f9e..f7998d2 100644 (file)
@@ -27,11 +27,12 @@ entry:
   switch i32 %0, label %sw.default [
   ], !dbg !14
 
+sw.epilog:                                        ; preds = %sw.default
+  ret void, !dbg !17
+
 sw.default:                                       ; preds = %entry
   br label %sw.epilog, !dbg !15
 
-sw.epilog:                                        ; preds = %sw.default
-  ret void, !dbg !17
 }
 
 ; Function Attrs: nounwind readnone