Disable support for x86_f80 in X86FastISel. Supporting it would

require more work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56637 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index b7ff7494c058fb2a56eb20ea13251a6772daf434..0a3f5204868875b77c3416189e5f9db8fb5d3d4a 100644 (file)
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -216,9 +216,8 @@ bool X86FastISel::X86FastEmitLoad(MVT VT, const X86AddressMode &AM,
     }
     break;
   case MVT::f80:
-    Opc = X86::LD_Fp80m;
-    RC  = X86::RFP80RegisterClass;
-    break;
+    // No f80 support yet.
+    return false;
   }
 
   ResultReg = createResultReg(RC);
@@ -274,9 +273,8 @@ X86FastISel::X86FastEmitStore(MVT VT, unsigned Val,
     }
     break;
   case MVT::f80:
-    Opc = X86::ST_FP80m;
-    RC  = X86::RFP80RegisterClass;
-    break;
+    // No f80 support yet.
+    return false;
   }
 
   addFullAddress(BuildMI(MBB, TII.get(Opc)), AM).addReg(Val);
@@ -1169,9 +1167,8 @@ unsigned X86FastISel::TargetMaterializeConstant(Constant *C) {
     }
     break;
   case MVT::f80:
-    Opc = X86::LD_Fp80m;
-    RC  = X86::RFP80RegisterClass;
-    break;
+    // No f80 support yet.
+    return false;
   }
   
   // Materialize addresses with LEA instructions.