arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 219e4e1437468994f37d34c10926ed455e279ce8..0cef4cce68f773deb1ff8ca232df0ee6b669a963 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1370,8 +1370,12 @@ bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
   case 1:
     if (Subtarget->isThumb())
       return false;
-
+    // FALL THROUGH.
   default:
+    // ARM doesn't support any R+R*scale+imm addr modes.
+    if (AM.BaseOffs)
+      return false;
+    
     int Scale = AM.Scale;
     switch (getValueType(Ty)) {
     default: return false;