+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats -analyze < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @BZ2_blockSort() nounwind {
-start:
- br label %while
-
-while:
- br label %while.body134.i.i
-
-while.body134.i.i:
- br i1 1, label %end, label %w
-
-w:
- br label %if.end140.i.i
-
-if.end140.i.i:
- br i1 1, label %while.end186.i.i, label %if.end183.i.i
-
-if.end183.i.i:
- br label %while.body134.i.i
-
-while.end186.i.i:
- br label %while
-
-end:
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] start => <Function Return>
-; CHECK: [1] while => end
-
-; STAT: 2 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: start, while, while.body134.i.i, end, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
-; BBIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
-
-; RNIT: start, while => end, end,
-; RNIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-5:
- br label %"0"
-
-0:
- br label %"1"
-1:
- br i1 1, label %"2", label %"3"
-2:
- ret void
-3:
- br i1 1, label %"1", label %"4"
-4:
- br label %"0"
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] 5 => <Function Return>
-; CHECK: [1] 0 => 2
-
-; STAT: 2 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: 5, 0, 1, 2, 3, 4,
-; BBIT: 0, 1, 3, 4,
-
-; RNIT: 5, 0 => 2, 2,
-; RNIT: 0, 1, 3, 4,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define internal fastcc zeroext i8 @handle_compress() nounwind {
-end165:
- br i1 1, label %false239, label %true181
-
-true181:
- br i1 1, label %then187, label %else232
-
-then187:
- br label %end265
-
-else232:
- br i1 1, label %false239, label %then245
-
-false239:
- br i1 1, label %then245, label %else259
-
-then245:
- br i1 1, label %then251, label %end253
-
-then251:
- br label %end253
-
-end253:
- br label %end265
-
-else259:
- br label %end265
-
-end265:
- br i1 1, label %then291, label %end298
-
-then291:
- br label %end298
-
-end298:
- ret i8 1
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] end165 => <Function Return>
-; CHECK-NEXT: [1] end165 => end265
-; CHECK-NEXT: [2] then245 => end253
-; CHECK-NEXT: [1] end265 => end298
-
-; STAT: 4 region - The # of regions
-
-; BBIT: end165, false239, then245, then251, end253, end265, then291, end298, else259, true181, then187, else232,
-; BBIT: end165, false239, then245, then251, end253, else259, true181, then187, else232,
-; BBIT: then245, then251,
-; BBIT: end265, then291,
-
-; RNIT: end165 => end265, end265 => end298, end298,
-; RNIT: end165, false239, then245 => end253, end253, else259, true181, then187, else232,
-; RNIT: then245, then251,
-; RNIT: end265, then291,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define internal fastcc void @compress() nounwind {
-end33:
- br i1 1, label %end124, label %lor.lhs.false95
-
-lor.lhs.false95:
- br i1 1, label %then107, label %end172
-
-then107:
- br i1 1, label %end124, label %then113
-
-then113:
- br label %end124
-
-end124:
- br label %exit
-
-end172:
- br label %exit
-
-
-exit:
- unreachable
-
-
-}
-; CHECK-NOT: =>
-; CHECK: [0] end33 => <Function Return>
-; CHECK-NEXT: [1] end33 => exit
-; CHECK-NEXT: [2] then107 => end124
-
-; STAT: 3 region - The # of regions
-
-; BBIT: end33, end124, exit, lor.lhs.false95, then107, then113, end172,
-; BBIT: end33, end124, lor.lhs.false95, then107, then113, end172,
-; BBIT: then107, then113,
-
-; RNIT: end33 => exit, exit,
-; RNIT: end33, end124, lor.lhs.false95, then107 => end124, end172,
-; RNIT: then107, then113,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-0:
- br label %"1"
-1:
- br i1 1, label %"2", label %"3"
-2:
- br label %"3"
-3:
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK: [1] 1 => 3
-
-; STAT: 2 region - The # of regions
-
-; BBIT: 0, 1, 2, 3,
-; BBIT: 1, 2,
-
-; RNIT: 0, 1 => 3, 3,
-; RNIT: 1, 2,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-0:
- br i1 1, label %"1", label %"4"
-
-1:
- br i1 1, label %"2", label %"3"
-2:
- br label %"4"
-3:
- br label %"4"
-4:
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK-NEXT: [1] 0 => 4
-; CHECK-NEXT: [2] 1 => 4
-; STAT: 3 region - The # of regions
-
-; BBIT: 0, 1, 2, 4, 3,
-; BBIT: 0, 1, 2, 3,
-; BBIT: 1, 2, 3,
-
-; RNIT: 0 => 4, 4,
-; RNIT: 0, 1 => 4,
-; RNIT: 1, 2, 3,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-0:
- br label %"1"
-1:
- br i1 1, label %"2", label %"3"
-2:
- br label %"4"
-3:
- br label %"4"
-4:
- ret void
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK-NEXT: [1] 1 => 4
-; STAT: 2 region - The # of regions
-
-; BBIT: 0, 1, 2, 4, 3,
-; BBIT: 1, 2, 3,
-
-; RNIT: 0, 1 => 4, 4,
-; RNIT: 1, 2, 3,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define internal fastcc zeroext i8 @handle_compress() nounwind {
-entry:
- br label %outer
-
-outer:
- br label %body
-
-body:
- br i1 1, label %body.i, label %if.end
-
-body.i:
- br i1 1, label %end, label %if.end
-
-if.end:
- br label %if.then64
-
-if.then64:
- br label %outer
-
-end:
- ret i8 1
-}
-; CHECK-NOT: =>
-; CHECK: [0] entry => <Function Return>
-; CHECK-NEXT: [1] outer => end
-; STAT: 2 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: entry, outer, body, body.i, end, if.end, if.then64,
-; BBIT: outer, body, body.i, if.end, if.then64,
-
-; RNIT: entry, outer => end, end,
-; RNIT: outer, body, body.i, if.end, if.then64,
+++ /dev/null
-; RUN: opt -regions -analyze < %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-
-define void @normal_condition() nounwind {
-0:
- br label %"1"
-1:
- br i1 1, label %"2", label %"3"
-2:
- br label %"2"
-3:
- br label %"4"
-4:
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK: [1] 1 => 4
-; STAT: 2 region - The # of regions
-; STAT: 1 region - The # of simple regions
+++ /dev/null
-; RUN: opt -regions -analyze < %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-0:
- br label %"1"
-1:
- br i1 1, label %"2", label %"3"
-2:
- br label %"5"
-5:
- br i1 1, label %"11", label %"12"
-11:
- br label %"6"
-12:
- br label %"6"
-6:
- br label %"2"
-3:
- br label %"4"
-4:
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK: [1] 1 => 3
-; STAT: 2 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: 0, 1, 2, 5, 11, 6, 12, 3, 4,
-; BBIT: 1, 2, 5, 11, 6, 12,
-
-; RNIT: 0, 1 => 3, 3, 4,
-; RNIT: 1, 2, 5, 11, 6, 12,
+++ /dev/null
-; RUN: opt -regions -analyze < %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-0:
- br label %"7"
-7:
- br i1 1, label %"1", label %"8"
-1:
- br i1 1, label %"2", label %"3"
-2:
- br label %"5"
-5:
- br i1 1, label %"11", label %"12"
-11:
- br label %"6"
-12:
- br label %"6"
-6:
- br label %"2"
-8:
- br label %"9"
-9:
- br i1 1, label %"13", label %"14"
-13:
- br label %"10"
-14:
- br label %"10"
-10:
- br label %"8"
-3:
- br label %"4"
-4:
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK-NEXT: [1] 1 => 3
-; CHECK-NEXT: [1] 7 => 1
-; STAT: 3 region - The # of regions
-; STAT: 2 region - The # of simple regions
-
-; BBIT: 0, 7, 1, 2, 5, 11, 6, 12, 3, 4, 8, 9, 13, 10, 14,
-; BBIT: 7, 8, 9, 13, 10, 14,
-; BBIT: 1, 2, 5, 11, 6, 12,
-
-; RNIT: 0, 7 => 1, 1 => 3, 3, 4,
-; RNIT: 7, 8, 9, 13, 10, 14,
-; RNIT: 1, 2, 5, 11, 6, 12,
+++ /dev/null
-; RUN: opt -regions -analyze < %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-0:
- br label %"7"
-7:
- br i1 1, label %"1", label %"8"
-1:
- br i1 1, label %"2", label %"3"
-2:
- br label %"5"
-5:
- br i1 1, label %"11", label %"12"
-11:
- br label %"6"
-12:
- br label %"6"
-6:
- br i1 1, label %"2", label %"10"
-8:
- br label %"9"
-9:
- br i1 1, label %"13", label %"14"
-13:
- br label %"10"
-14:
- br label %"10"
-10:
- br label %"8"
-3:
- br label %"4"
-4:
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK-NEXT: [1] 7 => 3
-; STAT: 2 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: 0, 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12, 3, 4,
-; BBIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
-
-; RNIT: 0, 7 => 3, 3, 4,
-; RNIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @normal_condition() nounwind {
-0:
- br label %"1"
-1:
- br i1 1, label %"6", label %"2"
-2:
- br i1 1, label %"3", label %"4"
-3:
- br label %"5"
-4:
- br label %"5"
-5:
- br label %"8"
-8:
- br i1 1, label %"7", label %"9"
-9:
- br label %"2"
-7:
- br label %"6"
-6:
- ret void
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK-NEXT: [1] 1 => 6
-; CHECK-NEXT: [2] 2 => 7
-; CHECK-NEXT: [3] 2 => 5
-; STAT: 4 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: 0, 1, 6, 2, 3, 5, 8, 7, 9, 4,
-; BBIT: 1, 2, 3, 5, 8, 7, 9, 4,
-; BBIT: 2, 3, 5, 8, 9, 4,
-; BBIT: 2, 3, 4,
-
-; RNIT: 0, 1 => 6, 6,
-; RNIT: 1, 2 => 7, 7,
-; RNIT: 2 => 5, 5, 8, 9,
-; RNIT: 2, 3, 4,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define internal fastcc zeroext i8 @loops_1() nounwind {
-entry:
- br i1 1, label %outer , label %a
-
-a:
- br label %body
-
-outer:
- br label %body
-
-body:
- br i1 1, label %land, label %if
-
-land:
- br i1 1, label %exit, label %end
-
-exit:
- br i1 1, label %if, label %end
-
-if:
- br label %outer
-
-end:
- ret i8 1
-}
-; CHECK-NOT: =>
-; CHECK: [0] entry => <Function Return>
-; CHECK-NEXT: [1] entry => end
-; STAT: 2 region - The # of regions
-
-; BBIT: entry, outer, body, land, exit, if, end, a,
-; BBIT: entry, outer, body, land, exit, if, a,
-
-; RNIT: entry => end, end,
-; RNIT: entry, outer, body, land, exit, if, a,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @meread_() nounwind {
-entry:
- br label %bb23
-
-bb23:
- br label %bb.i
-
-bb.i: ; preds = %bb.i, %bb54
- br label %pflini_.exit
-
-pflini_.exit: ; preds = %bb.i
- br label %bb58thread-split
-
-bb58thread-split: ; preds = %bb64, %bb61, %pflini_.exit
- br label %bb58
-
-bb58: ; preds = %bb60, %bb58thread-split
- br i1 1, label %bb59, label %bb23
-
-bb59: ; preds = %bb58
- switch i32 1, label %bb60 [
- i32 1, label %l98
- ]
-
-bb60: ; preds = %bb59
- br i1 1, label %bb61, label %bb58
-
-bb61: ; preds = %bb60
- br label %bb58thread-split
-
-l98: ; preds = %bb69, %bb59
- ret void
-}
-; CHECK-NOT: =>
-; CHECK: [0] entry => <Function Return>
-; CHECK: [1] bb23 => l98
-; STAT: 2 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: entry, bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61, l98,
-; BBIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
-
-; RNIT: entry, bb23 => l98, l98,
-; RNIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @a_linear_impl_fig_1() nounwind {
-0:
-
- br i1 1, label %"1", label %"15"
-1:
- switch i32 0, label %"2" [ i32 0, label %"3"
- i32 1, label %"7"]
-2:
- br label %"4"
-3:
- br label %"5"
-4:
- br label %"6"
-5:
- br label %"6"
-6:
- br label %"7"
-7:
- br label %"15"
-15:
- br label %"8"
-8:
- br label %"16"
-16:
- br label %"9"
-9:
- br i1 1, label %"10", label %"11"
-11:
- br i1 1, label %"13", label %"12"
-13:
- br label %"14"
-12:
- br label %"14"
-14:
- br label %"8"
-10:
- br label %"17"
-17:
- br label %"18"
-18:
- ret void
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK-NEXT: [1] 0 => 15
-; CHECK-NEXT: [2] 1 => 7
-; CHECK-NEXT: [1] 8 => 10
-; CHECK-NEXT: [2] 11 => 14
-; STAT: 5 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: 0, 1, 2, 4, 6, 7, 15, 8, 16, 9, 10, 17, 18, 11, 13, 14, 12, 3, 5,
-; BBIT: 0, 1, 2, 4, 6, 7, 3, 5,
-; BBIT: 1, 2, 4, 6, 3, 5,
-; BBIT: 8, 16, 9, 11, 13, 14, 12,
-; BBIT: 11, 13, 12,
-
-; RNIT: 0 => 15, 15, 8 => 10, 10, 17, 18,
-; RNIT: 0, 1 => 7, 7,
-; RNIT: 1, 2, 4, 6, 3, 5,
-; RNIT: 8, 16, 9, 11 => 14, 14,
-; RNIT: 11, 13, 12,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define internal fastcc zeroext i8 @handle_compress() nounwind {
-entry:
- br label %outer
-
-outer:
- br label %body
-
-body:
- br i1 1, label %exit172, label %end
-
-exit172:
- br i1 1, label %end, label %outer
-
-end:
- ret i8 1
-}
-; CHECK-NOT: =>
-; CHECK: [0] entry => <Function Return>
-; CHECK-NEXT: [1] outer => end
-
-; STAT: 2 region - The # of regions
-
-; BBIT: entry, outer, body, exit172, end,
-; BBIT: outer, body, exit172,
-
-; RNIT: entry, outer => end, end,
-; RNIT: outer, body, exit172,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @MAIN__() nounwind {
-entry:
- br label %__label_002001.outer
-
-__label_002001.outer: ; preds = %bb236, %bb92
- br label %__label_002001
-
-__label_002001: ; preds = %bb229, %__label_002001.outer
- br i1 1, label %bb93, label %__label_000020
-
-bb93: ; preds = %__label_002001
- br i1 1, label %__label_000020, label %bb197
-
-bb197: ; preds = %bb193
- br i1 1, label %bb229, label %bb224
-
-bb224: ; preds = %bb223, %bb227
- br i1 1, label %bb229, label %bb224
-
-bb229: ; preds = %bb227, %bb223
- br i1 1, label %__label_002001, label %__label_002001.outer
-
-__label_000020: ; preds = %__label_002001, %bb194
- ret void
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] entry => <Function Return>
-; CHECK-NEXT: [1] __label_002001.outer => __label_000020
-; CHECK-NEXT: [2] bb197 => bb229
-; CHECK-NEXT: [3] bb224 => bb229
-
-; STAT: 4 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: entry, __label_002001.outer, __label_002001, bb93, __label_000020, bb197, bb229, bb224,
-; BBIT: __label_002001.outer, __label_002001, bb93, bb197, bb229, bb224,
-; BBIT: bb197, bb224,
-; BBIT: bb224,
-
-; RNIT: entry, __label_002001.outer => __label_000020, __label_000020,
-; RNIT: __label_002001.outer, __label_002001, bb93, bb197 => bb229, bb229,
-; RNIT: bb197, bb224 => bb229,
-; RNIT: bb224,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define void @a_linear_impl_fig_1() nounwind {
-0:
- br label %"1"
-1:
- br label %"2"
-2:
- br label %"3"
-3:
- br i1 1, label %"13", label %"4"
-4:
- br i1 1, label %"5", label %"1"
-5:
- br i1 1, label %"8", label %"6"
-6:
- br i1 1, label %"7", label %"4"
-7:
- ret void
-8:
- br i1 1, label %"9", label %"1"
-9:
- br label %"10"
-10:
- br i1 1, label %"12", label %"11"
-11:
- br i1 1, label %"9", label %"8"
-13:
- br i1 1, label %"2", label %"1"
-12:
- switch i32 0, label %"1" [ i32 0, label %"9"
- i32 1, label %"8"]
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] 0 => <Function Return>
-; CHECK-NEXT: [1] 1 => 7
-; CHECK-NEXT: [2] 1 => 4
-; CHECK-NEXT: [2] 8 => 1
-
-; STAT: 4 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: 0, 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6, 7,
-; BBIT: 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6,
-; BBIT: 1, 2, 3, 13,
-; BBIT: 8, 9, 10, 12, 11,
-
-; RNIT: 0, 1 => 7, 7,
-; RNIT: 1 => 4, 4, 5, 8 => 1, 6,
-; RNIT: 1, 2, 3, 13,
-; RNIT: 8, 9, 10, 12, 11,
+++ /dev/null
-; RUN: opt -regions -analyze < %s | FileCheck %s
-; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
-; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
-; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
-
-define internal fastcc zeroext i8 @handle_compress() nounwind {
-entry:
- br label %outer
-
-outer:
- br label %body
-
-body:
- br i1 1, label %else, label %true77
-
-true77:
- br i1 1, label %then83, label %else
-
-then83:
- br label %outer
-
-else:
- br label %else106
-
-else106:
- br i1 1, label %end, label %outer
-
-end:
- ret i8 1
-}
-
-; CHECK-NOT: =>
-; CHECK: [0] entry => <Function Return>
-; CHECK-NEXT: [1] outer => end
-; CHECK-NEXT: [2] outer => else
-
-; STAT: 3 region - The # of regions
-; STAT: 1 region - The # of simple regions
-
-; BBIT: entry, outer, body, else, else106, end, true77, then83,
-; BBIT: outer, body, else, else106, true77, then83,
-; BBIT: outer, body, true77, then83,
-
-; RNIT: entry, outer => end, end,
-; RNIT: outer => else, else, else106,
-; RNIT: outer, body, true77, then83,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats -analyze < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @BZ2_blockSort() nounwind {
+start:
+ br label %while
+
+while:
+ br label %while.body134.i.i
+
+while.body134.i.i:
+ br i1 1, label %end, label %w
+
+w:
+ br label %if.end140.i.i
+
+if.end140.i.i:
+ br i1 1, label %while.end186.i.i, label %if.end183.i.i
+
+if.end183.i.i:
+ br label %while.body134.i.i
+
+while.end186.i.i:
+ br label %while
+
+end:
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] start => <Function Return>
+; CHECK: [1] while => end
+
+; STAT: 2 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: start, while, while.body134.i.i, end, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
+; BBIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
+
+; RNIT: start, while => end, end,
+; RNIT: while, while.body134.i.i, w, if.end140.i.i, while.end186.i.i, if.end183.i.i,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+5:
+ br label %"0"
+
+0:
+ br label %"1"
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ ret void
+3:
+ br i1 1, label %"1", label %"4"
+4:
+ br label %"0"
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] 5 => <Function Return>
+; CHECK: [1] 0 => 2
+
+; STAT: 2 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: 5, 0, 1, 2, 3, 4,
+; BBIT: 0, 1, 3, 4,
+
+; RNIT: 5, 0 => 2, 2,
+; RNIT: 0, 1, 3, 4,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define internal fastcc zeroext i8 @handle_compress() nounwind {
+end165:
+ br i1 1, label %false239, label %true181
+
+true181:
+ br i1 1, label %then187, label %else232
+
+then187:
+ br label %end265
+
+else232:
+ br i1 1, label %false239, label %then245
+
+false239:
+ br i1 1, label %then245, label %else259
+
+then245:
+ br i1 1, label %then251, label %end253
+
+then251:
+ br label %end253
+
+end253:
+ br label %end265
+
+else259:
+ br label %end265
+
+end265:
+ br i1 1, label %then291, label %end298
+
+then291:
+ br label %end298
+
+end298:
+ ret i8 1
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] end165 => <Function Return>
+; CHECK-NEXT: [1] end165 => end265
+; CHECK-NEXT: [2] then245 => end253
+; CHECK-NEXT: [1] end265 => end298
+
+; STAT: 4 region - The # of regions
+
+; BBIT: end165, false239, then245, then251, end253, end265, then291, end298, else259, true181, then187, else232,
+; BBIT: end165, false239, then245, then251, end253, else259, true181, then187, else232,
+; BBIT: then245, then251,
+; BBIT: end265, then291,
+
+; RNIT: end165 => end265, end265 => end298, end298,
+; RNIT: end165, false239, then245 => end253, end253, else259, true181, then187, else232,
+; RNIT: then245, then251,
+; RNIT: end265, then291,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define internal fastcc void @compress() nounwind {
+end33:
+ br i1 1, label %end124, label %lor.lhs.false95
+
+lor.lhs.false95:
+ br i1 1, label %then107, label %end172
+
+then107:
+ br i1 1, label %end124, label %then113
+
+then113:
+ br label %end124
+
+end124:
+ br label %exit
+
+end172:
+ br label %exit
+
+
+exit:
+ unreachable
+
+
+}
+; CHECK-NOT: =>
+; CHECK: [0] end33 => <Function Return>
+; CHECK-NEXT: [1] end33 => exit
+; CHECK-NEXT: [2] then107 => end124
+
+; STAT: 3 region - The # of regions
+
+; BBIT: end33, end124, exit, lor.lhs.false95, then107, then113, end172,
+; BBIT: end33, end124, lor.lhs.false95, then107, then113, end172,
+; BBIT: then107, then113,
+
+; RNIT: end33 => exit, exit,
+; RNIT: end33, end124, lor.lhs.false95, then107 => end124, end172,
+; RNIT: then107, then113,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+0:
+ br label %"1"
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ br label %"3"
+3:
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK: [1] 1 => 3
+
+; STAT: 2 region - The # of regions
+
+; BBIT: 0, 1, 2, 3,
+; BBIT: 1, 2,
+
+; RNIT: 0, 1 => 3, 3,
+; RNIT: 1, 2,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+0:
+ br i1 1, label %"1", label %"4"
+
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ br label %"4"
+3:
+ br label %"4"
+4:
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK-NEXT: [1] 0 => 4
+; CHECK-NEXT: [2] 1 => 4
+; STAT: 3 region - The # of regions
+
+; BBIT: 0, 1, 2, 4, 3,
+; BBIT: 0, 1, 2, 3,
+; BBIT: 1, 2, 3,
+
+; RNIT: 0 => 4, 4,
+; RNIT: 0, 1 => 4,
+; RNIT: 1, 2, 3,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+0:
+ br label %"1"
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ br label %"4"
+3:
+ br label %"4"
+4:
+ ret void
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK-NEXT: [1] 1 => 4
+; STAT: 2 region - The # of regions
+
+; BBIT: 0, 1, 2, 4, 3,
+; BBIT: 1, 2, 3,
+
+; RNIT: 0, 1 => 4, 4,
+; RNIT: 1, 2, 3,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define internal fastcc zeroext i8 @handle_compress() nounwind {
+entry:
+ br label %outer
+
+outer:
+ br label %body
+
+body:
+ br i1 1, label %body.i, label %if.end
+
+body.i:
+ br i1 1, label %end, label %if.end
+
+if.end:
+ br label %if.then64
+
+if.then64:
+ br label %outer
+
+end:
+ ret i8 1
+}
+; CHECK-NOT: =>
+; CHECK: [0] entry => <Function Return>
+; CHECK-NEXT: [1] outer => end
+; STAT: 2 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: entry, outer, body, body.i, end, if.end, if.then64,
+; BBIT: outer, body, body.i, if.end, if.then64,
+
+; RNIT: entry, outer => end, end,
+; RNIT: outer, body, body.i, if.end, if.then64,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+
+define void @normal_condition() nounwind {
+0:
+ br label %"1"
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ br label %"2"
+3:
+ br label %"4"
+4:
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK: [1] 1 => 4
+; STAT: 2 region - The # of regions
+; STAT: 1 region - The # of simple regions
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+0:
+ br label %"1"
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ br label %"5"
+5:
+ br i1 1, label %"11", label %"12"
+11:
+ br label %"6"
+12:
+ br label %"6"
+6:
+ br label %"2"
+3:
+ br label %"4"
+4:
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK: [1] 1 => 3
+; STAT: 2 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: 0, 1, 2, 5, 11, 6, 12, 3, 4,
+; BBIT: 1, 2, 5, 11, 6, 12,
+
+; RNIT: 0, 1 => 3, 3, 4,
+; RNIT: 1, 2, 5, 11, 6, 12,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+0:
+ br label %"7"
+7:
+ br i1 1, label %"1", label %"8"
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ br label %"5"
+5:
+ br i1 1, label %"11", label %"12"
+11:
+ br label %"6"
+12:
+ br label %"6"
+6:
+ br label %"2"
+8:
+ br label %"9"
+9:
+ br i1 1, label %"13", label %"14"
+13:
+ br label %"10"
+14:
+ br label %"10"
+10:
+ br label %"8"
+3:
+ br label %"4"
+4:
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK-NEXT: [1] 1 => 3
+; CHECK-NEXT: [1] 7 => 1
+; STAT: 3 region - The # of regions
+; STAT: 2 region - The # of simple regions
+
+; BBIT: 0, 7, 1, 2, 5, 11, 6, 12, 3, 4, 8, 9, 13, 10, 14,
+; BBIT: 7, 8, 9, 13, 10, 14,
+; BBIT: 1, 2, 5, 11, 6, 12,
+
+; RNIT: 0, 7 => 1, 1 => 3, 3, 4,
+; RNIT: 7, 8, 9, 13, 10, 14,
+; RNIT: 1, 2, 5, 11, 6, 12,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+0:
+ br label %"7"
+7:
+ br i1 1, label %"1", label %"8"
+1:
+ br i1 1, label %"2", label %"3"
+2:
+ br label %"5"
+5:
+ br i1 1, label %"11", label %"12"
+11:
+ br label %"6"
+12:
+ br label %"6"
+6:
+ br i1 1, label %"2", label %"10"
+8:
+ br label %"9"
+9:
+ br i1 1, label %"13", label %"14"
+13:
+ br label %"10"
+14:
+ br label %"10"
+10:
+ br label %"8"
+3:
+ br label %"4"
+4:
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK-NEXT: [1] 7 => 3
+; STAT: 2 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: 0, 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12, 3, 4,
+; BBIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
+
+; RNIT: 0, 7 => 3, 3, 4,
+; RNIT: 7, 1, 2, 5, 11, 6, 10, 8, 9, 13, 14, 12,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @normal_condition() nounwind {
+0:
+ br label %"1"
+1:
+ br i1 1, label %"6", label %"2"
+2:
+ br i1 1, label %"3", label %"4"
+3:
+ br label %"5"
+4:
+ br label %"5"
+5:
+ br label %"8"
+8:
+ br i1 1, label %"7", label %"9"
+9:
+ br label %"2"
+7:
+ br label %"6"
+6:
+ ret void
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK-NEXT: [1] 1 => 6
+; CHECK-NEXT: [2] 2 => 7
+; CHECK-NEXT: [3] 2 => 5
+; STAT: 4 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: 0, 1, 6, 2, 3, 5, 8, 7, 9, 4,
+; BBIT: 1, 2, 3, 5, 8, 7, 9, 4,
+; BBIT: 2, 3, 5, 8, 9, 4,
+; BBIT: 2, 3, 4,
+
+; RNIT: 0, 1 => 6, 6,
+; RNIT: 1, 2 => 7, 7,
+; RNIT: 2 => 5, 5, 8, 9,
+; RNIT: 2, 3, 4,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define internal fastcc zeroext i8 @loops_1() nounwind {
+entry:
+ br i1 1, label %outer , label %a
+
+a:
+ br label %body
+
+outer:
+ br label %body
+
+body:
+ br i1 1, label %land, label %if
+
+land:
+ br i1 1, label %exit, label %end
+
+exit:
+ br i1 1, label %if, label %end
+
+if:
+ br label %outer
+
+end:
+ ret i8 1
+}
+; CHECK-NOT: =>
+; CHECK: [0] entry => <Function Return>
+; CHECK-NEXT: [1] entry => end
+; STAT: 2 region - The # of regions
+
+; BBIT: entry, outer, body, land, exit, if, end, a,
+; BBIT: entry, outer, body, land, exit, if, a,
+
+; RNIT: entry => end, end,
+; RNIT: entry, outer, body, land, exit, if, a,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @meread_() nounwind {
+entry:
+ br label %bb23
+
+bb23:
+ br label %bb.i
+
+bb.i: ; preds = %bb.i, %bb54
+ br label %pflini_.exit
+
+pflini_.exit: ; preds = %bb.i
+ br label %bb58thread-split
+
+bb58thread-split: ; preds = %bb64, %bb61, %pflini_.exit
+ br label %bb58
+
+bb58: ; preds = %bb60, %bb58thread-split
+ br i1 1, label %bb59, label %bb23
+
+bb59: ; preds = %bb58
+ switch i32 1, label %bb60 [
+ i32 1, label %l98
+ ]
+
+bb60: ; preds = %bb59
+ br i1 1, label %bb61, label %bb58
+
+bb61: ; preds = %bb60
+ br label %bb58thread-split
+
+l98: ; preds = %bb69, %bb59
+ ret void
+}
+; CHECK-NOT: =>
+; CHECK: [0] entry => <Function Return>
+; CHECK: [1] bb23 => l98
+; STAT: 2 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: entry, bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61, l98,
+; BBIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
+
+; RNIT: entry, bb23 => l98, l98,
+; RNIT: bb23, bb.i, pflini_.exit, bb58thread-split, bb58, bb59, bb60, bb61,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @a_linear_impl_fig_1() nounwind {
+0:
+
+ br i1 1, label %"1", label %"15"
+1:
+ switch i32 0, label %"2" [ i32 0, label %"3"
+ i32 1, label %"7"]
+2:
+ br label %"4"
+3:
+ br label %"5"
+4:
+ br label %"6"
+5:
+ br label %"6"
+6:
+ br label %"7"
+7:
+ br label %"15"
+15:
+ br label %"8"
+8:
+ br label %"16"
+16:
+ br label %"9"
+9:
+ br i1 1, label %"10", label %"11"
+11:
+ br i1 1, label %"13", label %"12"
+13:
+ br label %"14"
+12:
+ br label %"14"
+14:
+ br label %"8"
+10:
+ br label %"17"
+17:
+ br label %"18"
+18:
+ ret void
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK-NEXT: [1] 0 => 15
+; CHECK-NEXT: [2] 1 => 7
+; CHECK-NEXT: [1] 8 => 10
+; CHECK-NEXT: [2] 11 => 14
+; STAT: 5 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: 0, 1, 2, 4, 6, 7, 15, 8, 16, 9, 10, 17, 18, 11, 13, 14, 12, 3, 5,
+; BBIT: 0, 1, 2, 4, 6, 7, 3, 5,
+; BBIT: 1, 2, 4, 6, 3, 5,
+; BBIT: 8, 16, 9, 11, 13, 14, 12,
+; BBIT: 11, 13, 12,
+
+; RNIT: 0 => 15, 15, 8 => 10, 10, 17, 18,
+; RNIT: 0, 1 => 7, 7,
+; RNIT: 1, 2, 4, 6, 3, 5,
+; RNIT: 8, 16, 9, 11 => 14, 14,
+; RNIT: 11, 13, 12,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define internal fastcc zeroext i8 @handle_compress() nounwind {
+entry:
+ br label %outer
+
+outer:
+ br label %body
+
+body:
+ br i1 1, label %exit172, label %end
+
+exit172:
+ br i1 1, label %end, label %outer
+
+end:
+ ret i8 1
+}
+; CHECK-NOT: =>
+; CHECK: [0] entry => <Function Return>
+; CHECK-NEXT: [1] outer => end
+
+; STAT: 2 region - The # of regions
+
+; BBIT: entry, outer, body, exit172, end,
+; BBIT: outer, body, exit172,
+
+; RNIT: entry, outer => end, end,
+; RNIT: outer, body, exit172,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @MAIN__() nounwind {
+entry:
+ br label %__label_002001.outer
+
+__label_002001.outer: ; preds = %bb236, %bb92
+ br label %__label_002001
+
+__label_002001: ; preds = %bb229, %__label_002001.outer
+ br i1 1, label %bb93, label %__label_000020
+
+bb93: ; preds = %__label_002001
+ br i1 1, label %__label_000020, label %bb197
+
+bb197: ; preds = %bb193
+ br i1 1, label %bb229, label %bb224
+
+bb224: ; preds = %bb223, %bb227
+ br i1 1, label %bb229, label %bb224
+
+bb229: ; preds = %bb227, %bb223
+ br i1 1, label %__label_002001, label %__label_002001.outer
+
+__label_000020: ; preds = %__label_002001, %bb194
+ ret void
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] entry => <Function Return>
+; CHECK-NEXT: [1] __label_002001.outer => __label_000020
+; CHECK-NEXT: [2] bb197 => bb229
+; CHECK-NEXT: [3] bb224 => bb229
+
+; STAT: 4 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: entry, __label_002001.outer, __label_002001, bb93, __label_000020, bb197, bb229, bb224,
+; BBIT: __label_002001.outer, __label_002001, bb93, bb197, bb229, bb224,
+; BBIT: bb197, bb224,
+; BBIT: bb224,
+
+; RNIT: entry, __label_002001.outer => __label_000020, __label_000020,
+; RNIT: __label_002001.outer, __label_002001, bb93, bb197 => bb229, bb229,
+; RNIT: bb197, bb224 => bb229,
+; RNIT: bb224,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define void @a_linear_impl_fig_1() nounwind {
+0:
+ br label %"1"
+1:
+ br label %"2"
+2:
+ br label %"3"
+3:
+ br i1 1, label %"13", label %"4"
+4:
+ br i1 1, label %"5", label %"1"
+5:
+ br i1 1, label %"8", label %"6"
+6:
+ br i1 1, label %"7", label %"4"
+7:
+ ret void
+8:
+ br i1 1, label %"9", label %"1"
+9:
+ br label %"10"
+10:
+ br i1 1, label %"12", label %"11"
+11:
+ br i1 1, label %"9", label %"8"
+13:
+ br i1 1, label %"2", label %"1"
+12:
+ switch i32 0, label %"1" [ i32 0, label %"9"
+ i32 1, label %"8"]
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] 0 => <Function Return>
+; CHECK-NEXT: [1] 1 => 7
+; CHECK-NEXT: [2] 1 => 4
+; CHECK-NEXT: [2] 8 => 1
+
+; STAT: 4 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: 0, 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6, 7,
+; BBIT: 1, 2, 3, 13, 4, 5, 8, 9, 10, 12, 11, 6,
+; BBIT: 1, 2, 3, 13,
+; BBIT: 8, 9, 10, 12, 11,
+
+; RNIT: 0, 1 => 7, 7,
+; RNIT: 1 => 4, 4, 5, 8 => 1, 6,
+; RNIT: 1, 2, 3, 13,
+; RNIT: 8, 9, 10, 12, 11,
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -regions -analyze < %s | FileCheck %s
+; RUN: opt -regions -stats < %s 2>&1 | FileCheck -check-prefix=STAT %s
+; RUN: opt -regions -print-region-style=bb -analyze < %s 2>&1 | FileCheck -check-prefix=BBIT %s
+; RUN: opt -regions -print-region-style=rn -analyze < %s 2>&1 | FileCheck -check-prefix=RNIT %s
+
+define internal fastcc zeroext i8 @handle_compress() nounwind {
+entry:
+ br label %outer
+
+outer:
+ br label %body
+
+body:
+ br i1 1, label %else, label %true77
+
+true77:
+ br i1 1, label %then83, label %else
+
+then83:
+ br label %outer
+
+else:
+ br label %else106
+
+else106:
+ br i1 1, label %end, label %outer
+
+end:
+ ret i8 1
+}
+
+; CHECK-NOT: =>
+; CHECK: [0] entry => <Function Return>
+; CHECK-NEXT: [1] outer => end
+; CHECK-NEXT: [2] outer => else
+
+; STAT: 3 region - The # of regions
+; STAT: 1 region - The # of simple regions
+
+; BBIT: entry, outer, body, else, else106, end, true77, then83,
+; BBIT: outer, body, else, else106, true77, then83,
+; BBIT: outer, body, true77, then83,
+
+; RNIT: entry, outer => end, end,
+; RNIT: outer => else, else, else106,
+; RNIT: outer, body, true77, then83,
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6 | grep r9
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats 2>&1 | grep asm-printer
+; | grep 35
+
+define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
+newFuncRoot:
+ br label %bb74
+
+bb78.exitStub: ; preds = %bb74
+ store i32 %d2.1, i32* %d2.1.out
+ store i32 %d3.1, i32* %d3.1.out
+ store i32 %d0.1, i32* %d0.1.out
+ store i32 %d1.1, i32* %d1.1.out
+ ret void
+
+bb74: ; preds = %bb26, %newFuncRoot
+ %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; <i32> [#uses=3]
+ %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; <i32*> [#uses=1]
+ %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %fm.1 = load i32* %fm.1.in ; <i32> [#uses=4]
+ icmp eq i32 %fp.1.rec, %tmp8 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb78.exitStub, label %bb26
+
+bb26: ; preds = %bb74
+ %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; <i32**> [#uses=1]
+ %tmp30 = load i32** %tmp28 ; <i32*> [#uses=4]
+ %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; <i32*> [#uses=1]
+ %tmp34 = load i32* %tmp33 ; <i32> [#uses=1]
+ %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; <i32*> [#uses=1]
+ %tmp39 = load i32* %tmp38 ; <i32> [#uses=1]
+ %tmp42 = mul i32 %tmp34, %fm.1 ; <i32> [#uses=1]
+ %tmp44 = add i32 %tmp42, %d0.1 ; <i32> [#uses=1]
+ %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; <i32*> [#uses=1]
+ %tmp49 = load i32* %tmp48 ; <i32> [#uses=1]
+ %tmp52 = mul i32 %tmp39, %fm.1 ; <i32> [#uses=1]
+ %tmp54 = add i32 %tmp52, %d1.1 ; <i32> [#uses=1]
+ %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; <i32*> [#uses=1]
+ %tmp59 = load i32* %tmp58 ; <i32> [#uses=1]
+ %tmp62 = mul i32 %tmp49, %fm.1 ; <i32> [#uses=1]
+ %tmp64 = add i32 %tmp62, %d2.1 ; <i32> [#uses=1]
+ %tmp67 = mul i32 %tmp59, %fm.1 ; <i32> [#uses=1]
+ %tmp69 = add i32 %tmp67, %d3.1 ; <i32> [#uses=1]
+ %tmp71.rec = add i32 %fp.1.rec, 1 ; <i32> [#uses=2]
+ %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; <i32*> [#uses=1]
+ br label %bb74
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
+; Radar 10266272
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
+target triple = "thumbv7-apple-ios4.0.0"
+; STATS-NOT: machine-sink
+
+define i32 @foo(i32 %h) nounwind readonly ssp {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %cmp = icmp slt i32 0, %h
+ br i1 %cmp, label %for.body, label %if.end299
+
+for.body: ; preds = %for.cond
+ %v.5 = select i1 undef, i32 undef, i32 0
+ %0 = load i8* undef, align 1, !tbaa !0
+ %conv88 = zext i8 %0 to i32
+ %sub89 = sub nsw i32 0, %conv88
+ %v.8 = select i1 undef, i32 undef, i32 %sub89
+ %1 = load i8* null, align 1, !tbaa !0
+ %conv108 = zext i8 %1 to i32
+ %2 = load i8* undef, align 1, !tbaa !0
+ %conv110 = zext i8 %2 to i32
+ %sub111 = sub nsw i32 %conv108, %conv110
+ %cmp112 = icmp slt i32 %sub111, 0
+ %sub115 = sub nsw i32 0, %sub111
+ %v.10 = select i1 %cmp112, i32 %sub115, i32 %sub111
+ %add62 = add i32 0, %v.5
+ %add73 = add i32 %add62, 0
+ %add84 = add i32 %add73, 0
+ %add95 = add i32 %add84, %v.8
+ %add106 = add i32 %add95, 0
+ %add117 = add i32 %add106, %v.10
+ %add128 = add i32 %add117, 0
+ %add139 = add i32 %add128, 0
+ %add150 = add i32 %add139, 0
+ %add161 = add i32 %add150, 0
+ %add172 = add i32 %add161, 0
+ br i1 undef, label %for.cond, label %if.end299
+
+if.end299: ; preds = %for.body, %for.cond
+ %s.10 = phi i32 [ %add172, %for.body ], [ 0, %for.cond ]
+ ret i32 %s.10
+}
+
+!0 = metadata !{metadata !"omnipotent char", metadata !1}
+!1 = metadata !{metadata !"Simple C/C++ TBAA", null}
+++ /dev/null
-; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
-; RUN: -mattr=+v6 | grep r9
-; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
-; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats 2>&1 | grep asm-printer
-; | grep 35
-
-define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
-newFuncRoot:
- br label %bb74
-
-bb78.exitStub: ; preds = %bb74
- store i32 %d2.1, i32* %d2.1.out
- store i32 %d3.1, i32* %d3.1.out
- store i32 %d0.1, i32* %d0.1.out
- store i32 %d1.1, i32* %d1.1.out
- ret void
-
-bb74: ; preds = %bb26, %newFuncRoot
- %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; <i32> [#uses=3]
- %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; <i32*> [#uses=1]
- %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
- %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
- %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
- %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
- %fm.1 = load i32* %fm.1.in ; <i32> [#uses=4]
- icmp eq i32 %fp.1.rec, %tmp8 ; <i1>:0 [#uses=1]
- br i1 %0, label %bb78.exitStub, label %bb26
-
-bb26: ; preds = %bb74
- %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; <i32**> [#uses=1]
- %tmp30 = load i32** %tmp28 ; <i32*> [#uses=4]
- %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; <i32*> [#uses=1]
- %tmp34 = load i32* %tmp33 ; <i32> [#uses=1]
- %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; <i32*> [#uses=1]
- %tmp39 = load i32* %tmp38 ; <i32> [#uses=1]
- %tmp42 = mul i32 %tmp34, %fm.1 ; <i32> [#uses=1]
- %tmp44 = add i32 %tmp42, %d0.1 ; <i32> [#uses=1]
- %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; <i32*> [#uses=1]
- %tmp49 = load i32* %tmp48 ; <i32> [#uses=1]
- %tmp52 = mul i32 %tmp39, %fm.1 ; <i32> [#uses=1]
- %tmp54 = add i32 %tmp52, %d1.1 ; <i32> [#uses=1]
- %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; <i32*> [#uses=1]
- %tmp59 = load i32* %tmp58 ; <i32> [#uses=1]
- %tmp62 = mul i32 %tmp49, %fm.1 ; <i32> [#uses=1]
- %tmp64 = add i32 %tmp62, %d2.1 ; <i32> [#uses=1]
- %tmp67 = mul i32 %tmp59, %fm.1 ; <i32> [#uses=1]
- %tmp69 = add i32 %tmp67, %d3.1 ; <i32> [#uses=1]
- %tmp71.rec = add i32 %fp.1.rec, 1 ; <i32> [#uses=2]
- %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; <i32*> [#uses=1]
- br label %bb74
-}
+++ /dev/null
-; RUN: llc < %s -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
-; Radar 10266272
-target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
-target triple = "thumbv7-apple-ios4.0.0"
-; STATS-NOT: machine-sink
-
-define i32 @foo(i32 %h) nounwind readonly ssp {
-entry:
- br label %for.cond
-
-for.cond: ; preds = %for.body, %entry
- %cmp = icmp slt i32 0, %h
- br i1 %cmp, label %for.body, label %if.end299
-
-for.body: ; preds = %for.cond
- %v.5 = select i1 undef, i32 undef, i32 0
- %0 = load i8* undef, align 1, !tbaa !0
- %conv88 = zext i8 %0 to i32
- %sub89 = sub nsw i32 0, %conv88
- %v.8 = select i1 undef, i32 undef, i32 %sub89
- %1 = load i8* null, align 1, !tbaa !0
- %conv108 = zext i8 %1 to i32
- %2 = load i8* undef, align 1, !tbaa !0
- %conv110 = zext i8 %2 to i32
- %sub111 = sub nsw i32 %conv108, %conv110
- %cmp112 = icmp slt i32 %sub111, 0
- %sub115 = sub nsw i32 0, %sub111
- %v.10 = select i1 %cmp112, i32 %sub115, i32 %sub111
- %add62 = add i32 0, %v.5
- %add73 = add i32 %add62, 0
- %add84 = add i32 %add73, 0
- %add95 = add i32 %add84, %v.8
- %add106 = add i32 %add95, 0
- %add117 = add i32 %add106, %v.10
- %add128 = add i32 %add117, 0
- %add139 = add i32 %add128, 0
- %add150 = add i32 %add139, 0
- %add161 = add i32 %add150, 0
- %add172 = add i32 %add161, 0
- br i1 undef, label %for.cond, label %if.end299
-
-if.end299: ; preds = %for.body, %for.cond
- %s.10 = phi i32 [ %add172, %for.body ], [ 0, %for.cond ]
- ret i32 %s.10
-}
-
-!0 = metadata !{metadata !"omnipotent char", metadata !1}
-!1 = metadata !{metadata !"Simple C/C++ TBAA", null}
+++ /dev/null
-; RUN: llc < %s -march=arm -stats 2>&1 | grep asm-printer | grep 4
-
-define i32 @t1(i32 %a) {
- %b = mul i32 %a, 9
- %c = inttoptr i32 %b to i32*
- %d = load i32* %c
- ret i32 %d
-}
-
-define i32 @t2(i32 %a) {
- %b = mul i32 %a, -7
- %c = inttoptr i32 %b to i32*
- %d = load i32* %c
- ret i32 %d
-}
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-targets = set(config.root.targets_to_build.split())
-if not 'ARM' in targets:
- config.unsupported = True
-
-if not config.root.enable_assertions:
- config.unsupported = True
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=arm -stats 2>&1 | grep asm-printer | grep 4
+
+define i32 @t1(i32 %a) {
+ %b = mul i32 %a, 9
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
+
+define i32 @t2(i32 %a) {
+ %b = mul i32 %a, -7
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
+++ /dev/null
-; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
-; RUN: grep "4 .*Number of machine instrs printed"
-
-;; Integer absolute value, should produce something as good as:
-;; srawi r2, r3, 31
-;; add r3, r3, r2
-;; xor r3, r3, r2
-;; blr
-define i32 @test(i32 %a) {
- %tmp1neg = sub i32 0, %a
- %b = icmp sgt i32 %a, -1
- %abs = select i1 %b, i32 %a, i32 %tmp1neg
- ret i32 %abs
-}
-
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-targets = set(config.root.targets_to_build.split())
-if not 'PowerPC' in targets:
- config.unsupported = True
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
-; RUN: grep "Number of machine instrs printed" | grep 12
-
-define i16 @Trans16Bit(i32 %srcA, i32 %srcB, i32 %alpha) {
- %tmp1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
- %tmp2 = and i32 %tmp1, 32505856 ; <i32> [#uses=1]
- %tmp4 = and i32 %srcA, 31775 ; <i32> [#uses=1]
- %tmp5 = or i32 %tmp2, %tmp4 ; <i32> [#uses=1]
- %tmp7 = shl i32 %srcB, 15 ; <i32> [#uses=1]
- %tmp8 = and i32 %tmp7, 32505856 ; <i32> [#uses=1]
- %tmp10 = and i32 %srcB, 31775 ; <i32> [#uses=1]
- %tmp11 = or i32 %tmp8, %tmp10 ; <i32> [#uses=1]
- %tmp14 = mul i32 %tmp5, %alpha ; <i32> [#uses=1]
- %tmp16 = sub i32 32, %alpha ; <i32> [#uses=1]
- %tmp18 = mul i32 %tmp11, %tmp16 ; <i32> [#uses=1]
- %tmp19 = add i32 %tmp18, %tmp14 ; <i32> [#uses=2]
- %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
- %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
- %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
- %tmp23 = lshr i32 %tmp19, 20 ; <i32> [#uses=1]
- %tmp23.upgrd.2 = trunc i32 %tmp23 to i16 ; <i16> [#uses=1]
- %tmp24 = and i16 %tmp23.upgrd.2, 992 ; <i16> [#uses=1]
- %tmp25 = or i16 %tmp, %tmp24 ; <i16> [#uses=1]
- ret i16 %tmp25
-}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
+; RUN: grep "4 .*Number of machine instrs printed"
+
+;; Integer absolute value, should produce something as good as:
+;; srawi r2, r3, 31
+;; add r3, r3, r2
+;; xor r3, r3, r2
+;; blr
+define i32 @test(i32 %a) {
+ %tmp1neg = sub i32 0, %a
+ %b = icmp sgt i32 %a, -1
+ %abs = select i1 %b, i32 %a, i32 %tmp1neg
+ ret i32 %abs
+}
+
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
+; RUN: grep "Number of machine instrs printed" | grep 12
+
+define i16 @Trans16Bit(i32 %srcA, i32 %srcB, i32 %alpha) {
+ %tmp1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 32505856 ; <i32> [#uses=1]
+ %tmp4 = and i32 %srcA, 31775 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp2, %tmp4 ; <i32> [#uses=1]
+ %tmp7 = shl i32 %srcB, 15 ; <i32> [#uses=1]
+ %tmp8 = and i32 %tmp7, 32505856 ; <i32> [#uses=1]
+ %tmp10 = and i32 %srcB, 31775 ; <i32> [#uses=1]
+ %tmp11 = or i32 %tmp8, %tmp10 ; <i32> [#uses=1]
+ %tmp14 = mul i32 %tmp5, %alpha ; <i32> [#uses=1]
+ %tmp16 = sub i32 32, %alpha ; <i32> [#uses=1]
+ %tmp18 = mul i32 %tmp11, %tmp16 ; <i32> [#uses=1]
+ %tmp19 = add i32 %tmp18, %tmp14 ; <i32> [#uses=2]
+ %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
+ %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
+ %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
+ %tmp23 = lshr i32 %tmp19, 20 ; <i32> [#uses=1]
+ %tmp23.upgrd.2 = trunc i32 %tmp23 to i16 ; <i16> [#uses=1]
+ %tmp24 = and i16 %tmp23.upgrd.2, 992 ; <i16> [#uses=1]
+ %tmp25 = or i16 %tmp, %tmp24 ; <i16> [#uses=1]
+ ret i16 %tmp25
+}
--- /dev/null
+; REQUIRES: asserts
+; The old instruction selector used to load all arguments to a call up in
+; registers, then start pushing them all onto the stack. This is bad news as
+; it makes a ton of annoying overlapping live ranges. This code should not
+; cause spills!
+;
+; RUN: llc < %s -march=x86 -stats 2>&1 | not grep spilled
+
+target datalayout = "e-p:32:32"
+
+define i32 @test(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
+ ret i32 0
+}
+
+define i32 @main() {
+ %X = call i32 @test( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -stats 2>&1 | \
+; RUN: grep asm-printer | grep 7
+
+define i32 @g(i32 %a, i32 %b) nounwind {
+ %tmp.1 = shl i32 %b, 1 ; <i32> [#uses=1]
+ %tmp.3 = add i32 %tmp.1, %a ; <i32> [#uses=1]
+ %tmp.5 = mul i32 %tmp.3, %a ; <i32> [#uses=1]
+ %tmp.8 = mul i32 %b, %b ; <i32> [#uses=1]
+ %tmp.9 = add i32 %tmp.5, %tmp.8 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | \
+; RUN: not grep "Number of register spills"
+; END.
+
+
+define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) {
+ %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9]
+ %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
+ %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1]
+ %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1]
+ %tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp60 = xor <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp61 = bitcast <4 x i32> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp75 = bitcast <4 x float> %tmp74 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp88 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp89 = bitcast <4 x float> %tmp88 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp98 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp75, <4 x i32> %tmp89 ) ; <<4 x i32>> [#uses=1]
+ %tmp102 = bitcast <8 x i16> %tmp98 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp105.upgrd.2, <4 x float>* %a
+ %tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp119 = xor <4 x i32> %tmp109, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp120 = bitcast <4 x i32> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp133 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp109.upgrd.3, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp134 = bitcast <4 x float> %tmp133 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp147 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp148 = bitcast <4 x float> %tmp147 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp159 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp134, <4 x i32> %tmp148 ) ; <<4 x i32>> [#uses=1]
+ %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp166 = shufflevector <8 x i16> %tmp164, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp166.upgrd.4 = bitcast <8 x i16> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp166.upgrd.4, <4 x float>* %b
+ %tmp169 = bitcast <4 x float> %tmp48 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp170 = shufflevector <4 x i32> %tmp169, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp170.upgrd.5 = bitcast <4 x i32> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp180 = xor <4 x i32> %tmp170, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp181 = bitcast <4 x i32> %tmp180 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp194 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp170.upgrd.5, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp195 = bitcast <4 x float> %tmp194 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp208 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp209 = bitcast <4 x float> %tmp208 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp220 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp195, <4 x i32> %tmp209 ) ; <<4 x i32>> [#uses=1]
+ %tmp224 = bitcast <8 x i16> %tmp220 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp225 = shufflevector <8 x i16> %tmp224, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp227 = shufflevector <8 x i16> %tmp225, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp227.upgrd.6 = bitcast <8 x i16> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp227.upgrd.6, <4 x float>* %c
+ %tmp230 = bitcast <4 x float> %tmp50 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp231 = shufflevector <4 x i32> %tmp230, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp231.upgrd.7 = bitcast <4 x i32> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp241 = xor <4 x i32> %tmp231, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp242 = bitcast <4 x i32> %tmp241 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp255 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp231.upgrd.7, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp256 = bitcast <4 x float> %tmp255 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp269 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp242, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp270 = bitcast <4 x float> %tmp269 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp281 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp256, <4 x i32> %tmp270 ) ; <<4 x i32>> [#uses=1]
+ %tmp285 = bitcast <8 x i16> %tmp281 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp286 = shufflevector <8 x i16> %tmp285, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp288 = shufflevector <8 x i16> %tmp286, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp288.upgrd.8 = bitcast <8 x i16> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp288.upgrd.8, <4 x float>* %d
+ ret i32 0
+}
+
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
+
+declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -relocation-model=static -stats 2>&1 | \
+; RUN: grep asm-printer | grep 14
+;
+@size20 = external global i32 ; <i32*> [#uses=1]
+@in5 = external global i8* ; <i8**> [#uses=1]
+
+define i32 @compare(i8* %a, i8* %b) nounwind {
+ %tmp = bitcast i8* %a to i32* ; <i32*> [#uses=1]
+ %tmp1 = bitcast i8* %b to i32* ; <i32*> [#uses=1]
+ %tmp.upgrd.1 = load i32* @size20 ; <i32> [#uses=1]
+ %tmp.upgrd.2 = load i8** @in5 ; <i8*> [#uses=2]
+ %tmp3 = load i32* %tmp1 ; <i32> [#uses=1]
+ %gep.upgrd.3 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
+ %tmp4 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; <i8*> [#uses=2]
+ %tmp7 = load i32* %tmp ; <i32> [#uses=1]
+ %gep.upgrd.4 = zext i32 %tmp7 to i64 ; <i64> [#uses=1]
+ %tmp8 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; <i8*> [#uses=2]
+ %tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; <i32> [#uses=1]
+ ret i32 %tmp.upgrd.5
+}
+
+declare i32 @memcmp(i8*, i8*, i32)
+
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -stats 2>&1 | \
+; RUN: grep asm-printer | grep 13
+
+define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
+newFuncRoot:
+ br label %cond_true456.i
+bb459.i.exitStub: ; preds = %cond_true456.i
+ store i32 %tmp449.i, i32* %tmp449.i.out
+ ret void
+cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot
+ %__s441.2.4.i = phi i8* [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; <i8*> [#uses=2]
+ %__h.2.4.i = phi i32 [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; <i32> [#uses=1]
+ %tmp446.i = mul i32 %__h.2.4.i, 5 ; <i32> [#uses=1]
+ %tmp.i = load i8* %__s441.2.4.i ; <i8> [#uses=1]
+ %tmp448.i = sext i8 %tmp.i to i32 ; <i32> [#uses=1]
+ %tmp449.i = add i32 %tmp448.i, %tmp446.i ; <i32> [#uses=2]
+ %tmp450.i = ptrtoint i8* %__s441.2.4.i to i32 ; <i32> [#uses=1]
+ %tmp451.i = add i32 %tmp450.i, 1 ; <i32> [#uses=1]
+ %tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to i8* ; <i8*> [#uses=2]
+ %tmp45435.i = load i8* %tmp451.i.upgrd.1 ; <i8> [#uses=1]
+ %tmp45536.i = icmp eq i8 %tmp45435.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i
+}
+
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats -realign-stack=0 2>&1 | \
+; RUN: grep "asm-printer" | grep 35
+
+target datalayout = "e-p:32:32"
+define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
+entry:
+ %tmp9 = icmp slt i32 %M, 5 ; <i1> [#uses=1]
+ br i1 %tmp9, label %return, label %cond_true
+
+cond_true: ; preds = %cond_true, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %tmp. = shl i32 %indvar, 2 ; <i32> [#uses=1]
+ %tmp.10 = add nsw i32 %tmp., 1 ; <i32> [#uses=2]
+ %tmp31 = add nsw i32 %tmp.10, -1 ; <i32> [#uses=4]
+ %tmp32 = getelementptr i32* %mpp, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp34 = bitcast i32* %tmp32 to <16 x i8>* ; <i8*> [#uses=1]
+ %tmp = load <16 x i8>* %tmp34, align 1
+ %tmp42 = getelementptr i32* %tpmm, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp46 = load <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1]
+ %tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2]
+ %tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp62 = getelementptr i32* %ip, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp65 = bitcast i32* %tmp62 to <16 x i8>* ; <i8*> [#uses=1]
+ %tmp66 = load <16 x i8>* %tmp65, align 1
+ %tmp73 = getelementptr i32* %tpim, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp77 = load <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1]
+ %tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2]
+ %tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp99 = tail call <4 x i32> @llvm.x86.sse2.psra.d( <4 x i32> %tmp88, <4 x i32> %tmp55 ) ; <<4 x i32>> [#uses=1]
+ %tmp99.upgrd.5 = bitcast <4 x i32> %tmp99 to <2 x i64> ; <<2 x i64>> [#uses=2]
+ %tmp110 = xor <2 x i64> %tmp99.upgrd.5, < i64 -1, i64 -1 > ; <<2 x i64>> [#uses=1]
+ %tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1]
+ %tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1]
+ %tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1]
+ %tmp137 = getelementptr i32* %mc, i32 %tmp.10 ; <i32*> [#uses=1]
+ %tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7
+ %tmp147 = add nsw i32 %tmp.10, 8 ; <i32> [#uses=1]
+ %tmp.upgrd.8 = icmp ne i32 %tmp147, %M ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp.upgrd.8, label %cond_true, label %return
+
+return: ; preds = %cond_true, %entry
+ ret void
+}
+
+declare <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32>, <4 x i32>)
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
+; PR1909
+
+@.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1]
+
+define void @minmax(float* %result) nounwind optsize {
+entry:
+ %tmp2 = load float* %result, align 4 ; <float> [#uses=6]
+ %tmp4 = getelementptr float* %result, i32 2 ; <float*> [#uses=5]
+ %tmp5 = load float* %tmp4, align 4 ; <float> [#uses=10]
+ %tmp7 = getelementptr float* %result, i32 4 ; <float*> [#uses=5]
+ %tmp8 = load float* %tmp7, align 4 ; <float> [#uses=8]
+ %tmp10 = getelementptr float* %result, i32 6 ; <float*> [#uses=3]
+ %tmp11 = load float* %tmp10, align 4 ; <float> [#uses=8]
+ %tmp12 = fcmp olt float %tmp8, %tmp11 ; <i1> [#uses=5]
+ br i1 %tmp12, label %bb, label %bb21
+
+bb: ; preds = %entry
+ %tmp23469 = fcmp olt float %tmp5, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp23469, label %bb26, label %bb30
+
+bb21: ; preds = %entry
+ %tmp23 = fcmp olt float %tmp5, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp23, label %bb26, label %bb30
+
+bb26: ; preds = %bb21, %bb
+ %tmp52471 = fcmp olt float %tmp2, %tmp5 ; <i1> [#uses=1]
+ br i1 %tmp52471, label %bb111, label %bb59
+
+bb30: ; preds = %bb21, %bb
+ br i1 %tmp12, label %bb40, label %bb50
+
+bb40: ; preds = %bb30
+ %tmp52473 = fcmp olt float %tmp2, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp52473, label %bb111, label %bb59
+
+bb50: ; preds = %bb30
+ %tmp52 = fcmp olt float %tmp2, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp52, label %bb111, label %bb59
+
+bb59: ; preds = %bb50, %bb40, %bb26
+ br i1 %tmp12, label %bb72, label %bb80
+
+bb72: ; preds = %bb59
+ %tmp82475 = fcmp olt float %tmp5, %tmp8 ; <i1> [#uses=2]
+ %brmerge786 = or i1 %tmp82475, %tmp12 ; <i1> [#uses=1]
+ %tmp4.mux787 = select i1 %tmp82475, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge786, label %bb111, label %bb103
+
+bb80: ; preds = %bb59
+ %tmp82 = fcmp olt float %tmp5, %tmp11 ; <i1> [#uses=2]
+ %brmerge = or i1 %tmp82, %tmp12 ; <i1> [#uses=1]
+ %tmp4.mux = select i1 %tmp82, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge, label %bb111, label %bb103
+
+bb103: ; preds = %bb80, %bb72
+ br label %bb111
+
+bb111: ; preds = %bb103, %bb80, %bb72, %bb50, %bb40, %bb26
+ %iftmp.0.0.in = phi float* [ %tmp10, %bb103 ], [ %result, %bb26 ], [ %result, %bb40 ], [ %result, %bb50 ], [ %tmp4.mux, %bb80 ], [ %tmp4.mux787, %bb72 ] ; <float*> [#uses=1]
+ %iftmp.0.0 = load float* %iftmp.0.0.in ; <float> [#uses=1]
+ %tmp125 = fcmp ogt float %tmp8, %tmp11 ; <i1> [#uses=5]
+ br i1 %tmp125, label %bb128, label %bb136
+
+bb128: ; preds = %bb111
+ %tmp138477 = fcmp ogt float %tmp5, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp138477, label %bb141, label %bb145
+
+bb136: ; preds = %bb111
+ %tmp138 = fcmp ogt float %tmp5, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp138, label %bb141, label %bb145
+
+bb141: ; preds = %bb136, %bb128
+ %tmp167479 = fcmp ogt float %tmp2, %tmp5 ; <i1> [#uses=1]
+ br i1 %tmp167479, label %bb226, label %bb174
+
+bb145: ; preds = %bb136, %bb128
+ br i1 %tmp125, label %bb155, label %bb165
+
+bb155: ; preds = %bb145
+ %tmp167481 = fcmp ogt float %tmp2, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp167481, label %bb226, label %bb174
+
+bb165: ; preds = %bb145
+ %tmp167 = fcmp ogt float %tmp2, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp167, label %bb226, label %bb174
+
+bb174: ; preds = %bb165, %bb155, %bb141
+ br i1 %tmp125, label %bb187, label %bb195
+
+bb187: ; preds = %bb174
+ %tmp197483 = fcmp ogt float %tmp5, %tmp8 ; <i1> [#uses=2]
+ %brmerge790 = or i1 %tmp197483, %tmp125 ; <i1> [#uses=1]
+ %tmp4.mux791 = select i1 %tmp197483, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge790, label %bb226, label %bb218
+
+bb195: ; preds = %bb174
+ %tmp197 = fcmp ogt float %tmp5, %tmp11 ; <i1> [#uses=2]
+ %brmerge788 = or i1 %tmp197, %tmp125 ; <i1> [#uses=1]
+ %tmp4.mux789 = select i1 %tmp197, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge788, label %bb226, label %bb218
+
+bb218: ; preds = %bb195, %bb187
+ br label %bb226
+
+bb226: ; preds = %bb218, %bb195, %bb187, %bb165, %bb155, %bb141
+ %iftmp.7.0.in = phi float* [ %tmp10, %bb218 ], [ %result, %bb141 ], [ %result, %bb155 ], [ %result, %bb165 ], [ %tmp4.mux789, %bb195 ], [ %tmp4.mux791, %bb187 ] ; <float*> [#uses=1]
+ %iftmp.7.0 = load float* %iftmp.7.0.in ; <float> [#uses=1]
+ %tmp229 = getelementptr float* %result, i32 1 ; <float*> [#uses=7]
+ %tmp230 = load float* %tmp229, align 4 ; <float> [#uses=6]
+ %tmp232 = getelementptr float* %result, i32 3 ; <float*> [#uses=5]
+ %tmp233 = load float* %tmp232, align 4 ; <float> [#uses=10]
+ %tmp235 = getelementptr float* %result, i32 5 ; <float*> [#uses=5]
+ %tmp236 = load float* %tmp235, align 4 ; <float> [#uses=8]
+ %tmp238 = getelementptr float* %result, i32 7 ; <float*> [#uses=3]
+ %tmp239 = load float* %tmp238, align 4 ; <float> [#uses=8]
+ %tmp240 = fcmp olt float %tmp236, %tmp239 ; <i1> [#uses=5]
+ br i1 %tmp240, label %bb243, label %bb251
+
+bb243: ; preds = %bb226
+ %tmp253485 = fcmp olt float %tmp233, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp253485, label %bb256, label %bb260
+
+bb251: ; preds = %bb226
+ %tmp253 = fcmp olt float %tmp233, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp253, label %bb256, label %bb260
+
+bb256: ; preds = %bb251, %bb243
+ %tmp282487 = fcmp olt float %tmp230, %tmp233 ; <i1> [#uses=1]
+ br i1 %tmp282487, label %bb341, label %bb289
+
+bb260: ; preds = %bb251, %bb243
+ br i1 %tmp240, label %bb270, label %bb280
+
+bb270: ; preds = %bb260
+ %tmp282489 = fcmp olt float %tmp230, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp282489, label %bb341, label %bb289
+
+bb280: ; preds = %bb260
+ %tmp282 = fcmp olt float %tmp230, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp282, label %bb341, label %bb289
+
+bb289: ; preds = %bb280, %bb270, %bb256
+ br i1 %tmp240, label %bb302, label %bb310
+
+bb302: ; preds = %bb289
+ %tmp312491 = fcmp olt float %tmp233, %tmp236 ; <i1> [#uses=2]
+ %brmerge793 = or i1 %tmp312491, %tmp240 ; <i1> [#uses=1]
+ %tmp232.mux794 = select i1 %tmp312491, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge793, label %bb341, label %bb333
+
+bb310: ; preds = %bb289
+ %tmp312 = fcmp olt float %tmp233, %tmp239 ; <i1> [#uses=2]
+ %brmerge792 = or i1 %tmp312, %tmp240 ; <i1> [#uses=1]
+ %tmp232.mux = select i1 %tmp312, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge792, label %bb341, label %bb333
+
+bb333: ; preds = %bb310, %bb302
+ br label %bb341
+
+bb341: ; preds = %bb333, %bb310, %bb302, %bb280, %bb270, %bb256
+ %iftmp.14.0.in = phi float* [ %tmp238, %bb333 ], [ %tmp229, %bb280 ], [ %tmp229, %bb270 ], [ %tmp229, %bb256 ], [ %tmp232.mux, %bb310 ], [ %tmp232.mux794, %bb302 ] ; <float*> [#uses=1]
+ %iftmp.14.0 = load float* %iftmp.14.0.in ; <float> [#uses=1]
+ %tmp355 = fcmp ogt float %tmp236, %tmp239 ; <i1> [#uses=5]
+ br i1 %tmp355, label %bb358, label %bb366
+
+bb358: ; preds = %bb341
+ %tmp368493 = fcmp ogt float %tmp233, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp368493, label %bb371, label %bb375
+
+bb366: ; preds = %bb341
+ %tmp368 = fcmp ogt float %tmp233, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp368, label %bb371, label %bb375
+
+bb371: ; preds = %bb366, %bb358
+ %tmp397495 = fcmp ogt float %tmp230, %tmp233 ; <i1> [#uses=1]
+ br i1 %tmp397495, label %bb456, label %bb404
+
+bb375: ; preds = %bb366, %bb358
+ br i1 %tmp355, label %bb385, label %bb395
+
+bb385: ; preds = %bb375
+ %tmp397497 = fcmp ogt float %tmp230, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp397497, label %bb456, label %bb404
+
+bb395: ; preds = %bb375
+ %tmp397 = fcmp ogt float %tmp230, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp397, label %bb456, label %bb404
+
+bb404: ; preds = %bb395, %bb385, %bb371
+ br i1 %tmp355, label %bb417, label %bb425
+
+bb417: ; preds = %bb404
+ %tmp427499 = fcmp ogt float %tmp233, %tmp236 ; <i1> [#uses=2]
+ %brmerge797 = or i1 %tmp427499, %tmp355 ; <i1> [#uses=1]
+ %tmp232.mux798 = select i1 %tmp427499, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge797, label %bb456, label %bb448
+
+bb425: ; preds = %bb404
+ %tmp427 = fcmp ogt float %tmp233, %tmp239 ; <i1> [#uses=2]
+ %brmerge795 = or i1 %tmp427, %tmp355 ; <i1> [#uses=1]
+ %tmp232.mux796 = select i1 %tmp427, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge795, label %bb456, label %bb448
+
+bb448: ; preds = %bb425, %bb417
+ br label %bb456
+
+bb456: ; preds = %bb448, %bb425, %bb417, %bb395, %bb385, %bb371
+ %iftmp.21.0.in = phi float* [ %tmp238, %bb448 ], [ %tmp229, %bb395 ], [ %tmp229, %bb385 ], [ %tmp229, %bb371 ], [ %tmp232.mux796, %bb425 ], [ %tmp232.mux798, %bb417 ] ; <float*> [#uses=1]
+ %iftmp.21.0 = load float* %iftmp.21.0.in ; <float> [#uses=1]
+ %tmp458459 = fpext float %iftmp.21.0 to double ; <double> [#uses=1]
+ %tmp460461 = fpext float %iftmp.7.0 to double ; <double> [#uses=1]
+ %tmp462463 = fpext float %iftmp.14.0 to double ; <double> [#uses=1]
+ %tmp464465 = fpext float %iftmp.0.0 to double ; <double> [#uses=1]
+ %tmp467 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([48 x i8]* @.str, i32 0, i32 0), double %tmp464465, double %tmp462463, double %tmp460461, double %tmp458459 ) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...) nounwind
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
+; Now this test spills one register. But a reload in the loop is cheaper than
+; the divsd so it's a win.
+
+define fastcc void @fourn(double* %data, i32 %isign) nounwind {
+; CHECK: fourn
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2]
+ %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1]
+ %0 = add i32 %indvar93, 2 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1]
+ br i1 %1, label %bb30.loopexit, label %bb
+
+; CHECK: %bb30.loopexit
+; CHECK: divsd %xmm0
+; CHECK: movsd %xmm0, 16(%esp)
+; CHECK: %bb3
+bb3: ; preds = %bb30.loopexit, %bb25, %bb3
+ %2 = load i32* null, align 4 ; <i32> [#uses=1]
+ %3 = mul i32 %2, 0 ; <i32> [#uses=1]
+ %4 = icmp slt i32 0, %3 ; <i1> [#uses=1]
+ br i1 %4, label %bb18, label %bb3
+
+bb18: ; preds = %bb3
+ %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1]
+ %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1]
+ br label %bb24.preheader
+
+bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader
+ br label %bb22.preheader
+
+bb25: ; preds = %bb24.preheader
+ %7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0]
+ %8 = add i32 %i3.122100, 0 ; <i32> [#uses=1]
+ %9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb3, label %bb24.preheader
+
+bb24.preheader: ; preds = %bb25, %bb18
+ %i3.122100 = or i32 0, 1 ; <i32> [#uses=2]
+ %10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1]
+ br i1 %10, label %bb25, label %bb22.preheader
+
+bb30.loopexit: ; preds = %bb
+ %11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1]
+ br label %bb3
+}
+
+declare double @sin(double) nounwind readonly
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | not grep commuted
+; rdar://6608609
+
+define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
+entry:
+ %tmp.i2 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp2.i = or <2 x i64> %tmp.i2, <i64 4607632778762754458, i64 4607632778762754458> ; <<2 x i64>> [#uses=1]
+ %tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
+ %0 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %A, <2 x double> %tmp3.i) nounwind readnone ; <<2 x double>> [#uses=1]
+ %tmp.i = fadd <2 x double> %0, %C ; <<2 x double>> [#uses=1]
+ ret <2 x double> %tmp.i
+}
+
+declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats 2>&1 | grep "5 machine-licm"
+; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn | FileCheck %s
+; rdar://6627786
+; rdar://7792037
+
+target triple = "x86_64-apple-darwin10.0"
+ %struct.Key = type { i64 }
+ %struct.__Rec = type opaque
+ %struct.__vv = type { }
+
+define %struct.__vv* @t(%struct.Key* %desc, i64 %p) nounwind ssp {
+entry:
+ br label %bb4
+
+bb4: ; preds = %bb.i, %bb26, %bb4, %entry
+; CHECK: %bb4
+; CHECK: xorb
+; CHECK: callq
+; CHECK: movq
+; CHECK: xorl
+; CHECK: xorb
+
+ %0 = call i32 (...)* @xxGetOffsetForCode(i32 undef) nounwind ; <i32> [#uses=0]
+ %ins = or i64 %p, 2097152 ; <i64> [#uses=1]
+ %1 = call i32 (...)* @xxCalculateMidType(%struct.Key* %desc, i32 0) nounwind ; <i32> [#uses=1]
+ %cond = icmp eq i32 %1, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb26, label %bb4
+
+bb26: ; preds = %bb4
+ %2 = and i64 %ins, 15728640 ; <i64> [#uses=1]
+ %cond.i = icmp eq i64 %2, 1048576 ; <i1> [#uses=1]
+ br i1 %cond.i, label %bb.i, label %bb4
+
+bb.i: ; preds = %bb26
+ %3 = load i32* null, align 4 ; <i32> [#uses=1]
+ %4 = uitofp i32 %3 to float ; <float> [#uses=1]
+ %.sum13.i = add i64 0, 4 ; <i64> [#uses=1]
+ %5 = getelementptr i8* null, i64 %.sum13.i ; <i8*> [#uses=1]
+ %6 = bitcast i8* %5 to i32* ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = uitofp i32 %7 to float ; <float> [#uses=1]
+ %.sum.i = add i64 0, 8 ; <i64> [#uses=1]
+ %9 = getelementptr i8* null, i64 %.sum.i ; <i8*> [#uses=1]
+ %10 = bitcast i8* %9 to i32* ; <i32*> [#uses=1]
+ %11 = load i32* %10, align 4 ; <i32> [#uses=1]
+ %12 = uitofp i32 %11 to float ; <float> [#uses=1]
+ %13 = insertelement <4 x float> undef, float %4, i32 0 ; <<4 x float>> [#uses=1]
+ %14 = insertelement <4 x float> %13, float %8, i32 1 ; <<4 x float>> [#uses=1]
+ %15 = insertelement <4 x float> %14, float %12, i32 2 ; <<4 x float>> [#uses=1]
+ store <4 x float> %15, <4 x float>* null, align 16
+ br label %bb4
+}
+
+declare i32 @xxGetOffsetForCode(...)
+
+declare i32 @xxCalculateMidType(...)
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static -o /dev/null -stats -info-output-file - > %t
+; RUN: not grep spill %t
+; RUN: not grep "%rsp" %t
+; RUN: not grep "%rbp" %t
+
+; The register-pressure scheduler should be able to schedule this in a
+; way that does not require spills.
+
+@X = external global i64 ; <i64*> [#uses=25]
+
+define fastcc i64 @foo() nounwind {
+ %tmp = load volatile i64* @X ; <i64> [#uses=7]
+ %tmp1 = load volatile i64* @X ; <i64> [#uses=5]
+ %tmp2 = load volatile i64* @X ; <i64> [#uses=3]
+ %tmp3 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp4 = load volatile i64* @X ; <i64> [#uses=5]
+ %tmp5 = load volatile i64* @X ; <i64> [#uses=3]
+ %tmp6 = load volatile i64* @X ; <i64> [#uses=2]
+ %tmp7 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp8 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp9 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp10 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp11 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp12 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp13 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp14 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp15 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp16 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp17 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp18 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp19 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp20 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp21 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp22 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp23 = load volatile i64* @X ; <i64> [#uses=1]
+ %tmp24 = call i64 @llvm.bswap.i64(i64 %tmp8) ; <i64> [#uses=1]
+ %tmp25 = add i64 %tmp6, %tmp5 ; <i64> [#uses=1]
+ %tmp26 = add i64 %tmp25, %tmp4 ; <i64> [#uses=1]
+ %tmp27 = add i64 %tmp7, %tmp4 ; <i64> [#uses=1]
+ %tmp28 = add i64 %tmp27, %tmp26 ; <i64> [#uses=1]
+ %tmp29 = add i64 %tmp28, %tmp24 ; <i64> [#uses=2]
+ %tmp30 = add i64 %tmp2, %tmp1 ; <i64> [#uses=1]
+ %tmp31 = add i64 %tmp30, %tmp ; <i64> [#uses=1]
+ %tmp32 = add i64 %tmp2, %tmp1 ; <i64> [#uses=1]
+ %tmp33 = add i64 %tmp31, %tmp32 ; <i64> [#uses=1]
+ %tmp34 = add i64 %tmp29, %tmp3 ; <i64> [#uses=5]
+ %tmp35 = add i64 %tmp33, %tmp ; <i64> [#uses=1]
+ %tmp36 = add i64 %tmp35, %tmp29 ; <i64> [#uses=7]
+ %tmp37 = call i64 @llvm.bswap.i64(i64 %tmp9) ; <i64> [#uses=1]
+ %tmp38 = add i64 %tmp4, %tmp5 ; <i64> [#uses=1]
+ %tmp39 = add i64 %tmp38, %tmp34 ; <i64> [#uses=1]
+ %tmp40 = add i64 %tmp6, %tmp37 ; <i64> [#uses=1]
+ %tmp41 = add i64 %tmp40, %tmp39 ; <i64> [#uses=1]
+ %tmp42 = add i64 %tmp41, %tmp34 ; <i64> [#uses=2]
+ %tmp43 = add i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp44 = add i64 %tmp36, %tmp43 ; <i64> [#uses=1]
+ %tmp45 = add i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp46 = add i64 %tmp44, %tmp45 ; <i64> [#uses=1]
+ %tmp47 = add i64 %tmp42, %tmp2 ; <i64> [#uses=5]
+ %tmp48 = add i64 %tmp36, %tmp46 ; <i64> [#uses=1]
+ %tmp49 = add i64 %tmp48, %tmp42 ; <i64> [#uses=7]
+ %tmp50 = call i64 @llvm.bswap.i64(i64 %tmp10) ; <i64> [#uses=1]
+ %tmp51 = add i64 %tmp34, %tmp4 ; <i64> [#uses=1]
+ %tmp52 = add i64 %tmp51, %tmp47 ; <i64> [#uses=1]
+ %tmp53 = add i64 %tmp5, %tmp50 ; <i64> [#uses=1]
+ %tmp54 = add i64 %tmp53, %tmp52 ; <i64> [#uses=1]
+ %tmp55 = add i64 %tmp54, %tmp47 ; <i64> [#uses=2]
+ %tmp56 = add i64 %tmp36, %tmp ; <i64> [#uses=1]
+ %tmp57 = add i64 %tmp49, %tmp56 ; <i64> [#uses=1]
+ %tmp58 = add i64 %tmp36, %tmp ; <i64> [#uses=1]
+ %tmp59 = add i64 %tmp57, %tmp58 ; <i64> [#uses=1]
+ %tmp60 = add i64 %tmp55, %tmp1 ; <i64> [#uses=5]
+ %tmp61 = add i64 %tmp49, %tmp59 ; <i64> [#uses=1]
+ %tmp62 = add i64 %tmp61, %tmp55 ; <i64> [#uses=7]
+ %tmp63 = call i64 @llvm.bswap.i64(i64 %tmp11) ; <i64> [#uses=1]
+ %tmp64 = add i64 %tmp47, %tmp34 ; <i64> [#uses=1]
+ %tmp65 = add i64 %tmp64, %tmp60 ; <i64> [#uses=1]
+ %tmp66 = add i64 %tmp4, %tmp63 ; <i64> [#uses=1]
+ %tmp67 = add i64 %tmp66, %tmp65 ; <i64> [#uses=1]
+ %tmp68 = add i64 %tmp67, %tmp60 ; <i64> [#uses=2]
+ %tmp69 = add i64 %tmp49, %tmp36 ; <i64> [#uses=1]
+ %tmp70 = add i64 %tmp62, %tmp69 ; <i64> [#uses=1]
+ %tmp71 = add i64 %tmp49, %tmp36 ; <i64> [#uses=1]
+ %tmp72 = add i64 %tmp70, %tmp71 ; <i64> [#uses=1]
+ %tmp73 = add i64 %tmp68, %tmp ; <i64> [#uses=5]
+ %tmp74 = add i64 %tmp62, %tmp72 ; <i64> [#uses=1]
+ %tmp75 = add i64 %tmp74, %tmp68 ; <i64> [#uses=7]
+ %tmp76 = call i64 @llvm.bswap.i64(i64 %tmp12) ; <i64> [#uses=1]
+ %tmp77 = add i64 %tmp60, %tmp47 ; <i64> [#uses=1]
+ %tmp78 = add i64 %tmp77, %tmp73 ; <i64> [#uses=1]
+ %tmp79 = add i64 %tmp34, %tmp76 ; <i64> [#uses=1]
+ %tmp80 = add i64 %tmp79, %tmp78 ; <i64> [#uses=1]
+ %tmp81 = add i64 %tmp80, %tmp73 ; <i64> [#uses=2]
+ %tmp82 = add i64 %tmp62, %tmp49 ; <i64> [#uses=1]
+ %tmp83 = add i64 %tmp75, %tmp82 ; <i64> [#uses=1]
+ %tmp84 = add i64 %tmp62, %tmp49 ; <i64> [#uses=1]
+ %tmp85 = add i64 %tmp83, %tmp84 ; <i64> [#uses=1]
+ %tmp86 = add i64 %tmp81, %tmp36 ; <i64> [#uses=5]
+ %tmp87 = add i64 %tmp75, %tmp85 ; <i64> [#uses=1]
+ %tmp88 = add i64 %tmp87, %tmp81 ; <i64> [#uses=7]
+ %tmp89 = call i64 @llvm.bswap.i64(i64 %tmp13) ; <i64> [#uses=1]
+ %tmp90 = add i64 %tmp73, %tmp60 ; <i64> [#uses=1]
+ %tmp91 = add i64 %tmp90, %tmp86 ; <i64> [#uses=1]
+ %tmp92 = add i64 %tmp47, %tmp89 ; <i64> [#uses=1]
+ %tmp93 = add i64 %tmp92, %tmp91 ; <i64> [#uses=1]
+ %tmp94 = add i64 %tmp93, %tmp86 ; <i64> [#uses=2]
+ %tmp95 = add i64 %tmp75, %tmp62 ; <i64> [#uses=1]
+ %tmp96 = add i64 %tmp88, %tmp95 ; <i64> [#uses=1]
+ %tmp97 = add i64 %tmp75, %tmp62 ; <i64> [#uses=1]
+ %tmp98 = add i64 %tmp96, %tmp97 ; <i64> [#uses=1]
+ %tmp99 = add i64 %tmp94, %tmp49 ; <i64> [#uses=5]
+ %tmp100 = add i64 %tmp88, %tmp98 ; <i64> [#uses=1]
+ %tmp101 = add i64 %tmp100, %tmp94 ; <i64> [#uses=7]
+ %tmp102 = call i64 @llvm.bswap.i64(i64 %tmp14) ; <i64> [#uses=1]
+ %tmp103 = add i64 %tmp86, %tmp73 ; <i64> [#uses=1]
+ %tmp104 = add i64 %tmp103, %tmp99 ; <i64> [#uses=1]
+ %tmp105 = add i64 %tmp102, %tmp60 ; <i64> [#uses=1]
+ %tmp106 = add i64 %tmp105, %tmp104 ; <i64> [#uses=1]
+ %tmp107 = add i64 %tmp106, %tmp99 ; <i64> [#uses=2]
+ %tmp108 = add i64 %tmp88, %tmp75 ; <i64> [#uses=1]
+ %tmp109 = add i64 %tmp101, %tmp108 ; <i64> [#uses=1]
+ %tmp110 = add i64 %tmp88, %tmp75 ; <i64> [#uses=1]
+ %tmp111 = add i64 %tmp109, %tmp110 ; <i64> [#uses=1]
+ %tmp112 = add i64 %tmp107, %tmp62 ; <i64> [#uses=5]
+ %tmp113 = add i64 %tmp101, %tmp111 ; <i64> [#uses=1]
+ %tmp114 = add i64 %tmp113, %tmp107 ; <i64> [#uses=7]
+ %tmp115 = call i64 @llvm.bswap.i64(i64 %tmp15) ; <i64> [#uses=1]
+ %tmp116 = add i64 %tmp99, %tmp86 ; <i64> [#uses=1]
+ %tmp117 = add i64 %tmp116, %tmp112 ; <i64> [#uses=1]
+ %tmp118 = add i64 %tmp115, %tmp73 ; <i64> [#uses=1]
+ %tmp119 = add i64 %tmp118, %tmp117 ; <i64> [#uses=1]
+ %tmp120 = add i64 %tmp119, %tmp112 ; <i64> [#uses=2]
+ %tmp121 = add i64 %tmp101, %tmp88 ; <i64> [#uses=1]
+ %tmp122 = add i64 %tmp114, %tmp121 ; <i64> [#uses=1]
+ %tmp123 = add i64 %tmp101, %tmp88 ; <i64> [#uses=1]
+ %tmp124 = add i64 %tmp122, %tmp123 ; <i64> [#uses=1]
+ %tmp125 = add i64 %tmp120, %tmp75 ; <i64> [#uses=5]
+ %tmp126 = add i64 %tmp114, %tmp124 ; <i64> [#uses=1]
+ %tmp127 = add i64 %tmp126, %tmp120 ; <i64> [#uses=7]
+ %tmp128 = call i64 @llvm.bswap.i64(i64 %tmp16) ; <i64> [#uses=1]
+ %tmp129 = add i64 %tmp112, %tmp99 ; <i64> [#uses=1]
+ %tmp130 = add i64 %tmp129, %tmp125 ; <i64> [#uses=1]
+ %tmp131 = add i64 %tmp128, %tmp86 ; <i64> [#uses=1]
+ %tmp132 = add i64 %tmp131, %tmp130 ; <i64> [#uses=1]
+ %tmp133 = add i64 %tmp132, %tmp125 ; <i64> [#uses=2]
+ %tmp134 = add i64 %tmp114, %tmp101 ; <i64> [#uses=1]
+ %tmp135 = add i64 %tmp127, %tmp134 ; <i64> [#uses=1]
+ %tmp136 = add i64 %tmp114, %tmp101 ; <i64> [#uses=1]
+ %tmp137 = add i64 %tmp135, %tmp136 ; <i64> [#uses=1]
+ %tmp138 = add i64 %tmp133, %tmp88 ; <i64> [#uses=5]
+ %tmp139 = add i64 %tmp127, %tmp137 ; <i64> [#uses=1]
+ %tmp140 = add i64 %tmp139, %tmp133 ; <i64> [#uses=7]
+ %tmp141 = call i64 @llvm.bswap.i64(i64 %tmp17) ; <i64> [#uses=1]
+ %tmp142 = add i64 %tmp125, %tmp112 ; <i64> [#uses=1]
+ %tmp143 = add i64 %tmp142, %tmp138 ; <i64> [#uses=1]
+ %tmp144 = add i64 %tmp141, %tmp99 ; <i64> [#uses=1]
+ %tmp145 = add i64 %tmp144, %tmp143 ; <i64> [#uses=1]
+ %tmp146 = add i64 %tmp145, %tmp138 ; <i64> [#uses=2]
+ %tmp147 = add i64 %tmp127, %tmp114 ; <i64> [#uses=1]
+ %tmp148 = add i64 %tmp140, %tmp147 ; <i64> [#uses=1]
+ %tmp149 = add i64 %tmp127, %tmp114 ; <i64> [#uses=1]
+ %tmp150 = add i64 %tmp148, %tmp149 ; <i64> [#uses=1]
+ %tmp151 = add i64 %tmp146, %tmp101 ; <i64> [#uses=5]
+ %tmp152 = add i64 %tmp140, %tmp150 ; <i64> [#uses=1]
+ %tmp153 = add i64 %tmp152, %tmp146 ; <i64> [#uses=7]
+ %tmp154 = call i64 @llvm.bswap.i64(i64 %tmp18) ; <i64> [#uses=1]
+ %tmp155 = add i64 %tmp138, %tmp125 ; <i64> [#uses=1]
+ %tmp156 = add i64 %tmp155, %tmp151 ; <i64> [#uses=1]
+ %tmp157 = add i64 %tmp154, %tmp112 ; <i64> [#uses=1]
+ %tmp158 = add i64 %tmp157, %tmp156 ; <i64> [#uses=1]
+ %tmp159 = add i64 %tmp158, %tmp151 ; <i64> [#uses=2]
+ %tmp160 = add i64 %tmp140, %tmp127 ; <i64> [#uses=1]
+ %tmp161 = add i64 %tmp153, %tmp160 ; <i64> [#uses=1]
+ %tmp162 = add i64 %tmp140, %tmp127 ; <i64> [#uses=1]
+ %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
+ %tmp164 = add i64 %tmp159, %tmp114 ; <i64> [#uses=5]
+ %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
+ %tmp166 = add i64 %tmp165, %tmp159 ; <i64> [#uses=7]
+ %tmp167 = call i64 @llvm.bswap.i64(i64 %tmp19) ; <i64> [#uses=1]
+ %tmp168 = add i64 %tmp151, %tmp138 ; <i64> [#uses=1]
+ %tmp169 = add i64 %tmp168, %tmp164 ; <i64> [#uses=1]
+ %tmp170 = add i64 %tmp167, %tmp125 ; <i64> [#uses=1]
+ %tmp171 = add i64 %tmp170, %tmp169 ; <i64> [#uses=1]
+ %tmp172 = add i64 %tmp171, %tmp164 ; <i64> [#uses=2]
+ %tmp173 = add i64 %tmp153, %tmp140 ; <i64> [#uses=1]
+ %tmp174 = add i64 %tmp166, %tmp173 ; <i64> [#uses=1]
+ %tmp175 = add i64 %tmp153, %tmp140 ; <i64> [#uses=1]
+ %tmp176 = add i64 %tmp174, %tmp175 ; <i64> [#uses=1]
+ %tmp177 = add i64 %tmp172, %tmp127 ; <i64> [#uses=5]
+ %tmp178 = add i64 %tmp166, %tmp176 ; <i64> [#uses=1]
+ %tmp179 = add i64 %tmp178, %tmp172 ; <i64> [#uses=6]
+ %tmp180 = call i64 @llvm.bswap.i64(i64 %tmp20) ; <i64> [#uses=1]
+ %tmp181 = add i64 %tmp164, %tmp151 ; <i64> [#uses=1]
+ %tmp182 = add i64 %tmp181, %tmp177 ; <i64> [#uses=1]
+ %tmp183 = add i64 %tmp180, %tmp138 ; <i64> [#uses=1]
+ %tmp184 = add i64 %tmp183, %tmp182 ; <i64> [#uses=1]
+ %tmp185 = add i64 %tmp184, %tmp177 ; <i64> [#uses=2]
+ %tmp186 = add i64 %tmp166, %tmp153 ; <i64> [#uses=1]
+ %tmp187 = add i64 %tmp179, %tmp186 ; <i64> [#uses=1]
+ %tmp188 = add i64 %tmp166, %tmp153 ; <i64> [#uses=1]
+ %tmp189 = add i64 %tmp187, %tmp188 ; <i64> [#uses=1]
+ %tmp190 = add i64 %tmp185, %tmp140 ; <i64> [#uses=4]
+ %tmp191 = add i64 %tmp179, %tmp189 ; <i64> [#uses=1]
+ %tmp192 = add i64 %tmp191, %tmp185 ; <i64> [#uses=4]
+ %tmp193 = call i64 @llvm.bswap.i64(i64 %tmp21) ; <i64> [#uses=1]
+ %tmp194 = add i64 %tmp177, %tmp164 ; <i64> [#uses=1]
+ %tmp195 = add i64 %tmp194, %tmp190 ; <i64> [#uses=1]
+ %tmp196 = add i64 %tmp193, %tmp151 ; <i64> [#uses=1]
+ %tmp197 = add i64 %tmp196, %tmp195 ; <i64> [#uses=1]
+ %tmp198 = add i64 %tmp197, %tmp190 ; <i64> [#uses=2]
+ %tmp199 = add i64 %tmp179, %tmp166 ; <i64> [#uses=1]
+ %tmp200 = add i64 %tmp192, %tmp199 ; <i64> [#uses=1]
+ %tmp201 = add i64 %tmp179, %tmp166 ; <i64> [#uses=1]
+ %tmp202 = add i64 %tmp200, %tmp201 ; <i64> [#uses=1]
+ %tmp203 = add i64 %tmp198, %tmp153 ; <i64> [#uses=3]
+ %tmp204 = add i64 %tmp192, %tmp202 ; <i64> [#uses=1]
+ %tmp205 = add i64 %tmp204, %tmp198 ; <i64> [#uses=2]
+ %tmp206 = call i64 @llvm.bswap.i64(i64 %tmp22) ; <i64> [#uses=1]
+ %tmp207 = add i64 %tmp190, %tmp177 ; <i64> [#uses=1]
+ %tmp208 = add i64 %tmp207, %tmp203 ; <i64> [#uses=1]
+ %tmp209 = add i64 %tmp206, %tmp164 ; <i64> [#uses=1]
+ %tmp210 = add i64 %tmp209, %tmp208 ; <i64> [#uses=1]
+ %tmp211 = add i64 %tmp210, %tmp203 ; <i64> [#uses=2]
+ %tmp212 = add i64 %tmp192, %tmp179 ; <i64> [#uses=1]
+ %tmp213 = add i64 %tmp205, %tmp212 ; <i64> [#uses=1]
+ %tmp214 = add i64 %tmp192, %tmp179 ; <i64> [#uses=1]
+ %tmp215 = add i64 %tmp213, %tmp214 ; <i64> [#uses=1]
+ %tmp216 = add i64 %tmp211, %tmp166 ; <i64> [#uses=2]
+ %tmp217 = add i64 %tmp205, %tmp215 ; <i64> [#uses=1]
+ %tmp218 = add i64 %tmp217, %tmp211 ; <i64> [#uses=1]
+ %tmp219 = call i64 @llvm.bswap.i64(i64 %tmp23) ; <i64> [#uses=2]
+ store volatile i64 %tmp219, i64* @X, align 8
+ %tmp220 = add i64 %tmp203, %tmp190 ; <i64> [#uses=1]
+ %tmp221 = add i64 %tmp220, %tmp216 ; <i64> [#uses=1]
+ %tmp222 = add i64 %tmp219, %tmp177 ; <i64> [#uses=1]
+ %tmp223 = add i64 %tmp222, %tmp221 ; <i64> [#uses=1]
+ %tmp224 = add i64 %tmp223, %tmp216 ; <i64> [#uses=1]
+ %tmp225 = add i64 %tmp224, %tmp218 ; <i64> [#uses=1]
+ ret i64 %tmp225
+}
+
+declare i64 @llvm.bswap.i64(i64) nounwind readnone
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | grep "Number of modref unfolded"
+; XFAIL: *
+; 69408 removed the opportunity for this optimization to work
+
+ %struct.SHA512_CTX = type { [8 x i64], i64, i64, %struct.anon, i32, i32 }
+ %struct.anon = type { [16 x i64] }
+@K512 = external constant [80 x i64], align 32 ; <[80 x i64]*> [#uses=2]
+
+define fastcc void @sha512_block_data_order(%struct.SHA512_CTX* nocapture %ctx, i8* nocapture %in, i64 %num) nounwind ssp {
+entry:
+ br label %bb349
+
+bb349: ; preds = %bb349, %entry
+ %e.0489 = phi i64 [ 0, %entry ], [ %e.0, %bb349 ] ; <i64> [#uses=3]
+ %b.0472 = phi i64 [ 0, %entry ], [ %87, %bb349 ] ; <i64> [#uses=2]
+ %asmtmp356 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %e.0489) nounwind ; <i64> [#uses=1]
+ %0 = xor i64 0, %asmtmp356 ; <i64> [#uses=1]
+ %1 = add i64 0, %0 ; <i64> [#uses=1]
+ %2 = add i64 %1, 0 ; <i64> [#uses=1]
+ %3 = add i64 %2, 0 ; <i64> [#uses=1]
+ %4 = add i64 %3, 0 ; <i64> [#uses=5]
+ %asmtmp372 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %4) nounwind ; <i64> [#uses=1]
+ %asmtmp373 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %4) nounwind ; <i64> [#uses=0]
+ %5 = xor i64 %asmtmp372, 0 ; <i64> [#uses=0]
+ %6 = xor i64 0, %b.0472 ; <i64> [#uses=1]
+ %7 = and i64 %4, %6 ; <i64> [#uses=1]
+ %8 = xor i64 %7, 0 ; <i64> [#uses=1]
+ %9 = add i64 0, %8 ; <i64> [#uses=1]
+ %10 = add i64 %9, 0 ; <i64> [#uses=2]
+ %asmtmp377 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 0) nounwind ; <i64> [#uses=1]
+ %11 = xor i64 0, %asmtmp377 ; <i64> [#uses=1]
+ %12 = add i64 0, %11 ; <i64> [#uses=1]
+ %13 = add i64 %12, 0 ; <i64> [#uses=1]
+ %not381 = xor i64 0, -1 ; <i64> [#uses=1]
+ %14 = and i64 %e.0489, %not381 ; <i64> [#uses=1]
+ %15 = xor i64 0, %14 ; <i64> [#uses=1]
+ %16 = add i64 %15, 0 ; <i64> [#uses=1]
+ %17 = add i64 %16, %13 ; <i64> [#uses=1]
+ %18 = add i64 %17, 0 ; <i64> [#uses=1]
+ %19 = add i64 %18, 0 ; <i64> [#uses=2]
+ %20 = add i64 %19, %b.0472 ; <i64> [#uses=3]
+ %21 = add i64 %19, 0 ; <i64> [#uses=1]
+ %22 = add i64 %21, 0 ; <i64> [#uses=1]
+ %23 = add i32 0, 12 ; <i32> [#uses=1]
+ %24 = and i32 %23, 12 ; <i32> [#uses=1]
+ %25 = zext i32 %24 to i64 ; <i64> [#uses=1]
+ %26 = getelementptr [16 x i64]* null, i64 0, i64 %25 ; <i64*> [#uses=0]
+ %27 = add i64 0, %e.0489 ; <i64> [#uses=1]
+ %28 = add i64 %27, 0 ; <i64> [#uses=1]
+ %29 = add i64 %28, 0 ; <i64> [#uses=1]
+ %30 = add i64 %29, 0 ; <i64> [#uses=2]
+ %31 = and i64 %10, %4 ; <i64> [#uses=1]
+ %32 = xor i64 0, %31 ; <i64> [#uses=1]
+ %33 = add i64 %30, 0 ; <i64> [#uses=3]
+ %34 = add i64 %30, %32 ; <i64> [#uses=1]
+ %35 = add i64 %34, 0 ; <i64> [#uses=1]
+ %36 = and i64 %33, %20 ; <i64> [#uses=1]
+ %37 = xor i64 %36, 0 ; <i64> [#uses=1]
+ %38 = add i64 %37, 0 ; <i64> [#uses=1]
+ %39 = add i64 %38, 0 ; <i64> [#uses=1]
+ %40 = add i64 %39, 0 ; <i64> [#uses=1]
+ %41 = add i64 %40, 0 ; <i64> [#uses=1]
+ %42 = add i64 %41, %4 ; <i64> [#uses=3]
+ %43 = or i32 0, 6 ; <i32> [#uses=1]
+ %44 = and i32 %43, 14 ; <i32> [#uses=1]
+ %45 = zext i32 %44 to i64 ; <i64> [#uses=1]
+ %46 = getelementptr [16 x i64]* null, i64 0, i64 %45 ; <i64*> [#uses=1]
+ %not417 = xor i64 %42, -1 ; <i64> [#uses=1]
+ %47 = and i64 %20, %not417 ; <i64> [#uses=1]
+ %48 = xor i64 0, %47 ; <i64> [#uses=1]
+ %49 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; <i64*> [#uses=1]
+ %50 = load i64* %49, align 8 ; <i64> [#uses=1]
+ %51 = add i64 %48, 0 ; <i64> [#uses=1]
+ %52 = add i64 %51, 0 ; <i64> [#uses=1]
+ %53 = add i64 %52, 0 ; <i64> [#uses=1]
+ %54 = add i64 %53, %50 ; <i64> [#uses=2]
+ %asmtmp420 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 0) nounwind ; <i64> [#uses=1]
+ %asmtmp421 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 0) nounwind ; <i64> [#uses=1]
+ %55 = xor i64 %asmtmp420, 0 ; <i64> [#uses=1]
+ %56 = xor i64 %55, %asmtmp421 ; <i64> [#uses=1]
+ %57 = add i64 %54, %10 ; <i64> [#uses=5]
+ %58 = add i64 %54, 0 ; <i64> [#uses=1]
+ %59 = add i64 %58, %56 ; <i64> [#uses=2]
+ %60 = or i32 0, 7 ; <i32> [#uses=1]
+ %61 = and i32 %60, 15 ; <i32> [#uses=1]
+ %62 = zext i32 %61 to i64 ; <i64> [#uses=1]
+ %63 = getelementptr [16 x i64]* null, i64 0, i64 %62 ; <i64*> [#uses=2]
+ %64 = load i64* null, align 8 ; <i64> [#uses=1]
+ %65 = lshr i64 %64, 6 ; <i64> [#uses=1]
+ %66 = xor i64 0, %65 ; <i64> [#uses=1]
+ %67 = xor i64 %66, 0 ; <i64> [#uses=1]
+ %68 = load i64* %46, align 8 ; <i64> [#uses=1]
+ %69 = load i64* null, align 8 ; <i64> [#uses=1]
+ %70 = add i64 %68, 0 ; <i64> [#uses=1]
+ %71 = add i64 %70, %67 ; <i64> [#uses=1]
+ %72 = add i64 %71, %69 ; <i64> [#uses=1]
+ %asmtmp427 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 18, i64 %57) nounwind ; <i64> [#uses=1]
+ %asmtmp428 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %57) nounwind ; <i64> [#uses=1]
+ %73 = xor i64 %asmtmp427, 0 ; <i64> [#uses=1]
+ %74 = xor i64 %73, %asmtmp428 ; <i64> [#uses=1]
+ %75 = and i64 %57, %42 ; <i64> [#uses=1]
+ %not429 = xor i64 %57, -1 ; <i64> [#uses=1]
+ %76 = and i64 %33, %not429 ; <i64> [#uses=1]
+ %77 = xor i64 %75, %76 ; <i64> [#uses=1]
+ %78 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; <i64*> [#uses=1]
+ %79 = load i64* %78, align 16 ; <i64> [#uses=1]
+ %80 = add i64 %77, %20 ; <i64> [#uses=1]
+ %81 = add i64 %80, %72 ; <i64> [#uses=1]
+ %82 = add i64 %81, %74 ; <i64> [#uses=1]
+ %83 = add i64 %82, %79 ; <i64> [#uses=1]
+ %asmtmp432 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %59) nounwind ; <i64> [#uses=1]
+ %asmtmp433 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %59) nounwind ; <i64> [#uses=1]
+ %84 = xor i64 %asmtmp432, 0 ; <i64> [#uses=1]
+ %85 = xor i64 %84, %asmtmp433 ; <i64> [#uses=1]
+ %86 = add i64 %83, %22 ; <i64> [#uses=2]
+ %87 = add i64 0, %85 ; <i64> [#uses=1]
+ %asmtmp435 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 8, i64 0) nounwind ; <i64> [#uses=1]
+ %88 = xor i64 0, %asmtmp435 ; <i64> [#uses=1]
+ %89 = load i64* null, align 8 ; <i64> [#uses=3]
+ %asmtmp436 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 19, i64 %89) nounwind ; <i64> [#uses=1]
+ %asmtmp437 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 %89) nounwind ; <i64> [#uses=1]
+ %90 = lshr i64 %89, 6 ; <i64> [#uses=1]
+ %91 = xor i64 %asmtmp436, %90 ; <i64> [#uses=1]
+ %92 = xor i64 %91, %asmtmp437 ; <i64> [#uses=1]
+ %93 = load i64* %63, align 8 ; <i64> [#uses=1]
+ %94 = load i64* null, align 8 ; <i64> [#uses=1]
+ %95 = add i64 %93, %88 ; <i64> [#uses=1]
+ %96 = add i64 %95, %92 ; <i64> [#uses=1]
+ %97 = add i64 %96, %94 ; <i64> [#uses=2]
+ store i64 %97, i64* %63, align 8
+ %98 = and i64 %86, %57 ; <i64> [#uses=1]
+ %not441 = xor i64 %86, -1 ; <i64> [#uses=1]
+ %99 = and i64 %42, %not441 ; <i64> [#uses=1]
+ %100 = xor i64 %98, %99 ; <i64> [#uses=1]
+ %101 = add i64 %100, %33 ; <i64> [#uses=1]
+ %102 = add i64 %101, %97 ; <i64> [#uses=1]
+ %103 = add i64 %102, 0 ; <i64> [#uses=1]
+ %104 = add i64 %103, 0 ; <i64> [#uses=1]
+ %e.0 = add i64 %104, %35 ; <i64> [#uses=1]
+ br label %bb349
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -relocation-model=pic -disable-fp-elim -stats 2>&1 | not grep ext-opt
+
+define fastcc i8* @S_scan_str(i8* %start, i32 %keep_quoted, i32 %keep_delims) nounwind ssp {
+entry:
+ switch i8 undef, label %bb6 [
+ i8 9, label %bb5
+ i8 32, label %bb5
+ i8 10, label %bb5
+ i8 13, label %bb5
+ i8 12, label %bb5
+ ]
+
+bb5: ; preds = %entry, %entry, %entry, %entry, %entry
+ br label %bb6
+
+bb6: ; preds = %bb5, %entry
+ br i1 undef, label %bb7, label %bb9
+
+bb7: ; preds = %bb6
+ unreachable
+
+bb9: ; preds = %bb6
+ %0 = load i8* undef, align 1 ; <i8> [#uses=3]
+ br i1 undef, label %bb12, label %bb10
+
+bb10: ; preds = %bb9
+ br i1 undef, label %bb12, label %bb11
+
+bb11: ; preds = %bb10
+ unreachable
+
+bb12: ; preds = %bb10, %bb9
+ br i1 undef, label %bb13, label %bb14
+
+bb13: ; preds = %bb12
+ store i8 %0, i8* undef, align 1
+ %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
+ br label %bb18
+
+bb14: ; preds = %bb12
+ br label %bb18
+
+bb18: ; preds = %bb14, %bb13
+ %termcode.0 = phi i32 [ %1, %bb13 ], [ undef, %bb14 ] ; <i32> [#uses=2]
+ %2 = icmp eq i8 %0, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb21, label %bb19
+
+bb19: ; preds = %bb18
+ br i1 undef, label %bb21, label %bb20
+
+bb20: ; preds = %bb19
+ br label %bb21
+
+bb21: ; preds = %bb20, %bb19, %bb18
+ %termcode.1 = phi i32 [ %termcode.0, %bb18 ], [ %termcode.0, %bb19 ], [ undef, %bb20 ] ; <i32> [#uses=0]
+ unreachable
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -O0 -disable-fp-elim -relocation-model=pic -stats 2>&1 | FileCheck %s
+;
+; This test should not cause any spilling with RAFast.
+;
+; CHECK: Number of copies coalesced
+; CHECK-NOT: Number of stores added
+;
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0.0"
+
+%0 = type { i64, i64, i8*, i8* }
+%1 = type opaque
+%2 = type opaque
+%3 = type <{ i8*, i32, i32, void (%4*)*, i8*, i64 }>
+%4 = type { i8**, i32, i32, i8**, %5*, i64 }
+%5 = type { i64, i64 }
+%6 = type { i8*, i32, i32, i8*, %5* }
+
+@0 = external hidden constant %0
+
+define hidden void @f() ssp {
+bb:
+ %tmp5 = alloca i64, align 8
+ %tmp6 = alloca void ()*, align 8
+ %tmp7 = alloca %3, align 8
+ store i64 0, i64* %tmp5, align 8
+ br label %bb8
+
+bb8: ; preds = %bb23, %bb
+ %tmp15 = getelementptr inbounds %3* %tmp7, i32 0, i32 4
+ store i8* bitcast (%0* @0 to i8*), i8** %tmp15
+ %tmp16 = bitcast %3* %tmp7 to void ()*
+ store void ()* %tmp16, void ()** %tmp6, align 8
+ %tmp17 = load void ()** %tmp6, align 8
+ %tmp18 = bitcast void ()* %tmp17 to %6*
+ %tmp19 = getelementptr inbounds %6* %tmp18, i32 0, i32 3
+ %tmp20 = bitcast %6* %tmp18 to i8*
+ %tmp21 = load i8** %tmp19
+ %tmp22 = bitcast i8* %tmp21 to void (i8*)*
+ call void %tmp22(i8* %tmp20)
+ br label %bb23
+
+bb23: ; preds = %bb8
+ %tmp24 = load i64* %tmp5, align 8
+ %tmp25 = add i64 %tmp24, 1
+ store i64 %tmp25, i64* %tmp5, align 8
+ %tmp26 = icmp ult i64 %tmp25, 10
+ br i1 %tmp26, label %bb8, label %bb27
+
+bb27: ; preds = %bb23
+ ret void
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -stats 2>&1 | \
+; RUN: not grep "Number of machine instructions hoisted out of loops post regalloc"
+
+; rdar://11095580
+
+%struct.ref_s = type { %union.color_sample, i16, i16 }
+%union.color_sample = type { i64 }
+
+@table = external global [3891 x i64]
+
+declare i32 @foo()
+
+define i32 @zarray(%struct.ref_s* nocapture %op) nounwind ssp {
+entry:
+ %call = tail call i32 @foo()
+ %tmp = ashr i32 %call, 31
+ %0 = and i32 %tmp, 1396
+ %index9 = add i32 %0, 2397
+ indirectbr i8* undef, [label %return, label %if.end]
+
+if.end: ; preds = %entry
+ %size5 = getelementptr inbounds %struct.ref_s* %op, i64 0, i32 2
+ %tmp6 = load i16* %size5, align 2
+ %tobool1 = icmp eq i16 %tmp6, 0
+ %1 = select i1 %tobool1, i32 1396, i32 -1910
+ %index10 = add i32 %index9, %1
+ indirectbr i8* undef, [label %return, label %while.body.lr.ph]
+
+while.body.lr.ph: ; preds = %if.end
+ %refs = bitcast %struct.ref_s* %op to %struct.ref_s**
+ %tmp9 = load %struct.ref_s** %refs, align 8
+ %tmp4 = zext i16 %tmp6 to i64
+ %index13 = add i32 %index10, 1658
+ %2 = sext i32 %index13 to i64
+ %3 = getelementptr [3891 x i64]* @table, i64 0, i64 %2
+ %blockaddress14 = load i64* %3, align 8
+ %4 = inttoptr i64 %blockaddress14 to i8*
+ indirectbr i8* %4, [label %while.body]
+
+while.body: ; preds = %while.body, %while.body.lr.ph
+ %index7 = phi i32 [ %index15, %while.body ], [ %index13, %while.body.lr.ph ]
+ %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.lr.ph ]
+ %type_attrs = getelementptr %struct.ref_s* %tmp9, i64 %indvar, i32 1
+ store i16 32, i16* %type_attrs, align 2
+ %indvar.next = add i64 %indvar, 1
+ %exitcond5 = icmp eq i64 %indvar.next, %tmp4
+ %tmp7 = select i1 %exitcond5, i32 1648, i32 0
+ %index15 = add i32 %index7, %tmp7
+ %tmp8 = select i1 %exitcond5, i64 13, i64 0
+ %5 = sext i32 %index15 to i64
+ %6 = getelementptr [3891 x i64]* @table, i64 0, i64 %5
+ %blockaddress16 = load i64* %6, align 8
+ %7 = inttoptr i64 %blockaddress16 to i8*
+ indirectbr i8* %7, [label %return, label %while.body]
+
+return: ; preds = %while.body, %if.end, %entry
+ %retval.0 = phi i32 [ %call, %entry ], [ 0, %if.end ], [ 0, %while.body ]
+ ret i32 %retval.0
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-appel-darwin -disable-cgp-branch-opts -stats 2>&1 | grep "machine-sink"
+
+define fastcc void @t() nounwind ssp {
+entry:
+ br i1 undef, label %bb, label %bb4
+
+bb: ; preds = %entry
+ br i1 undef, label %return, label %bb3
+
+bb3: ; preds = %bb
+ unreachable
+
+bb4: ; preds = %entry
+ br i1 undef, label %bb.nph, label %return
+
+bb.nph: ; preds = %bb4
+ br label %bb5
+
+bb5: ; preds = %bb9, %bb.nph
+ %indvar = phi i64 [ 0, %bb.nph ], [ %tmp12, %bb9 ] ; <i64> [#uses=1]
+ %tmp12 = add i64 %indvar, 1 ; <i64> [#uses=2]
+ %tmp13 = trunc i64 %tmp12 to i32 ; <i32> [#uses=0]
+ br i1 undef, label %bb9, label %bb6
+
+bb6: ; preds = %bb5
+ br i1 undef, label %bb9, label %bb7
+
+bb7: ; preds = %bb6
+ br i1 undef, label %bb9, label %bb8
+
+bb8: ; preds = %bb7
+ unreachable
+
+bb9: ; preds = %bb7, %bb6, %bb5
+ br i1 undef, label %bb5, label %return
+
+return: ; preds = %bb9, %bb4, %bb
+ ret void
+}
+++ /dev/null
-; The old instruction selector used to load all arguments to a call up in
-; registers, then start pushing them all onto the stack. This is bad news as
-; it makes a ton of annoying overlapping live ranges. This code should not
-; cause spills!
-;
-; RUN: llc < %s -march=x86 -stats 2>&1 | not grep spilled
-
-target datalayout = "e-p:32:32"
-
-define i32 @test(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
- ret i32 0
-}
-
-define i32 @main() {
- %X = call i32 @test( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ) ; <i32> [#uses=1]
- ret i32 %X
-}
-
+++ /dev/null
-; RUN: llc < %s -march=x86 -stats 2>&1 | \
-; RUN: grep asm-printer | grep 7
-
-define i32 @g(i32 %a, i32 %b) nounwind {
- %tmp.1 = shl i32 %b, 1 ; <i32> [#uses=1]
- %tmp.3 = add i32 %tmp.1, %a ; <i32> [#uses=1]
- %tmp.5 = mul i32 %tmp.3, %a ; <i32> [#uses=1]
- %tmp.8 = mul i32 %b, %b ; <i32> [#uses=1]
- %tmp.9 = add i32 %tmp.5, %tmp.8 ; <i32> [#uses=1]
- ret i32 %tmp.9
-}
-
+++ /dev/null
-; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | \
-; RUN: not grep "Number of register spills"
-; END.
-
-
-define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) {
- %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9]
- %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
- %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1]
- %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1]
- %tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
- %tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp60 = xor <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
- %tmp61 = bitcast <4 x i32> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp75 = bitcast <4 x float> %tmp74 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp88 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp89 = bitcast <4 x float> %tmp88 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp98 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp75, <4 x i32> %tmp89 ) ; <<4 x i32>> [#uses=1]
- %tmp102 = bitcast <8 x i16> %tmp98 to <8 x i16> ; <<8 x i16>> [#uses=1]
- %tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1]
- store <4 x float> %tmp105.upgrd.2, <4 x float>* %a
- %tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
- %tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp119 = xor <4 x i32> %tmp109, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
- %tmp120 = bitcast <4 x i32> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp133 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp109.upgrd.3, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp134 = bitcast <4 x float> %tmp133 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp147 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp148 = bitcast <4 x float> %tmp147 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp159 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp134, <4 x i32> %tmp148 ) ; <<4 x i32>> [#uses=1]
- %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
- %tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp166 = shufflevector <8 x i16> %tmp164, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp166.upgrd.4 = bitcast <8 x i16> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1]
- store <4 x float> %tmp166.upgrd.4, <4 x float>* %b
- %tmp169 = bitcast <4 x float> %tmp48 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp170 = shufflevector <4 x i32> %tmp169, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
- %tmp170.upgrd.5 = bitcast <4 x i32> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp180 = xor <4 x i32> %tmp170, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
- %tmp181 = bitcast <4 x i32> %tmp180 to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp194 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp170.upgrd.5, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp195 = bitcast <4 x float> %tmp194 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp208 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp209 = bitcast <4 x float> %tmp208 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp220 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp195, <4 x i32> %tmp209 ) ; <<4 x i32>> [#uses=1]
- %tmp224 = bitcast <8 x i16> %tmp220 to <8 x i16> ; <<8 x i16>> [#uses=1]
- %tmp225 = shufflevector <8 x i16> %tmp224, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp227 = shufflevector <8 x i16> %tmp225, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp227.upgrd.6 = bitcast <8 x i16> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1]
- store <4 x float> %tmp227.upgrd.6, <4 x float>* %c
- %tmp230 = bitcast <4 x float> %tmp50 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp231 = shufflevector <4 x i32> %tmp230, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
- %tmp231.upgrd.7 = bitcast <4 x i32> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp241 = xor <4 x i32> %tmp231, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
- %tmp242 = bitcast <4 x i32> %tmp241 to <4 x float> ; <<4 x float>> [#uses=1]
- %tmp255 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp231.upgrd.7, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp256 = bitcast <4 x float> %tmp255 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp269 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp242, i8 1 ) ; <<4 x float>> [#uses=1]
- %tmp270 = bitcast <4 x float> %tmp269 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp281 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp256, <4 x i32> %tmp270 ) ; <<4 x i32>> [#uses=1]
- %tmp285 = bitcast <8 x i16> %tmp281 to <8 x i16> ; <<8 x i16>> [#uses=1]
- %tmp286 = shufflevector <8 x i16> %tmp285, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp288 = shufflevector <8 x i16> %tmp286, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp288.upgrd.8 = bitcast <8 x i16> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1]
- store <4 x float> %tmp288.upgrd.8, <4 x float>* %d
- ret i32 0
-}
-
-declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
-
-declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
+++ /dev/null
-; RUN: llc < %s -march=x86 -relocation-model=static -stats 2>&1 | \
-; RUN: grep asm-printer | grep 14
-;
-@size20 = external global i32 ; <i32*> [#uses=1]
-@in5 = external global i8* ; <i8**> [#uses=1]
-
-define i32 @compare(i8* %a, i8* %b) nounwind {
- %tmp = bitcast i8* %a to i32* ; <i32*> [#uses=1]
- %tmp1 = bitcast i8* %b to i32* ; <i32*> [#uses=1]
- %tmp.upgrd.1 = load i32* @size20 ; <i32> [#uses=1]
- %tmp.upgrd.2 = load i8** @in5 ; <i8*> [#uses=2]
- %tmp3 = load i32* %tmp1 ; <i32> [#uses=1]
- %gep.upgrd.3 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
- %tmp4 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; <i8*> [#uses=2]
- %tmp7 = load i32* %tmp ; <i32> [#uses=1]
- %gep.upgrd.4 = zext i32 %tmp7 to i64 ; <i64> [#uses=1]
- %tmp8 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; <i8*> [#uses=2]
- %tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; <i32> [#uses=1]
- ret i32 %tmp.upgrd.5
-}
-
-declare i32 @memcmp(i8*, i8*, i32)
-
+++ /dev/null
-; RUN: llc < %s -march=x86 -stats 2>&1 | \
-; RUN: grep asm-printer | grep 13
-
-define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
-newFuncRoot:
- br label %cond_true456.i
-bb459.i.exitStub: ; preds = %cond_true456.i
- store i32 %tmp449.i, i32* %tmp449.i.out
- ret void
-cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot
- %__s441.2.4.i = phi i8* [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; <i8*> [#uses=2]
- %__h.2.4.i = phi i32 [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; <i32> [#uses=1]
- %tmp446.i = mul i32 %__h.2.4.i, 5 ; <i32> [#uses=1]
- %tmp.i = load i8* %__s441.2.4.i ; <i8> [#uses=1]
- %tmp448.i = sext i8 %tmp.i to i32 ; <i32> [#uses=1]
- %tmp449.i = add i32 %tmp448.i, %tmp446.i ; <i32> [#uses=2]
- %tmp450.i = ptrtoint i8* %__s441.2.4.i to i32 ; <i32> [#uses=1]
- %tmp451.i = add i32 %tmp450.i, 1 ; <i32> [#uses=1]
- %tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to i8* ; <i8*> [#uses=2]
- %tmp45435.i = load i8* %tmp451.i.upgrd.1 ; <i8> [#uses=1]
- %tmp45536.i = icmp eq i8 %tmp45435.i, 0 ; <i1> [#uses=1]
- br i1 %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i
-}
-
+++ /dev/null
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats -realign-stack=0 2>&1 | \
-; RUN: grep "asm-printer" | grep 35
-
-target datalayout = "e-p:32:32"
-define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
-entry:
- %tmp9 = icmp slt i32 %M, 5 ; <i1> [#uses=1]
- br i1 %tmp9, label %return, label %cond_true
-
-cond_true: ; preds = %cond_true, %entry
- %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
- %tmp. = shl i32 %indvar, 2 ; <i32> [#uses=1]
- %tmp.10 = add nsw i32 %tmp., 1 ; <i32> [#uses=2]
- %tmp31 = add nsw i32 %tmp.10, -1 ; <i32> [#uses=4]
- %tmp32 = getelementptr i32* %mpp, i32 %tmp31 ; <i32*> [#uses=1]
- %tmp34 = bitcast i32* %tmp32 to <16 x i8>* ; <i8*> [#uses=1]
- %tmp = load <16 x i8>* %tmp34, align 1
- %tmp42 = getelementptr i32* %tpmm, i32 %tmp31 ; <i32*> [#uses=1]
- %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
- %tmp46 = load <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1]
- %tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2]
- %tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1]
- %tmp62 = getelementptr i32* %ip, i32 %tmp31 ; <i32*> [#uses=1]
- %tmp65 = bitcast i32* %tmp62 to <16 x i8>* ; <i8*> [#uses=1]
- %tmp66 = load <16 x i8>* %tmp65, align 1
- %tmp73 = getelementptr i32* %tpim, i32 %tmp31 ; <i32*> [#uses=1]
- %tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
- %tmp77 = load <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1]
- %tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2]
- %tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1]
- %tmp99 = tail call <4 x i32> @llvm.x86.sse2.psra.d( <4 x i32> %tmp88, <4 x i32> %tmp55 ) ; <<4 x i32>> [#uses=1]
- %tmp99.upgrd.5 = bitcast <4 x i32> %tmp99 to <2 x i64> ; <<2 x i64>> [#uses=2]
- %tmp110 = xor <2 x i64> %tmp99.upgrd.5, < i64 -1, i64 -1 > ; <<2 x i64>> [#uses=1]
- %tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1]
- %tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1]
- %tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1]
- %tmp137 = getelementptr i32* %mc, i32 %tmp.10 ; <i32*> [#uses=1]
- %tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
- store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7
- %tmp147 = add nsw i32 %tmp.10, 8 ; <i32> [#uses=1]
- %tmp.upgrd.8 = icmp ne i32 %tmp147, %M ; <i1> [#uses=1]
- %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
- br i1 %tmp.upgrd.8, label %cond_true, label %return
-
-return: ; preds = %cond_true, %entry
- ret void
-}
-
-declare <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32>, <4 x i32>)
+++ /dev/null
-; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
-; PR1909
-
-@.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1]
-
-define void @minmax(float* %result) nounwind optsize {
-entry:
- %tmp2 = load float* %result, align 4 ; <float> [#uses=6]
- %tmp4 = getelementptr float* %result, i32 2 ; <float*> [#uses=5]
- %tmp5 = load float* %tmp4, align 4 ; <float> [#uses=10]
- %tmp7 = getelementptr float* %result, i32 4 ; <float*> [#uses=5]
- %tmp8 = load float* %tmp7, align 4 ; <float> [#uses=8]
- %tmp10 = getelementptr float* %result, i32 6 ; <float*> [#uses=3]
- %tmp11 = load float* %tmp10, align 4 ; <float> [#uses=8]
- %tmp12 = fcmp olt float %tmp8, %tmp11 ; <i1> [#uses=5]
- br i1 %tmp12, label %bb, label %bb21
-
-bb: ; preds = %entry
- %tmp23469 = fcmp olt float %tmp5, %tmp8 ; <i1> [#uses=1]
- br i1 %tmp23469, label %bb26, label %bb30
-
-bb21: ; preds = %entry
- %tmp23 = fcmp olt float %tmp5, %tmp11 ; <i1> [#uses=1]
- br i1 %tmp23, label %bb26, label %bb30
-
-bb26: ; preds = %bb21, %bb
- %tmp52471 = fcmp olt float %tmp2, %tmp5 ; <i1> [#uses=1]
- br i1 %tmp52471, label %bb111, label %bb59
-
-bb30: ; preds = %bb21, %bb
- br i1 %tmp12, label %bb40, label %bb50
-
-bb40: ; preds = %bb30
- %tmp52473 = fcmp olt float %tmp2, %tmp8 ; <i1> [#uses=1]
- br i1 %tmp52473, label %bb111, label %bb59
-
-bb50: ; preds = %bb30
- %tmp52 = fcmp olt float %tmp2, %tmp11 ; <i1> [#uses=1]
- br i1 %tmp52, label %bb111, label %bb59
-
-bb59: ; preds = %bb50, %bb40, %bb26
- br i1 %tmp12, label %bb72, label %bb80
-
-bb72: ; preds = %bb59
- %tmp82475 = fcmp olt float %tmp5, %tmp8 ; <i1> [#uses=2]
- %brmerge786 = or i1 %tmp82475, %tmp12 ; <i1> [#uses=1]
- %tmp4.mux787 = select i1 %tmp82475, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
- br i1 %brmerge786, label %bb111, label %bb103
-
-bb80: ; preds = %bb59
- %tmp82 = fcmp olt float %tmp5, %tmp11 ; <i1> [#uses=2]
- %brmerge = or i1 %tmp82, %tmp12 ; <i1> [#uses=1]
- %tmp4.mux = select i1 %tmp82, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
- br i1 %brmerge, label %bb111, label %bb103
-
-bb103: ; preds = %bb80, %bb72
- br label %bb111
-
-bb111: ; preds = %bb103, %bb80, %bb72, %bb50, %bb40, %bb26
- %iftmp.0.0.in = phi float* [ %tmp10, %bb103 ], [ %result, %bb26 ], [ %result, %bb40 ], [ %result, %bb50 ], [ %tmp4.mux, %bb80 ], [ %tmp4.mux787, %bb72 ] ; <float*> [#uses=1]
- %iftmp.0.0 = load float* %iftmp.0.0.in ; <float> [#uses=1]
- %tmp125 = fcmp ogt float %tmp8, %tmp11 ; <i1> [#uses=5]
- br i1 %tmp125, label %bb128, label %bb136
-
-bb128: ; preds = %bb111
- %tmp138477 = fcmp ogt float %tmp5, %tmp8 ; <i1> [#uses=1]
- br i1 %tmp138477, label %bb141, label %bb145
-
-bb136: ; preds = %bb111
- %tmp138 = fcmp ogt float %tmp5, %tmp11 ; <i1> [#uses=1]
- br i1 %tmp138, label %bb141, label %bb145
-
-bb141: ; preds = %bb136, %bb128
- %tmp167479 = fcmp ogt float %tmp2, %tmp5 ; <i1> [#uses=1]
- br i1 %tmp167479, label %bb226, label %bb174
-
-bb145: ; preds = %bb136, %bb128
- br i1 %tmp125, label %bb155, label %bb165
-
-bb155: ; preds = %bb145
- %tmp167481 = fcmp ogt float %tmp2, %tmp8 ; <i1> [#uses=1]
- br i1 %tmp167481, label %bb226, label %bb174
-
-bb165: ; preds = %bb145
- %tmp167 = fcmp ogt float %tmp2, %tmp11 ; <i1> [#uses=1]
- br i1 %tmp167, label %bb226, label %bb174
-
-bb174: ; preds = %bb165, %bb155, %bb141
- br i1 %tmp125, label %bb187, label %bb195
-
-bb187: ; preds = %bb174
- %tmp197483 = fcmp ogt float %tmp5, %tmp8 ; <i1> [#uses=2]
- %brmerge790 = or i1 %tmp197483, %tmp125 ; <i1> [#uses=1]
- %tmp4.mux791 = select i1 %tmp197483, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
- br i1 %brmerge790, label %bb226, label %bb218
-
-bb195: ; preds = %bb174
- %tmp197 = fcmp ogt float %tmp5, %tmp11 ; <i1> [#uses=2]
- %brmerge788 = or i1 %tmp197, %tmp125 ; <i1> [#uses=1]
- %tmp4.mux789 = select i1 %tmp197, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
- br i1 %brmerge788, label %bb226, label %bb218
-
-bb218: ; preds = %bb195, %bb187
- br label %bb226
-
-bb226: ; preds = %bb218, %bb195, %bb187, %bb165, %bb155, %bb141
- %iftmp.7.0.in = phi float* [ %tmp10, %bb218 ], [ %result, %bb141 ], [ %result, %bb155 ], [ %result, %bb165 ], [ %tmp4.mux789, %bb195 ], [ %tmp4.mux791, %bb187 ] ; <float*> [#uses=1]
- %iftmp.7.0 = load float* %iftmp.7.0.in ; <float> [#uses=1]
- %tmp229 = getelementptr float* %result, i32 1 ; <float*> [#uses=7]
- %tmp230 = load float* %tmp229, align 4 ; <float> [#uses=6]
- %tmp232 = getelementptr float* %result, i32 3 ; <float*> [#uses=5]
- %tmp233 = load float* %tmp232, align 4 ; <float> [#uses=10]
- %tmp235 = getelementptr float* %result, i32 5 ; <float*> [#uses=5]
- %tmp236 = load float* %tmp235, align 4 ; <float> [#uses=8]
- %tmp238 = getelementptr float* %result, i32 7 ; <float*> [#uses=3]
- %tmp239 = load float* %tmp238, align 4 ; <float> [#uses=8]
- %tmp240 = fcmp olt float %tmp236, %tmp239 ; <i1> [#uses=5]
- br i1 %tmp240, label %bb243, label %bb251
-
-bb243: ; preds = %bb226
- %tmp253485 = fcmp olt float %tmp233, %tmp236 ; <i1> [#uses=1]
- br i1 %tmp253485, label %bb256, label %bb260
-
-bb251: ; preds = %bb226
- %tmp253 = fcmp olt float %tmp233, %tmp239 ; <i1> [#uses=1]
- br i1 %tmp253, label %bb256, label %bb260
-
-bb256: ; preds = %bb251, %bb243
- %tmp282487 = fcmp olt float %tmp230, %tmp233 ; <i1> [#uses=1]
- br i1 %tmp282487, label %bb341, label %bb289
-
-bb260: ; preds = %bb251, %bb243
- br i1 %tmp240, label %bb270, label %bb280
-
-bb270: ; preds = %bb260
- %tmp282489 = fcmp olt float %tmp230, %tmp236 ; <i1> [#uses=1]
- br i1 %tmp282489, label %bb341, label %bb289
-
-bb280: ; preds = %bb260
- %tmp282 = fcmp olt float %tmp230, %tmp239 ; <i1> [#uses=1]
- br i1 %tmp282, label %bb341, label %bb289
-
-bb289: ; preds = %bb280, %bb270, %bb256
- br i1 %tmp240, label %bb302, label %bb310
-
-bb302: ; preds = %bb289
- %tmp312491 = fcmp olt float %tmp233, %tmp236 ; <i1> [#uses=2]
- %brmerge793 = or i1 %tmp312491, %tmp240 ; <i1> [#uses=1]
- %tmp232.mux794 = select i1 %tmp312491, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
- br i1 %brmerge793, label %bb341, label %bb333
-
-bb310: ; preds = %bb289
- %tmp312 = fcmp olt float %tmp233, %tmp239 ; <i1> [#uses=2]
- %brmerge792 = or i1 %tmp312, %tmp240 ; <i1> [#uses=1]
- %tmp232.mux = select i1 %tmp312, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
- br i1 %brmerge792, label %bb341, label %bb333
-
-bb333: ; preds = %bb310, %bb302
- br label %bb341
-
-bb341: ; preds = %bb333, %bb310, %bb302, %bb280, %bb270, %bb256
- %iftmp.14.0.in = phi float* [ %tmp238, %bb333 ], [ %tmp229, %bb280 ], [ %tmp229, %bb270 ], [ %tmp229, %bb256 ], [ %tmp232.mux, %bb310 ], [ %tmp232.mux794, %bb302 ] ; <float*> [#uses=1]
- %iftmp.14.0 = load float* %iftmp.14.0.in ; <float> [#uses=1]
- %tmp355 = fcmp ogt float %tmp236, %tmp239 ; <i1> [#uses=5]
- br i1 %tmp355, label %bb358, label %bb366
-
-bb358: ; preds = %bb341
- %tmp368493 = fcmp ogt float %tmp233, %tmp236 ; <i1> [#uses=1]
- br i1 %tmp368493, label %bb371, label %bb375
-
-bb366: ; preds = %bb341
- %tmp368 = fcmp ogt float %tmp233, %tmp239 ; <i1> [#uses=1]
- br i1 %tmp368, label %bb371, label %bb375
-
-bb371: ; preds = %bb366, %bb358
- %tmp397495 = fcmp ogt float %tmp230, %tmp233 ; <i1> [#uses=1]
- br i1 %tmp397495, label %bb456, label %bb404
-
-bb375: ; preds = %bb366, %bb358
- br i1 %tmp355, label %bb385, label %bb395
-
-bb385: ; preds = %bb375
- %tmp397497 = fcmp ogt float %tmp230, %tmp236 ; <i1> [#uses=1]
- br i1 %tmp397497, label %bb456, label %bb404
-
-bb395: ; preds = %bb375
- %tmp397 = fcmp ogt float %tmp230, %tmp239 ; <i1> [#uses=1]
- br i1 %tmp397, label %bb456, label %bb404
-
-bb404: ; preds = %bb395, %bb385, %bb371
- br i1 %tmp355, label %bb417, label %bb425
-
-bb417: ; preds = %bb404
- %tmp427499 = fcmp ogt float %tmp233, %tmp236 ; <i1> [#uses=2]
- %brmerge797 = or i1 %tmp427499, %tmp355 ; <i1> [#uses=1]
- %tmp232.mux798 = select i1 %tmp427499, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
- br i1 %brmerge797, label %bb456, label %bb448
-
-bb425: ; preds = %bb404
- %tmp427 = fcmp ogt float %tmp233, %tmp239 ; <i1> [#uses=2]
- %brmerge795 = or i1 %tmp427, %tmp355 ; <i1> [#uses=1]
- %tmp232.mux796 = select i1 %tmp427, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
- br i1 %brmerge795, label %bb456, label %bb448
-
-bb448: ; preds = %bb425, %bb417
- br label %bb456
-
-bb456: ; preds = %bb448, %bb425, %bb417, %bb395, %bb385, %bb371
- %iftmp.21.0.in = phi float* [ %tmp238, %bb448 ], [ %tmp229, %bb395 ], [ %tmp229, %bb385 ], [ %tmp229, %bb371 ], [ %tmp232.mux796, %bb425 ], [ %tmp232.mux798, %bb417 ] ; <float*> [#uses=1]
- %iftmp.21.0 = load float* %iftmp.21.0.in ; <float> [#uses=1]
- %tmp458459 = fpext float %iftmp.21.0 to double ; <double> [#uses=1]
- %tmp460461 = fpext float %iftmp.7.0 to double ; <double> [#uses=1]
- %tmp462463 = fpext float %iftmp.14.0 to double ; <double> [#uses=1]
- %tmp464465 = fpext float %iftmp.0.0 to double ; <double> [#uses=1]
- %tmp467 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([48 x i8]* @.str, i32 0, i32 0), double %tmp464465, double %tmp462463, double %tmp460461, double %tmp458459 ) nounwind ; <i32> [#uses=0]
- ret void
-}
-
-declare i32 @printf(i8*, ...) nounwind
+++ /dev/null
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
-; Now this test spills one register. But a reload in the loop is cheaper than
-; the divsd so it's a win.
-
-define fastcc void @fourn(double* %data, i32 %isign) nounwind {
-; CHECK: fourn
-entry:
- br label %bb
-
-bb: ; preds = %bb, %entry
- %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2]
- %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1]
- %0 = add i32 %indvar93, 2 ; <i32> [#uses=1]
- %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1]
- br i1 %1, label %bb30.loopexit, label %bb
-
-; CHECK: %bb30.loopexit
-; CHECK: divsd %xmm0
-; CHECK: movsd %xmm0, 16(%esp)
-; CHECK: %bb3
-bb3: ; preds = %bb30.loopexit, %bb25, %bb3
- %2 = load i32* null, align 4 ; <i32> [#uses=1]
- %3 = mul i32 %2, 0 ; <i32> [#uses=1]
- %4 = icmp slt i32 0, %3 ; <i1> [#uses=1]
- br i1 %4, label %bb18, label %bb3
-
-bb18: ; preds = %bb3
- %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1]
- %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1]
- br label %bb24.preheader
-
-bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader
- br label %bb22.preheader
-
-bb25: ; preds = %bb24.preheader
- %7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0]
- %8 = add i32 %i3.122100, 0 ; <i32> [#uses=1]
- %9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1]
- br i1 %9, label %bb3, label %bb24.preheader
-
-bb24.preheader: ; preds = %bb25, %bb18
- %i3.122100 = or i32 0, 1 ; <i32> [#uses=2]
- %10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1]
- br i1 %10, label %bb25, label %bb22.preheader
-
-bb30.loopexit: ; preds = %bb
- %11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1]
- br label %bb3
-}
-
-declare double @sin(double) nounwind readonly
+++ /dev/null
-; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | not grep commuted
-; rdar://6608609
-
-define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
-entry:
- %tmp.i2 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
- %tmp2.i = or <2 x i64> %tmp.i2, <i64 4607632778762754458, i64 4607632778762754458> ; <<2 x i64>> [#uses=1]
- %tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
- %0 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %A, <2 x double> %tmp3.i) nounwind readnone ; <<2 x double>> [#uses=1]
- %tmp.i = fadd <2 x double> %0, %C ; <<2 x double>> [#uses=1]
- ret <2 x double> %tmp.i
-}
-
-declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone
+++ /dev/null
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats 2>&1 | grep "5 machine-licm"
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn | FileCheck %s
-; rdar://6627786
-; rdar://7792037
-
-target triple = "x86_64-apple-darwin10.0"
- %struct.Key = type { i64 }
- %struct.__Rec = type opaque
- %struct.__vv = type { }
-
-define %struct.__vv* @t(%struct.Key* %desc, i64 %p) nounwind ssp {
-entry:
- br label %bb4
-
-bb4: ; preds = %bb.i, %bb26, %bb4, %entry
-; CHECK: %bb4
-; CHECK: xorb
-; CHECK: callq
-; CHECK: movq
-; CHECK: xorl
-; CHECK: xorb
-
- %0 = call i32 (...)* @xxGetOffsetForCode(i32 undef) nounwind ; <i32> [#uses=0]
- %ins = or i64 %p, 2097152 ; <i64> [#uses=1]
- %1 = call i32 (...)* @xxCalculateMidType(%struct.Key* %desc, i32 0) nounwind ; <i32> [#uses=1]
- %cond = icmp eq i32 %1, 1 ; <i1> [#uses=1]
- br i1 %cond, label %bb26, label %bb4
-
-bb26: ; preds = %bb4
- %2 = and i64 %ins, 15728640 ; <i64> [#uses=1]
- %cond.i = icmp eq i64 %2, 1048576 ; <i1> [#uses=1]
- br i1 %cond.i, label %bb.i, label %bb4
-
-bb.i: ; preds = %bb26
- %3 = load i32* null, align 4 ; <i32> [#uses=1]
- %4 = uitofp i32 %3 to float ; <float> [#uses=1]
- %.sum13.i = add i64 0, 4 ; <i64> [#uses=1]
- %5 = getelementptr i8* null, i64 %.sum13.i ; <i8*> [#uses=1]
- %6 = bitcast i8* %5 to i32* ; <i32*> [#uses=1]
- %7 = load i32* %6, align 4 ; <i32> [#uses=1]
- %8 = uitofp i32 %7 to float ; <float> [#uses=1]
- %.sum.i = add i64 0, 8 ; <i64> [#uses=1]
- %9 = getelementptr i8* null, i64 %.sum.i ; <i8*> [#uses=1]
- %10 = bitcast i8* %9 to i32* ; <i32*> [#uses=1]
- %11 = load i32* %10, align 4 ; <i32> [#uses=1]
- %12 = uitofp i32 %11 to float ; <float> [#uses=1]
- %13 = insertelement <4 x float> undef, float %4, i32 0 ; <<4 x float>> [#uses=1]
- %14 = insertelement <4 x float> %13, float %8, i32 1 ; <<4 x float>> [#uses=1]
- %15 = insertelement <4 x float> %14, float %12, i32 2 ; <<4 x float>> [#uses=1]
- store <4 x float> %15, <4 x float>* null, align 16
- br label %bb4
-}
-
-declare i32 @xxGetOffsetForCode(...)
-
-declare i32 @xxCalculateMidType(...)
+++ /dev/null
-; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static -o /dev/null -stats -info-output-file - > %t
-; RUN: not grep spill %t
-; RUN: not grep "%rsp" %t
-; RUN: not grep "%rbp" %t
-
-; The register-pressure scheduler should be able to schedule this in a
-; way that does not require spills.
-
-@X = external global i64 ; <i64*> [#uses=25]
-
-define fastcc i64 @foo() nounwind {
- %tmp = load volatile i64* @X ; <i64> [#uses=7]
- %tmp1 = load volatile i64* @X ; <i64> [#uses=5]
- %tmp2 = load volatile i64* @X ; <i64> [#uses=3]
- %tmp3 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp4 = load volatile i64* @X ; <i64> [#uses=5]
- %tmp5 = load volatile i64* @X ; <i64> [#uses=3]
- %tmp6 = load volatile i64* @X ; <i64> [#uses=2]
- %tmp7 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp8 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp9 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp10 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp11 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp12 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp13 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp14 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp15 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp16 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp17 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp18 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp19 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp20 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp21 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp22 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp23 = load volatile i64* @X ; <i64> [#uses=1]
- %tmp24 = call i64 @llvm.bswap.i64(i64 %tmp8) ; <i64> [#uses=1]
- %tmp25 = add i64 %tmp6, %tmp5 ; <i64> [#uses=1]
- %tmp26 = add i64 %tmp25, %tmp4 ; <i64> [#uses=1]
- %tmp27 = add i64 %tmp7, %tmp4 ; <i64> [#uses=1]
- %tmp28 = add i64 %tmp27, %tmp26 ; <i64> [#uses=1]
- %tmp29 = add i64 %tmp28, %tmp24 ; <i64> [#uses=2]
- %tmp30 = add i64 %tmp2, %tmp1 ; <i64> [#uses=1]
- %tmp31 = add i64 %tmp30, %tmp ; <i64> [#uses=1]
- %tmp32 = add i64 %tmp2, %tmp1 ; <i64> [#uses=1]
- %tmp33 = add i64 %tmp31, %tmp32 ; <i64> [#uses=1]
- %tmp34 = add i64 %tmp29, %tmp3 ; <i64> [#uses=5]
- %tmp35 = add i64 %tmp33, %tmp ; <i64> [#uses=1]
- %tmp36 = add i64 %tmp35, %tmp29 ; <i64> [#uses=7]
- %tmp37 = call i64 @llvm.bswap.i64(i64 %tmp9) ; <i64> [#uses=1]
- %tmp38 = add i64 %tmp4, %tmp5 ; <i64> [#uses=1]
- %tmp39 = add i64 %tmp38, %tmp34 ; <i64> [#uses=1]
- %tmp40 = add i64 %tmp6, %tmp37 ; <i64> [#uses=1]
- %tmp41 = add i64 %tmp40, %tmp39 ; <i64> [#uses=1]
- %tmp42 = add i64 %tmp41, %tmp34 ; <i64> [#uses=2]
- %tmp43 = add i64 %tmp1, %tmp ; <i64> [#uses=1]
- %tmp44 = add i64 %tmp36, %tmp43 ; <i64> [#uses=1]
- %tmp45 = add i64 %tmp1, %tmp ; <i64> [#uses=1]
- %tmp46 = add i64 %tmp44, %tmp45 ; <i64> [#uses=1]
- %tmp47 = add i64 %tmp42, %tmp2 ; <i64> [#uses=5]
- %tmp48 = add i64 %tmp36, %tmp46 ; <i64> [#uses=1]
- %tmp49 = add i64 %tmp48, %tmp42 ; <i64> [#uses=7]
- %tmp50 = call i64 @llvm.bswap.i64(i64 %tmp10) ; <i64> [#uses=1]
- %tmp51 = add i64 %tmp34, %tmp4 ; <i64> [#uses=1]
- %tmp52 = add i64 %tmp51, %tmp47 ; <i64> [#uses=1]
- %tmp53 = add i64 %tmp5, %tmp50 ; <i64> [#uses=1]
- %tmp54 = add i64 %tmp53, %tmp52 ; <i64> [#uses=1]
- %tmp55 = add i64 %tmp54, %tmp47 ; <i64> [#uses=2]
- %tmp56 = add i64 %tmp36, %tmp ; <i64> [#uses=1]
- %tmp57 = add i64 %tmp49, %tmp56 ; <i64> [#uses=1]
- %tmp58 = add i64 %tmp36, %tmp ; <i64> [#uses=1]
- %tmp59 = add i64 %tmp57, %tmp58 ; <i64> [#uses=1]
- %tmp60 = add i64 %tmp55, %tmp1 ; <i64> [#uses=5]
- %tmp61 = add i64 %tmp49, %tmp59 ; <i64> [#uses=1]
- %tmp62 = add i64 %tmp61, %tmp55 ; <i64> [#uses=7]
- %tmp63 = call i64 @llvm.bswap.i64(i64 %tmp11) ; <i64> [#uses=1]
- %tmp64 = add i64 %tmp47, %tmp34 ; <i64> [#uses=1]
- %tmp65 = add i64 %tmp64, %tmp60 ; <i64> [#uses=1]
- %tmp66 = add i64 %tmp4, %tmp63 ; <i64> [#uses=1]
- %tmp67 = add i64 %tmp66, %tmp65 ; <i64> [#uses=1]
- %tmp68 = add i64 %tmp67, %tmp60 ; <i64> [#uses=2]
- %tmp69 = add i64 %tmp49, %tmp36 ; <i64> [#uses=1]
- %tmp70 = add i64 %tmp62, %tmp69 ; <i64> [#uses=1]
- %tmp71 = add i64 %tmp49, %tmp36 ; <i64> [#uses=1]
- %tmp72 = add i64 %tmp70, %tmp71 ; <i64> [#uses=1]
- %tmp73 = add i64 %tmp68, %tmp ; <i64> [#uses=5]
- %tmp74 = add i64 %tmp62, %tmp72 ; <i64> [#uses=1]
- %tmp75 = add i64 %tmp74, %tmp68 ; <i64> [#uses=7]
- %tmp76 = call i64 @llvm.bswap.i64(i64 %tmp12) ; <i64> [#uses=1]
- %tmp77 = add i64 %tmp60, %tmp47 ; <i64> [#uses=1]
- %tmp78 = add i64 %tmp77, %tmp73 ; <i64> [#uses=1]
- %tmp79 = add i64 %tmp34, %tmp76 ; <i64> [#uses=1]
- %tmp80 = add i64 %tmp79, %tmp78 ; <i64> [#uses=1]
- %tmp81 = add i64 %tmp80, %tmp73 ; <i64> [#uses=2]
- %tmp82 = add i64 %tmp62, %tmp49 ; <i64> [#uses=1]
- %tmp83 = add i64 %tmp75, %tmp82 ; <i64> [#uses=1]
- %tmp84 = add i64 %tmp62, %tmp49 ; <i64> [#uses=1]
- %tmp85 = add i64 %tmp83, %tmp84 ; <i64> [#uses=1]
- %tmp86 = add i64 %tmp81, %tmp36 ; <i64> [#uses=5]
- %tmp87 = add i64 %tmp75, %tmp85 ; <i64> [#uses=1]
- %tmp88 = add i64 %tmp87, %tmp81 ; <i64> [#uses=7]
- %tmp89 = call i64 @llvm.bswap.i64(i64 %tmp13) ; <i64> [#uses=1]
- %tmp90 = add i64 %tmp73, %tmp60 ; <i64> [#uses=1]
- %tmp91 = add i64 %tmp90, %tmp86 ; <i64> [#uses=1]
- %tmp92 = add i64 %tmp47, %tmp89 ; <i64> [#uses=1]
- %tmp93 = add i64 %tmp92, %tmp91 ; <i64> [#uses=1]
- %tmp94 = add i64 %tmp93, %tmp86 ; <i64> [#uses=2]
- %tmp95 = add i64 %tmp75, %tmp62 ; <i64> [#uses=1]
- %tmp96 = add i64 %tmp88, %tmp95 ; <i64> [#uses=1]
- %tmp97 = add i64 %tmp75, %tmp62 ; <i64> [#uses=1]
- %tmp98 = add i64 %tmp96, %tmp97 ; <i64> [#uses=1]
- %tmp99 = add i64 %tmp94, %tmp49 ; <i64> [#uses=5]
- %tmp100 = add i64 %tmp88, %tmp98 ; <i64> [#uses=1]
- %tmp101 = add i64 %tmp100, %tmp94 ; <i64> [#uses=7]
- %tmp102 = call i64 @llvm.bswap.i64(i64 %tmp14) ; <i64> [#uses=1]
- %tmp103 = add i64 %tmp86, %tmp73 ; <i64> [#uses=1]
- %tmp104 = add i64 %tmp103, %tmp99 ; <i64> [#uses=1]
- %tmp105 = add i64 %tmp102, %tmp60 ; <i64> [#uses=1]
- %tmp106 = add i64 %tmp105, %tmp104 ; <i64> [#uses=1]
- %tmp107 = add i64 %tmp106, %tmp99 ; <i64> [#uses=2]
- %tmp108 = add i64 %tmp88, %tmp75 ; <i64> [#uses=1]
- %tmp109 = add i64 %tmp101, %tmp108 ; <i64> [#uses=1]
- %tmp110 = add i64 %tmp88, %tmp75 ; <i64> [#uses=1]
- %tmp111 = add i64 %tmp109, %tmp110 ; <i64> [#uses=1]
- %tmp112 = add i64 %tmp107, %tmp62 ; <i64> [#uses=5]
- %tmp113 = add i64 %tmp101, %tmp111 ; <i64> [#uses=1]
- %tmp114 = add i64 %tmp113, %tmp107 ; <i64> [#uses=7]
- %tmp115 = call i64 @llvm.bswap.i64(i64 %tmp15) ; <i64> [#uses=1]
- %tmp116 = add i64 %tmp99, %tmp86 ; <i64> [#uses=1]
- %tmp117 = add i64 %tmp116, %tmp112 ; <i64> [#uses=1]
- %tmp118 = add i64 %tmp115, %tmp73 ; <i64> [#uses=1]
- %tmp119 = add i64 %tmp118, %tmp117 ; <i64> [#uses=1]
- %tmp120 = add i64 %tmp119, %tmp112 ; <i64> [#uses=2]
- %tmp121 = add i64 %tmp101, %tmp88 ; <i64> [#uses=1]
- %tmp122 = add i64 %tmp114, %tmp121 ; <i64> [#uses=1]
- %tmp123 = add i64 %tmp101, %tmp88 ; <i64> [#uses=1]
- %tmp124 = add i64 %tmp122, %tmp123 ; <i64> [#uses=1]
- %tmp125 = add i64 %tmp120, %tmp75 ; <i64> [#uses=5]
- %tmp126 = add i64 %tmp114, %tmp124 ; <i64> [#uses=1]
- %tmp127 = add i64 %tmp126, %tmp120 ; <i64> [#uses=7]
- %tmp128 = call i64 @llvm.bswap.i64(i64 %tmp16) ; <i64> [#uses=1]
- %tmp129 = add i64 %tmp112, %tmp99 ; <i64> [#uses=1]
- %tmp130 = add i64 %tmp129, %tmp125 ; <i64> [#uses=1]
- %tmp131 = add i64 %tmp128, %tmp86 ; <i64> [#uses=1]
- %tmp132 = add i64 %tmp131, %tmp130 ; <i64> [#uses=1]
- %tmp133 = add i64 %tmp132, %tmp125 ; <i64> [#uses=2]
- %tmp134 = add i64 %tmp114, %tmp101 ; <i64> [#uses=1]
- %tmp135 = add i64 %tmp127, %tmp134 ; <i64> [#uses=1]
- %tmp136 = add i64 %tmp114, %tmp101 ; <i64> [#uses=1]
- %tmp137 = add i64 %tmp135, %tmp136 ; <i64> [#uses=1]
- %tmp138 = add i64 %tmp133, %tmp88 ; <i64> [#uses=5]
- %tmp139 = add i64 %tmp127, %tmp137 ; <i64> [#uses=1]
- %tmp140 = add i64 %tmp139, %tmp133 ; <i64> [#uses=7]
- %tmp141 = call i64 @llvm.bswap.i64(i64 %tmp17) ; <i64> [#uses=1]
- %tmp142 = add i64 %tmp125, %tmp112 ; <i64> [#uses=1]
- %tmp143 = add i64 %tmp142, %tmp138 ; <i64> [#uses=1]
- %tmp144 = add i64 %tmp141, %tmp99 ; <i64> [#uses=1]
- %tmp145 = add i64 %tmp144, %tmp143 ; <i64> [#uses=1]
- %tmp146 = add i64 %tmp145, %tmp138 ; <i64> [#uses=2]
- %tmp147 = add i64 %tmp127, %tmp114 ; <i64> [#uses=1]
- %tmp148 = add i64 %tmp140, %tmp147 ; <i64> [#uses=1]
- %tmp149 = add i64 %tmp127, %tmp114 ; <i64> [#uses=1]
- %tmp150 = add i64 %tmp148, %tmp149 ; <i64> [#uses=1]
- %tmp151 = add i64 %tmp146, %tmp101 ; <i64> [#uses=5]
- %tmp152 = add i64 %tmp140, %tmp150 ; <i64> [#uses=1]
- %tmp153 = add i64 %tmp152, %tmp146 ; <i64> [#uses=7]
- %tmp154 = call i64 @llvm.bswap.i64(i64 %tmp18) ; <i64> [#uses=1]
- %tmp155 = add i64 %tmp138, %tmp125 ; <i64> [#uses=1]
- %tmp156 = add i64 %tmp155, %tmp151 ; <i64> [#uses=1]
- %tmp157 = add i64 %tmp154, %tmp112 ; <i64> [#uses=1]
- %tmp158 = add i64 %tmp157, %tmp156 ; <i64> [#uses=1]
- %tmp159 = add i64 %tmp158, %tmp151 ; <i64> [#uses=2]
- %tmp160 = add i64 %tmp140, %tmp127 ; <i64> [#uses=1]
- %tmp161 = add i64 %tmp153, %tmp160 ; <i64> [#uses=1]
- %tmp162 = add i64 %tmp140, %tmp127 ; <i64> [#uses=1]
- %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
- %tmp164 = add i64 %tmp159, %tmp114 ; <i64> [#uses=5]
- %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
- %tmp166 = add i64 %tmp165, %tmp159 ; <i64> [#uses=7]
- %tmp167 = call i64 @llvm.bswap.i64(i64 %tmp19) ; <i64> [#uses=1]
- %tmp168 = add i64 %tmp151, %tmp138 ; <i64> [#uses=1]
- %tmp169 = add i64 %tmp168, %tmp164 ; <i64> [#uses=1]
- %tmp170 = add i64 %tmp167, %tmp125 ; <i64> [#uses=1]
- %tmp171 = add i64 %tmp170, %tmp169 ; <i64> [#uses=1]
- %tmp172 = add i64 %tmp171, %tmp164 ; <i64> [#uses=2]
- %tmp173 = add i64 %tmp153, %tmp140 ; <i64> [#uses=1]
- %tmp174 = add i64 %tmp166, %tmp173 ; <i64> [#uses=1]
- %tmp175 = add i64 %tmp153, %tmp140 ; <i64> [#uses=1]
- %tmp176 = add i64 %tmp174, %tmp175 ; <i64> [#uses=1]
- %tmp177 = add i64 %tmp172, %tmp127 ; <i64> [#uses=5]
- %tmp178 = add i64 %tmp166, %tmp176 ; <i64> [#uses=1]
- %tmp179 = add i64 %tmp178, %tmp172 ; <i64> [#uses=6]
- %tmp180 = call i64 @llvm.bswap.i64(i64 %tmp20) ; <i64> [#uses=1]
- %tmp181 = add i64 %tmp164, %tmp151 ; <i64> [#uses=1]
- %tmp182 = add i64 %tmp181, %tmp177 ; <i64> [#uses=1]
- %tmp183 = add i64 %tmp180, %tmp138 ; <i64> [#uses=1]
- %tmp184 = add i64 %tmp183, %tmp182 ; <i64> [#uses=1]
- %tmp185 = add i64 %tmp184, %tmp177 ; <i64> [#uses=2]
- %tmp186 = add i64 %tmp166, %tmp153 ; <i64> [#uses=1]
- %tmp187 = add i64 %tmp179, %tmp186 ; <i64> [#uses=1]
- %tmp188 = add i64 %tmp166, %tmp153 ; <i64> [#uses=1]
- %tmp189 = add i64 %tmp187, %tmp188 ; <i64> [#uses=1]
- %tmp190 = add i64 %tmp185, %tmp140 ; <i64> [#uses=4]
- %tmp191 = add i64 %tmp179, %tmp189 ; <i64> [#uses=1]
- %tmp192 = add i64 %tmp191, %tmp185 ; <i64> [#uses=4]
- %tmp193 = call i64 @llvm.bswap.i64(i64 %tmp21) ; <i64> [#uses=1]
- %tmp194 = add i64 %tmp177, %tmp164 ; <i64> [#uses=1]
- %tmp195 = add i64 %tmp194, %tmp190 ; <i64> [#uses=1]
- %tmp196 = add i64 %tmp193, %tmp151 ; <i64> [#uses=1]
- %tmp197 = add i64 %tmp196, %tmp195 ; <i64> [#uses=1]
- %tmp198 = add i64 %tmp197, %tmp190 ; <i64> [#uses=2]
- %tmp199 = add i64 %tmp179, %tmp166 ; <i64> [#uses=1]
- %tmp200 = add i64 %tmp192, %tmp199 ; <i64> [#uses=1]
- %tmp201 = add i64 %tmp179, %tmp166 ; <i64> [#uses=1]
- %tmp202 = add i64 %tmp200, %tmp201 ; <i64> [#uses=1]
- %tmp203 = add i64 %tmp198, %tmp153 ; <i64> [#uses=3]
- %tmp204 = add i64 %tmp192, %tmp202 ; <i64> [#uses=1]
- %tmp205 = add i64 %tmp204, %tmp198 ; <i64> [#uses=2]
- %tmp206 = call i64 @llvm.bswap.i64(i64 %tmp22) ; <i64> [#uses=1]
- %tmp207 = add i64 %tmp190, %tmp177 ; <i64> [#uses=1]
- %tmp208 = add i64 %tmp207, %tmp203 ; <i64> [#uses=1]
- %tmp209 = add i64 %tmp206, %tmp164 ; <i64> [#uses=1]
- %tmp210 = add i64 %tmp209, %tmp208 ; <i64> [#uses=1]
- %tmp211 = add i64 %tmp210, %tmp203 ; <i64> [#uses=2]
- %tmp212 = add i64 %tmp192, %tmp179 ; <i64> [#uses=1]
- %tmp213 = add i64 %tmp205, %tmp212 ; <i64> [#uses=1]
- %tmp214 = add i64 %tmp192, %tmp179 ; <i64> [#uses=1]
- %tmp215 = add i64 %tmp213, %tmp214 ; <i64> [#uses=1]
- %tmp216 = add i64 %tmp211, %tmp166 ; <i64> [#uses=2]
- %tmp217 = add i64 %tmp205, %tmp215 ; <i64> [#uses=1]
- %tmp218 = add i64 %tmp217, %tmp211 ; <i64> [#uses=1]
- %tmp219 = call i64 @llvm.bswap.i64(i64 %tmp23) ; <i64> [#uses=2]
- store volatile i64 %tmp219, i64* @X, align 8
- %tmp220 = add i64 %tmp203, %tmp190 ; <i64> [#uses=1]
- %tmp221 = add i64 %tmp220, %tmp216 ; <i64> [#uses=1]
- %tmp222 = add i64 %tmp219, %tmp177 ; <i64> [#uses=1]
- %tmp223 = add i64 %tmp222, %tmp221 ; <i64> [#uses=1]
- %tmp224 = add i64 %tmp223, %tmp216 ; <i64> [#uses=1]
- %tmp225 = add i64 %tmp224, %tmp218 ; <i64> [#uses=1]
- ret i64 %tmp225
-}
-
-declare i64 @llvm.bswap.i64(i64) nounwind readnone
+++ /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | grep "Number of modref unfolded"
-; XFAIL: *
-; 69408 removed the opportunity for this optimization to work
-
- %struct.SHA512_CTX = type { [8 x i64], i64, i64, %struct.anon, i32, i32 }
- %struct.anon = type { [16 x i64] }
-@K512 = external constant [80 x i64], align 32 ; <[80 x i64]*> [#uses=2]
-
-define fastcc void @sha512_block_data_order(%struct.SHA512_CTX* nocapture %ctx, i8* nocapture %in, i64 %num) nounwind ssp {
-entry:
- br label %bb349
-
-bb349: ; preds = %bb349, %entry
- %e.0489 = phi i64 [ 0, %entry ], [ %e.0, %bb349 ] ; <i64> [#uses=3]
- %b.0472 = phi i64 [ 0, %entry ], [ %87, %bb349 ] ; <i64> [#uses=2]
- %asmtmp356 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %e.0489) nounwind ; <i64> [#uses=1]
- %0 = xor i64 0, %asmtmp356 ; <i64> [#uses=1]
- %1 = add i64 0, %0 ; <i64> [#uses=1]
- %2 = add i64 %1, 0 ; <i64> [#uses=1]
- %3 = add i64 %2, 0 ; <i64> [#uses=1]
- %4 = add i64 %3, 0 ; <i64> [#uses=5]
- %asmtmp372 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %4) nounwind ; <i64> [#uses=1]
- %asmtmp373 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %4) nounwind ; <i64> [#uses=0]
- %5 = xor i64 %asmtmp372, 0 ; <i64> [#uses=0]
- %6 = xor i64 0, %b.0472 ; <i64> [#uses=1]
- %7 = and i64 %4, %6 ; <i64> [#uses=1]
- %8 = xor i64 %7, 0 ; <i64> [#uses=1]
- %9 = add i64 0, %8 ; <i64> [#uses=1]
- %10 = add i64 %9, 0 ; <i64> [#uses=2]
- %asmtmp377 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 0) nounwind ; <i64> [#uses=1]
- %11 = xor i64 0, %asmtmp377 ; <i64> [#uses=1]
- %12 = add i64 0, %11 ; <i64> [#uses=1]
- %13 = add i64 %12, 0 ; <i64> [#uses=1]
- %not381 = xor i64 0, -1 ; <i64> [#uses=1]
- %14 = and i64 %e.0489, %not381 ; <i64> [#uses=1]
- %15 = xor i64 0, %14 ; <i64> [#uses=1]
- %16 = add i64 %15, 0 ; <i64> [#uses=1]
- %17 = add i64 %16, %13 ; <i64> [#uses=1]
- %18 = add i64 %17, 0 ; <i64> [#uses=1]
- %19 = add i64 %18, 0 ; <i64> [#uses=2]
- %20 = add i64 %19, %b.0472 ; <i64> [#uses=3]
- %21 = add i64 %19, 0 ; <i64> [#uses=1]
- %22 = add i64 %21, 0 ; <i64> [#uses=1]
- %23 = add i32 0, 12 ; <i32> [#uses=1]
- %24 = and i32 %23, 12 ; <i32> [#uses=1]
- %25 = zext i32 %24 to i64 ; <i64> [#uses=1]
- %26 = getelementptr [16 x i64]* null, i64 0, i64 %25 ; <i64*> [#uses=0]
- %27 = add i64 0, %e.0489 ; <i64> [#uses=1]
- %28 = add i64 %27, 0 ; <i64> [#uses=1]
- %29 = add i64 %28, 0 ; <i64> [#uses=1]
- %30 = add i64 %29, 0 ; <i64> [#uses=2]
- %31 = and i64 %10, %4 ; <i64> [#uses=1]
- %32 = xor i64 0, %31 ; <i64> [#uses=1]
- %33 = add i64 %30, 0 ; <i64> [#uses=3]
- %34 = add i64 %30, %32 ; <i64> [#uses=1]
- %35 = add i64 %34, 0 ; <i64> [#uses=1]
- %36 = and i64 %33, %20 ; <i64> [#uses=1]
- %37 = xor i64 %36, 0 ; <i64> [#uses=1]
- %38 = add i64 %37, 0 ; <i64> [#uses=1]
- %39 = add i64 %38, 0 ; <i64> [#uses=1]
- %40 = add i64 %39, 0 ; <i64> [#uses=1]
- %41 = add i64 %40, 0 ; <i64> [#uses=1]
- %42 = add i64 %41, %4 ; <i64> [#uses=3]
- %43 = or i32 0, 6 ; <i32> [#uses=1]
- %44 = and i32 %43, 14 ; <i32> [#uses=1]
- %45 = zext i32 %44 to i64 ; <i64> [#uses=1]
- %46 = getelementptr [16 x i64]* null, i64 0, i64 %45 ; <i64*> [#uses=1]
- %not417 = xor i64 %42, -1 ; <i64> [#uses=1]
- %47 = and i64 %20, %not417 ; <i64> [#uses=1]
- %48 = xor i64 0, %47 ; <i64> [#uses=1]
- %49 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; <i64*> [#uses=1]
- %50 = load i64* %49, align 8 ; <i64> [#uses=1]
- %51 = add i64 %48, 0 ; <i64> [#uses=1]
- %52 = add i64 %51, 0 ; <i64> [#uses=1]
- %53 = add i64 %52, 0 ; <i64> [#uses=1]
- %54 = add i64 %53, %50 ; <i64> [#uses=2]
- %asmtmp420 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 0) nounwind ; <i64> [#uses=1]
- %asmtmp421 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 0) nounwind ; <i64> [#uses=1]
- %55 = xor i64 %asmtmp420, 0 ; <i64> [#uses=1]
- %56 = xor i64 %55, %asmtmp421 ; <i64> [#uses=1]
- %57 = add i64 %54, %10 ; <i64> [#uses=5]
- %58 = add i64 %54, 0 ; <i64> [#uses=1]
- %59 = add i64 %58, %56 ; <i64> [#uses=2]
- %60 = or i32 0, 7 ; <i32> [#uses=1]
- %61 = and i32 %60, 15 ; <i32> [#uses=1]
- %62 = zext i32 %61 to i64 ; <i64> [#uses=1]
- %63 = getelementptr [16 x i64]* null, i64 0, i64 %62 ; <i64*> [#uses=2]
- %64 = load i64* null, align 8 ; <i64> [#uses=1]
- %65 = lshr i64 %64, 6 ; <i64> [#uses=1]
- %66 = xor i64 0, %65 ; <i64> [#uses=1]
- %67 = xor i64 %66, 0 ; <i64> [#uses=1]
- %68 = load i64* %46, align 8 ; <i64> [#uses=1]
- %69 = load i64* null, align 8 ; <i64> [#uses=1]
- %70 = add i64 %68, 0 ; <i64> [#uses=1]
- %71 = add i64 %70, %67 ; <i64> [#uses=1]
- %72 = add i64 %71, %69 ; <i64> [#uses=1]
- %asmtmp427 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 18, i64 %57) nounwind ; <i64> [#uses=1]
- %asmtmp428 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %57) nounwind ; <i64> [#uses=1]
- %73 = xor i64 %asmtmp427, 0 ; <i64> [#uses=1]
- %74 = xor i64 %73, %asmtmp428 ; <i64> [#uses=1]
- %75 = and i64 %57, %42 ; <i64> [#uses=1]
- %not429 = xor i64 %57, -1 ; <i64> [#uses=1]
- %76 = and i64 %33, %not429 ; <i64> [#uses=1]
- %77 = xor i64 %75, %76 ; <i64> [#uses=1]
- %78 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; <i64*> [#uses=1]
- %79 = load i64* %78, align 16 ; <i64> [#uses=1]
- %80 = add i64 %77, %20 ; <i64> [#uses=1]
- %81 = add i64 %80, %72 ; <i64> [#uses=1]
- %82 = add i64 %81, %74 ; <i64> [#uses=1]
- %83 = add i64 %82, %79 ; <i64> [#uses=1]
- %asmtmp432 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %59) nounwind ; <i64> [#uses=1]
- %asmtmp433 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %59) nounwind ; <i64> [#uses=1]
- %84 = xor i64 %asmtmp432, 0 ; <i64> [#uses=1]
- %85 = xor i64 %84, %asmtmp433 ; <i64> [#uses=1]
- %86 = add i64 %83, %22 ; <i64> [#uses=2]
- %87 = add i64 0, %85 ; <i64> [#uses=1]
- %asmtmp435 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 8, i64 0) nounwind ; <i64> [#uses=1]
- %88 = xor i64 0, %asmtmp435 ; <i64> [#uses=1]
- %89 = load i64* null, align 8 ; <i64> [#uses=3]
- %asmtmp436 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 19, i64 %89) nounwind ; <i64> [#uses=1]
- %asmtmp437 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 %89) nounwind ; <i64> [#uses=1]
- %90 = lshr i64 %89, 6 ; <i64> [#uses=1]
- %91 = xor i64 %asmtmp436, %90 ; <i64> [#uses=1]
- %92 = xor i64 %91, %asmtmp437 ; <i64> [#uses=1]
- %93 = load i64* %63, align 8 ; <i64> [#uses=1]
- %94 = load i64* null, align 8 ; <i64> [#uses=1]
- %95 = add i64 %93, %88 ; <i64> [#uses=1]
- %96 = add i64 %95, %92 ; <i64> [#uses=1]
- %97 = add i64 %96, %94 ; <i64> [#uses=2]
- store i64 %97, i64* %63, align 8
- %98 = and i64 %86, %57 ; <i64> [#uses=1]
- %not441 = xor i64 %86, -1 ; <i64> [#uses=1]
- %99 = and i64 %42, %not441 ; <i64> [#uses=1]
- %100 = xor i64 %98, %99 ; <i64> [#uses=1]
- %101 = add i64 %100, %33 ; <i64> [#uses=1]
- %102 = add i64 %101, %97 ; <i64> [#uses=1]
- %103 = add i64 %102, 0 ; <i64> [#uses=1]
- %104 = add i64 %103, 0 ; <i64> [#uses=1]
- %e.0 = add i64 %104, %35 ; <i64> [#uses=1]
- br label %bb349
-}
+++ /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -relocation-model=pic -disable-fp-elim -stats 2>&1 | not grep ext-opt
-
-define fastcc i8* @S_scan_str(i8* %start, i32 %keep_quoted, i32 %keep_delims) nounwind ssp {
-entry:
- switch i8 undef, label %bb6 [
- i8 9, label %bb5
- i8 32, label %bb5
- i8 10, label %bb5
- i8 13, label %bb5
- i8 12, label %bb5
- ]
-
-bb5: ; preds = %entry, %entry, %entry, %entry, %entry
- br label %bb6
-
-bb6: ; preds = %bb5, %entry
- br i1 undef, label %bb7, label %bb9
-
-bb7: ; preds = %bb6
- unreachable
-
-bb9: ; preds = %bb6
- %0 = load i8* undef, align 1 ; <i8> [#uses=3]
- br i1 undef, label %bb12, label %bb10
-
-bb10: ; preds = %bb9
- br i1 undef, label %bb12, label %bb11
-
-bb11: ; preds = %bb10
- unreachable
-
-bb12: ; preds = %bb10, %bb9
- br i1 undef, label %bb13, label %bb14
-
-bb13: ; preds = %bb12
- store i8 %0, i8* undef, align 1
- %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
- br label %bb18
-
-bb14: ; preds = %bb12
- br label %bb18
-
-bb18: ; preds = %bb14, %bb13
- %termcode.0 = phi i32 [ %1, %bb13 ], [ undef, %bb14 ] ; <i32> [#uses=2]
- %2 = icmp eq i8 %0, 0 ; <i1> [#uses=1]
- br i1 %2, label %bb21, label %bb19
-
-bb19: ; preds = %bb18
- br i1 undef, label %bb21, label %bb20
-
-bb20: ; preds = %bb19
- br label %bb21
-
-bb21: ; preds = %bb20, %bb19, %bb18
- %termcode.1 = phi i32 [ %termcode.0, %bb18 ], [ %termcode.0, %bb19 ], [ undef, %bb20 ] ; <i32> [#uses=0]
- unreachable
-}
+++ /dev/null
-; RUN: llc < %s -O0 -disable-fp-elim -relocation-model=pic -stats 2>&1 | FileCheck %s
-;
-; This test should not cause any spilling with RAFast.
-;
-; CHECK: Number of copies coalesced
-; CHECK-NOT: Number of stores added
-;
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
-target triple = "x86_64-apple-darwin10.0.0"
-
-%0 = type { i64, i64, i8*, i8* }
-%1 = type opaque
-%2 = type opaque
-%3 = type <{ i8*, i32, i32, void (%4*)*, i8*, i64 }>
-%4 = type { i8**, i32, i32, i8**, %5*, i64 }
-%5 = type { i64, i64 }
-%6 = type { i8*, i32, i32, i8*, %5* }
-
-@0 = external hidden constant %0
-
-define hidden void @f() ssp {
-bb:
- %tmp5 = alloca i64, align 8
- %tmp6 = alloca void ()*, align 8
- %tmp7 = alloca %3, align 8
- store i64 0, i64* %tmp5, align 8
- br label %bb8
-
-bb8: ; preds = %bb23, %bb
- %tmp15 = getelementptr inbounds %3* %tmp7, i32 0, i32 4
- store i8* bitcast (%0* @0 to i8*), i8** %tmp15
- %tmp16 = bitcast %3* %tmp7 to void ()*
- store void ()* %tmp16, void ()** %tmp6, align 8
- %tmp17 = load void ()** %tmp6, align 8
- %tmp18 = bitcast void ()* %tmp17 to %6*
- %tmp19 = getelementptr inbounds %6* %tmp18, i32 0, i32 3
- %tmp20 = bitcast %6* %tmp18 to i8*
- %tmp21 = load i8** %tmp19
- %tmp22 = bitcast i8* %tmp21 to void (i8*)*
- call void %tmp22(i8* %tmp20)
- br label %bb23
-
-bb23: ; preds = %bb8
- %tmp24 = load i64* %tmp5, align 8
- %tmp25 = add i64 %tmp24, 1
- store i64 %tmp25, i64* %tmp5, align 8
- %tmp26 = icmp ult i64 %tmp25, 10
- br i1 %tmp26, label %bb8, label %bb27
-
-bb27: ; preds = %bb23
- ret void
-}
+++ /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -stats 2>&1 | \
-; RUN: not grep "Number of machine instructions hoisted out of loops post regalloc"
-
-; rdar://11095580
-
-%struct.ref_s = type { %union.color_sample, i16, i16 }
-%union.color_sample = type { i64 }
-
-@table = external global [3891 x i64]
-
-declare i32 @foo()
-
-define i32 @zarray(%struct.ref_s* nocapture %op) nounwind ssp {
-entry:
- %call = tail call i32 @foo()
- %tmp = ashr i32 %call, 31
- %0 = and i32 %tmp, 1396
- %index9 = add i32 %0, 2397
- indirectbr i8* undef, [label %return, label %if.end]
-
-if.end: ; preds = %entry
- %size5 = getelementptr inbounds %struct.ref_s* %op, i64 0, i32 2
- %tmp6 = load i16* %size5, align 2
- %tobool1 = icmp eq i16 %tmp6, 0
- %1 = select i1 %tobool1, i32 1396, i32 -1910
- %index10 = add i32 %index9, %1
- indirectbr i8* undef, [label %return, label %while.body.lr.ph]
-
-while.body.lr.ph: ; preds = %if.end
- %refs = bitcast %struct.ref_s* %op to %struct.ref_s**
- %tmp9 = load %struct.ref_s** %refs, align 8
- %tmp4 = zext i16 %tmp6 to i64
- %index13 = add i32 %index10, 1658
- %2 = sext i32 %index13 to i64
- %3 = getelementptr [3891 x i64]* @table, i64 0, i64 %2
- %blockaddress14 = load i64* %3, align 8
- %4 = inttoptr i64 %blockaddress14 to i8*
- indirectbr i8* %4, [label %while.body]
-
-while.body: ; preds = %while.body, %while.body.lr.ph
- %index7 = phi i32 [ %index15, %while.body ], [ %index13, %while.body.lr.ph ]
- %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.lr.ph ]
- %type_attrs = getelementptr %struct.ref_s* %tmp9, i64 %indvar, i32 1
- store i16 32, i16* %type_attrs, align 2
- %indvar.next = add i64 %indvar, 1
- %exitcond5 = icmp eq i64 %indvar.next, %tmp4
- %tmp7 = select i1 %exitcond5, i32 1648, i32 0
- %index15 = add i32 %index7, %tmp7
- %tmp8 = select i1 %exitcond5, i64 13, i64 0
- %5 = sext i32 %index15 to i64
- %6 = getelementptr [3891 x i64]* @table, i64 0, i64 %5
- %blockaddress16 = load i64* %6, align 8
- %7 = inttoptr i64 %blockaddress16 to i8*
- indirectbr i8* %7, [label %return, label %while.body]
-
-return: ; preds = %while.body, %if.end, %entry
- %retval.0 = phi i32 [ %call, %entry ], [ 0, %if.end ], [ 0, %while.body ]
- ret i32 %retval.0
-}
+++ /dev/null
-; RUN: llc < %s -mtriple=x86_64-appel-darwin -disable-cgp-branch-opts -stats 2>&1 | grep "machine-sink"
-
-define fastcc void @t() nounwind ssp {
-entry:
- br i1 undef, label %bb, label %bb4
-
-bb: ; preds = %entry
- br i1 undef, label %return, label %bb3
-
-bb3: ; preds = %bb
- unreachable
-
-bb4: ; preds = %entry
- br i1 undef, label %bb.nph, label %return
-
-bb.nph: ; preds = %bb4
- br label %bb5
-
-bb5: ; preds = %bb9, %bb.nph
- %indvar = phi i64 [ 0, %bb.nph ], [ %tmp12, %bb9 ] ; <i64> [#uses=1]
- %tmp12 = add i64 %indvar, 1 ; <i64> [#uses=2]
- %tmp13 = trunc i64 %tmp12 to i32 ; <i32> [#uses=0]
- br i1 undef, label %bb9, label %bb6
-
-bb6: ; preds = %bb5
- br i1 undef, label %bb9, label %bb7
-
-bb7: ; preds = %bb6
- br i1 undef, label %bb9, label %bb8
-
-bb8: ; preds = %bb7
- unreachable
-
-bb9: ; preds = %bb7, %bb6, %bb5
- br i1 undef, label %bb5, label %return
-
-return: ; preds = %bb9, %bb4, %bb
- ret void
-}
+++ /dev/null
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux -regalloc=greedy | FileCheck %s
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
-; CHECK: LCPI
-; CHECK: LCPI
-; CHECK: LCPI
-; CHECK-NOT: LCPI
-
-; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X64stat
-; X64stat: 6 asm-printer
-
-; RUN: llc < %s -march=x86 -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
-; X32stat: 12 asm-printer
-
-declare float @qux(float %y)
-
-define float @array(float %a) nounwind {
- %n = fmul float %a, 9.0
- %m = call float @qux(float %n)
- %o = fmul float %m, 9.0
- ret float %o
-}
+++ /dev/null
-; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
-; RUN: llc < %s -mtriple=x86_64-win32 -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
-; STATS: 9 asm-printer
-
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
-; CHECK: leal 1({{%rsi|%rdx}}),
-
-define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2, i8* %ptr) nounwind optsize {
-entry:
- %0 = add i32 %i2, 1 ; <i32> [#uses=1]
- %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
- %2 = getelementptr i8* %ptr, i64 %1 ; <i8*> [#uses=1]
- %3 = load i8* %2, align 1 ; <i8> [#uses=1]
- %4 = icmp eq i8 0, %3 ; <i1> [#uses=1]
- br i1 %4, label %bb3, label %bb34
-
-bb3: ; preds = %entry
- %5 = add i32 %i2, 4 ; <i32> [#uses=0]
- %6 = trunc i32 %5 to i8
- ret i8 %6
-
-bb34: ; preds = %entry
- ret i8 0
-}
-
+++ /dev/null
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats 2>&1 | grep asm-printer | grep 14
-
-define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind {
-entry:
- %tmp7 = mul i32 %idxY, %ref_frame_stride ; <i32> [#uses=2]
- %tmp9 = add i32 %tmp7, %idxX ; <i32> [#uses=1]
- %tmp11 = getelementptr i8* %ref_frame_ptr, i32 %tmp9 ; <i8*> [#uses=1]
- %tmp1112 = bitcast i8* %tmp11 to i32* ; <i32*> [#uses=1]
- %tmp13 = load i32* %tmp1112, align 4 ; <i32> [#uses=1]
- %tmp18 = add i32 %idxX, 4 ; <i32> [#uses=1]
- %tmp20.sum = add i32 %tmp18, %tmp7 ; <i32> [#uses=1]
- %tmp21 = getelementptr i8* %ref_frame_ptr, i32 %tmp20.sum ; <i8*> [#uses=1]
- %tmp2122 = bitcast i8* %tmp21 to i16* ; <i16*> [#uses=1]
- %tmp23 = load i16* %tmp2122, align 2 ; <i16> [#uses=1]
- %tmp2425 = zext i16 %tmp23 to i64 ; <i64> [#uses=1]
- %tmp26 = shl i64 %tmp2425, 32 ; <i64> [#uses=1]
- %tmp2728 = zext i32 %tmp13 to i64 ; <i64> [#uses=1]
- %tmp29 = or i64 %tmp26, %tmp2728 ; <i64> [#uses=1]
- %tmp3454 = bitcast i64 %tmp29 to double ; <double> [#uses=1]
- %tmp35 = insertelement <2 x double> undef, double %tmp3454, i32 0 ; <<2 x double>> [#uses=1]
- %tmp36 = insertelement <2 x double> %tmp35, double 0.000000e+00, i32 1 ; <<2 x double>> [#uses=1]
- %tmp42 = bitcast <2 x double> %tmp36 to <8 x i16> ; <<8 x i16>> [#uses=1]
- %tmp43 = shufflevector <8 x i16> %tmp42, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 1, i32 2, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
- %tmp47 = bitcast <8 x i16> %tmp43 to <4 x i32> ; <<4 x i32>> [#uses=1]
- %tmp48 = extractelement <4 x i32> %tmp47, i32 0 ; <i32> [#uses=1]
- ret i32 %tmp48
-}
+++ /dev/null
-; RUN: llc < %s -stats -O2 2>&1 | grep "1 machine-licm"
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-apple-macosx10.7.2"
-
-@"\01L_OBJC_METH_VAR_NAME_" = internal global [4 x i8] c"foo\00", section "__TEXT,__objc_methname,cstring_literals", align 1
-@"\01L_OBJC_SELECTOR_REFERENCES_" = internal global i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i64 0, i64 0), section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip"
-@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] [i32 0, i32 16], section "__DATA, __objc_imageinfo, regular, no_dead_strip"
-@llvm.used = appending global [3 x i8*] [i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_" to i8*), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*)], section "llvm.metadata"
-
-define void @test(i8* %x) uwtable ssp {
-entry:
- br label %for.body
-
-for.body: ; preds = %for.body, %entry
- %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
- %0 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_", align 8, !invariant.load !0
- %call = tail call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %x, i8* %0)
- %inc = add i32 %i.01, 1
- %exitcond = icmp eq i32 %inc, 10000
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end: ; preds = %for.body
- ret void
-}
-
-declare i8* @objc_msgSend(i8*, i8*, ...) nonlazybind
-
-!0 = metadata !{}
+++ /dev/null
-; RUN: llc -mtriple=x86_64-apple-darwin -march=x86-64 < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 3
-
-; MachineLICM should be able to hoist the symbolic addresses out of
-; the inner loops.
-
-@main.flags = internal global [8193 x i8] zeroinitializer, align 16 ; <[8193 x i8]*> [#uses=3]
-@.str = private constant [11 x i8] c"Count: %d\0A\00" ; <[11 x i8]*> [#uses=1]
-
-define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp {
-entry:
- %cmp = icmp eq i32 %argc, 2 ; <i1> [#uses=1]
- br i1 %cmp, label %while.cond.preheader, label %bb.nph53
-
-while.cond.preheader: ; preds = %entry
- %arrayidx = getelementptr inbounds i8** %argv, i64 1 ; <i8**> [#uses=1]
- %tmp2 = load i8** %arrayidx ; <i8*> [#uses=1]
- %call = tail call i32 @atoi(i8* %tmp2) nounwind ; <i32> [#uses=2]
- %tobool51 = icmp eq i32 %call, 0 ; <i1> [#uses=1]
- br i1 %tobool51, label %while.end, label %bb.nph53
-
-while.cond.loopexit: ; preds = %for.inc35
- %indvar.next77 = add i32 %indvar76, 1 ; <i32> [#uses=2]
- %exitcond78 = icmp eq i32 %indvar.next77, %NUM.0.ph80 ; <i1> [#uses=1]
- br i1 %exitcond78, label %while.end, label %bb.nph
-
-bb.nph53: ; preds = %entry, %while.cond.preheader
- %NUM.0.ph80 = phi i32 [ %call, %while.cond.preheader ], [ 17000, %entry ] ; <i32> [#uses=1]
- br label %bb.nph
-
-bb.nph: ; preds = %while.cond.loopexit, %bb.nph53
- %indvar76 = phi i32 [ 0, %bb.nph53 ], [ %indvar.next77, %while.cond.loopexit ] ; <i32> [#uses=1]
- br label %for.body
-
-for.body: ; preds = %for.body, %bb.nph
- %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] ; <i64> [#uses=2]
- %tmp = add i64 %indvar, 2 ; <i64> [#uses=1]
- %arrayidx10 = getelementptr [8193 x i8]* @main.flags, i64 0, i64 %tmp ; <i8*> [#uses=1]
- store i8 1, i8* %arrayidx10
- %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
- %exitcond = icmp eq i64 %indvar.next, 8191 ; <i1> [#uses=1]
- br i1 %exitcond, label %for.body15, label %for.body
-
-for.body15: ; preds = %for.body, %for.inc35
- %indvar57 = phi i64 [ %indvar.next58, %for.inc35 ], [ 0, %for.body ] ; <i64> [#uses=4]
- %count.248 = phi i32 [ %count.1, %for.inc35 ], [ 0, %for.body ] ; <i32> [#uses=2]
- %tmp68 = add i64 %indvar57, 2 ; <i64> [#uses=2]
- %tmp70 = mul i64 %indvar57, 3 ; <i64> [#uses=1]
- %tmp71 = add i64 %tmp70, 6 ; <i64> [#uses=1]
- %tmp73 = shl i64 %indvar57, 1 ; <i64> [#uses=1]
- %add = add i64 %tmp73, 4 ; <i64> [#uses=2]
- %arrayidx17 = getelementptr [8193 x i8]* @main.flags, i64 0, i64 %tmp68 ; <i8*> [#uses=1]
- %tmp18 = load i8* %arrayidx17 ; <i8> [#uses=1]
- %tobool19 = icmp eq i8 %tmp18, 0 ; <i1> [#uses=1]
- br i1 %tobool19, label %for.inc35, label %if.then
-
-if.then: ; preds = %for.body15
- %cmp2443 = icmp slt i64 %add, 8193 ; <i1> [#uses=1]
- br i1 %cmp2443, label %for.body25, label %for.end32
-
-for.body25: ; preds = %if.then, %for.body25
- %indvar55 = phi i64 [ %indvar.next56, %for.body25 ], [ 0, %if.then ] ; <i64> [#uses=2]
- %tmp60 = mul i64 %tmp68, %indvar55 ; <i64> [#uses=2]
- %tmp75 = add i64 %add, %tmp60 ; <i64> [#uses=1]
- %arrayidx27 = getelementptr [8193 x i8]* @main.flags, i64 0, i64 %tmp75 ; <i8*> [#uses=1]
- store i8 0, i8* %arrayidx27
- %add31 = add i64 %tmp71, %tmp60 ; <i64> [#uses=1]
- %cmp24 = icmp slt i64 %add31, 8193 ; <i1> [#uses=1]
- %indvar.next56 = add i64 %indvar55, 1 ; <i64> [#uses=1]
- br i1 %cmp24, label %for.body25, label %for.end32
-
-for.end32: ; preds = %for.body25, %if.then
- %inc34 = add nsw i32 %count.248, 1 ; <i32> [#uses=1]
- br label %for.inc35
-
-for.inc35: ; preds = %for.body15, %for.end32
- %count.1 = phi i32 [ %inc34, %for.end32 ], [ %count.248, %for.body15 ] ; <i32> [#uses=2]
- %indvar.next58 = add i64 %indvar57, 1 ; <i64> [#uses=2]
- %exitcond67 = icmp eq i64 %indvar.next58, 8191 ; <i1> [#uses=1]
- br i1 %exitcond67, label %while.cond.loopexit, label %for.body15
-
-while.end: ; preds = %while.cond.loopexit, %while.cond.preheader
- %count.0.lcssa = phi i32 [ 0, %while.cond.preheader ], [ %count.1, %while.cond.loopexit ] ; <i32> [#uses=1]
- %call40 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i64 0, i64 0), i32 %count.0.lcssa) nounwind ; <i32> [#uses=0]
- ret i32 0
-}
-
-declare i32 @atoi(i8* nocapture) nounwind readonly
-
-declare i32 @printf(i8* nocapture, ...) nounwind
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-targets = set(config.root.targets_to_build.split())
-if not 'X86' in targets:
- config.unsupported = True
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-; RUN: llc < %s -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 6
-; PR1296
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "i686-apple-darwin8"
-
-define i32 @foo(i32 %A, i32 %B, i32 %C) nounwind {
-entry:
- switch i32 %A, label %out [
- i32 1, label %bb
- i32 0, label %bb13
- i32 2, label %bb35
- ]
-
-bb: ; preds = %cond_next, %entry
- %i.144.1 = phi i32 [ 0, %entry ], [ %tmp7, %cond_next ] ; <i32> [#uses=2]
- %tmp4 = and i32 %i.144.1, %B ; <i32> [#uses=1]
- icmp eq i32 %tmp4, 0 ; <i1>:0 [#uses=1]
- br i1 %0, label %cond_next, label %out
-
-cond_next: ; preds = %bb
- %tmp7 = add i32 %i.144.1, 1 ; <i32> [#uses=2]
- icmp slt i32 %tmp7, 1000 ; <i1>:1 [#uses=1]
- br i1 %1, label %bb, label %out
-
-bb13: ; preds = %cond_next18, %entry
- %i.248.1 = phi i32 [ 0, %entry ], [ %tmp20, %cond_next18 ] ; <i32> [#uses=2]
- %tmp16 = and i32 %i.248.1, %C ; <i32> [#uses=1]
- icmp eq i32 %tmp16, 0 ; <i1>:2 [#uses=1]
- br i1 %2, label %cond_next18, label %out
-
-cond_next18: ; preds = %bb13
- %tmp20 = add i32 %i.248.1, 1 ; <i32> [#uses=2]
- icmp slt i32 %tmp20, 1000 ; <i1>:3 [#uses=1]
- br i1 %3, label %bb13, label %out
-
-bb27: ; preds = %bb35
- %tmp30 = and i32 %i.3, %C ; <i32> [#uses=1]
- icmp eq i32 %tmp30, 0 ; <i1>:4 [#uses=1]
- br i1 %4, label %cond_next32, label %out
-
-cond_next32: ; preds = %bb27
- %indvar.next = add i32 %i.3, 1 ; <i32> [#uses=1]
- br label %bb35
-
-bb35: ; preds = %entry, %cond_next32
- %i.3 = phi i32 [ %indvar.next, %cond_next32 ], [ 0, %entry ] ; <i32> [#uses=3]
- icmp slt i32 %i.3, 1000 ; <i1>:5 [#uses=1]
- br i1 %5, label %bb27, label %out
-
-out: ; preds = %bb27, %bb35, %bb13, %cond_next18, %bb, %cond_next, %entry
- %result.0 = phi i32 [ 0, %entry ], [ 1, %bb ], [ 0, %cond_next ], [ 1, %bb13 ], [ 0, %cond_next18 ], [ 1, %bb27 ], [ 0, %bb35 ] ; <i32> [#uses=1]
- ret i32 %result.0
-}
+++ /dev/null
-; RUN: llc < %s -march=x86 -stats 2>&1 | not grep "instructions sunk"
-; PR3522
-
-target triple = "i386-pc-linux-gnu"
-@.str = external constant [13 x i8] ; <[13 x i8]*> [#uses=1]
-
-define void @_ada_c34018a() {
-entry:
- %0 = tail call i32 @report__ident_int(i32 90) ; <i32> [#uses=1]
- %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
- invoke void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 32) noreturn
- to label %invcont unwind label %lpad
-
-invcont: ; preds = %entry
- unreachable
-
-bb22: ; preds = %lpad
- ret void
-
-return: ; preds = %lpad
- ret void
-
-lpad: ; preds = %entry
- %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0
- cleanup
- %2 = icmp eq i8 %1, 90 ; <i1> [#uses=1]
- br i1 %2, label %return, label %bb22
-}
-
-declare void @__gnat_rcheck_12(i8*, i32) noreturn
-
-declare i32 @report__ident_int(i32)
-
-declare i32 @__gxx_personality_v0(...)
+++ /dev/null
-;; Both functions in this testcase should codegen to the same function, and
-;; neither of them should require spilling anything to the stack.
-
-; RUN: llc < %s -march=x86 -stats 2>&1 | \
-; RUN: not grep "Number of register spills"
-
-;; This can be compiled to use three registers if the loads are not
-;; folded into the multiplies, 2 registers otherwise.
-
-define i32 @regpressure1(i32* %P) {
- %A = load i32* %P ; <i32> [#uses=1]
- %Bp = getelementptr i32* %P, i32 1 ; <i32*> [#uses=1]
- %B = load i32* %Bp ; <i32> [#uses=1]
- %s1 = mul i32 %A, %B ; <i32> [#uses=1]
- %Cp = getelementptr i32* %P, i32 2 ; <i32*> [#uses=1]
- %C = load i32* %Cp ; <i32> [#uses=1]
- %s2 = mul i32 %s1, %C ; <i32> [#uses=1]
- %Dp = getelementptr i32* %P, i32 3 ; <i32*> [#uses=1]
- %D = load i32* %Dp ; <i32> [#uses=1]
- %s3 = mul i32 %s2, %D ; <i32> [#uses=1]
- %Ep = getelementptr i32* %P, i32 4 ; <i32*> [#uses=1]
- %E = load i32* %Ep ; <i32> [#uses=1]
- %s4 = mul i32 %s3, %E ; <i32> [#uses=1]
- %Fp = getelementptr i32* %P, i32 5 ; <i32*> [#uses=1]
- %F = load i32* %Fp ; <i32> [#uses=1]
- %s5 = mul i32 %s4, %F ; <i32> [#uses=1]
- %Gp = getelementptr i32* %P, i32 6 ; <i32*> [#uses=1]
- %G = load i32* %Gp ; <i32> [#uses=1]
- %s6 = mul i32 %s5, %G ; <i32> [#uses=1]
- %Hp = getelementptr i32* %P, i32 7 ; <i32*> [#uses=1]
- %H = load i32* %Hp ; <i32> [#uses=1]
- %s7 = mul i32 %s6, %H ; <i32> [#uses=1]
- %Ip = getelementptr i32* %P, i32 8 ; <i32*> [#uses=1]
- %I = load i32* %Ip ; <i32> [#uses=1]
- %s8 = mul i32 %s7, %I ; <i32> [#uses=1]
- %Jp = getelementptr i32* %P, i32 9 ; <i32*> [#uses=1]
- %J = load i32* %Jp ; <i32> [#uses=1]
- %s9 = mul i32 %s8, %J ; <i32> [#uses=1]
- ret i32 %s9
-}
-
-define i32 @regpressure2(i32* %P) {
- %A = load i32* %P ; <i32> [#uses=1]
- %Bp = getelementptr i32* %P, i32 1 ; <i32*> [#uses=1]
- %B = load i32* %Bp ; <i32> [#uses=1]
- %Cp = getelementptr i32* %P, i32 2 ; <i32*> [#uses=1]
- %C = load i32* %Cp ; <i32> [#uses=1]
- %Dp = getelementptr i32* %P, i32 3 ; <i32*> [#uses=1]
- %D = load i32* %Dp ; <i32> [#uses=1]
- %Ep = getelementptr i32* %P, i32 4 ; <i32*> [#uses=1]
- %E = load i32* %Ep ; <i32> [#uses=1]
- %Fp = getelementptr i32* %P, i32 5 ; <i32*> [#uses=1]
- %F = load i32* %Fp ; <i32> [#uses=1]
- %Gp = getelementptr i32* %P, i32 6 ; <i32*> [#uses=1]
- %G = load i32* %Gp ; <i32> [#uses=1]
- %Hp = getelementptr i32* %P, i32 7 ; <i32*> [#uses=1]
- %H = load i32* %Hp ; <i32> [#uses=1]
- %Ip = getelementptr i32* %P, i32 8 ; <i32*> [#uses=1]
- %I = load i32* %Ip ; <i32> [#uses=1]
- %Jp = getelementptr i32* %P, i32 9 ; <i32*> [#uses=1]
- %J = load i32* %Jp ; <i32> [#uses=1]
- %s1 = mul i32 %A, %B ; <i32> [#uses=1]
- %s2 = mul i32 %s1, %C ; <i32> [#uses=1]
- %s3 = mul i32 %s2, %D ; <i32> [#uses=1]
- %s4 = mul i32 %s3, %E ; <i32> [#uses=1]
- %s5 = mul i32 %s4, %F ; <i32> [#uses=1]
- %s6 = mul i32 %s5, %G ; <i32> [#uses=1]
- %s7 = mul i32 %s6, %H ; <i32> [#uses=1]
- %s8 = mul i32 %s7, %I ; <i32> [#uses=1]
- %s9 = mul i32 %s8, %J ; <i32> [#uses=1]
- ret i32 %s9
-}
-
-define i32 @regpressure3(i16* %P, i1 %Cond, i32* %Other) {
- %A = load i16* %P ; <i16> [#uses=1]
- %Bp = getelementptr i16* %P, i32 1 ; <i16*> [#uses=1]
- %B = load i16* %Bp ; <i16> [#uses=1]
- %Cp = getelementptr i16* %P, i32 2 ; <i16*> [#uses=1]
- %C = load i16* %Cp ; <i16> [#uses=1]
- %Dp = getelementptr i16* %P, i32 3 ; <i16*> [#uses=1]
- %D = load i16* %Dp ; <i16> [#uses=1]
- %Ep = getelementptr i16* %P, i32 4 ; <i16*> [#uses=1]
- %E = load i16* %Ep ; <i16> [#uses=1]
- %Fp = getelementptr i16* %P, i32 5 ; <i16*> [#uses=1]
- %F = load i16* %Fp ; <i16> [#uses=1]
- %Gp = getelementptr i16* %P, i32 6 ; <i16*> [#uses=1]
- %G = load i16* %Gp ; <i16> [#uses=1]
- %Hp = getelementptr i16* %P, i32 7 ; <i16*> [#uses=1]
- %H = load i16* %Hp ; <i16> [#uses=1]
- %Ip = getelementptr i16* %P, i32 8 ; <i16*> [#uses=1]
- %I = load i16* %Ip ; <i16> [#uses=1]
- %Jp = getelementptr i16* %P, i32 9 ; <i16*> [#uses=1]
- %J = load i16* %Jp ; <i16> [#uses=1]
- %A.upgrd.1 = sext i16 %A to i32 ; <i32> [#uses=1]
- %B.upgrd.2 = sext i16 %B to i32 ; <i32> [#uses=1]
- %D.upgrd.3 = sext i16 %D to i32 ; <i32> [#uses=1]
- %C.upgrd.4 = sext i16 %C to i32 ; <i32> [#uses=1]
- %E.upgrd.5 = sext i16 %E to i32 ; <i32> [#uses=1]
- %F.upgrd.6 = sext i16 %F to i32 ; <i32> [#uses=1]
- %G.upgrd.7 = sext i16 %G to i32 ; <i32> [#uses=1]
- %H.upgrd.8 = sext i16 %H to i32 ; <i32> [#uses=1]
- %I.upgrd.9 = sext i16 %I to i32 ; <i32> [#uses=1]
- %J.upgrd.10 = sext i16 %J to i32 ; <i32> [#uses=1]
- %s1 = add i32 %A.upgrd.1, %B.upgrd.2 ; <i32> [#uses=1]
- %s2 = add i32 %C.upgrd.4, %s1 ; <i32> [#uses=1]
- %s3 = add i32 %D.upgrd.3, %s2 ; <i32> [#uses=1]
- %s4 = add i32 %E.upgrd.5, %s3 ; <i32> [#uses=1]
- %s5 = add i32 %F.upgrd.6, %s4 ; <i32> [#uses=1]
- %s6 = add i32 %G.upgrd.7, %s5 ; <i32> [#uses=1]
- %s7 = add i32 %H.upgrd.8, %s6 ; <i32> [#uses=1]
- %s8 = add i32 %I.upgrd.9, %s7 ; <i32> [#uses=1]
- %s9 = add i32 %J.upgrd.10, %s8 ; <i32> [#uses=1]
- ret i32 %s9
-}
+++ /dev/null
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
-; RUN: grep "twoaddrinstr" | grep "Number of instructions aggressively commuted"
-; rdar://6480363
-
-target triple = "i386-apple-darwin9.6"
-
-define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
-entry:
- %tmp.i3 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
- %tmp2.i = or <2 x i64> %tmp.i3, <i64 4607632778762754458, i64 4607632778762754458> ; <<2 x i64>> [#uses=1]
- %tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
- %tmp.i2 = fadd <2 x double> %tmp3.i, %A ; <<2 x double>> [#uses=1]
- %tmp.i = fadd <2 x double> %tmp.i2, %C ; <<2 x double>> [#uses=1]
- ret <2 x double> %tmp.i
-}
+++ /dev/null
-; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | grep "Number of 3-address instructions sunk"
-
-define void @t2(<2 x i64>* %vDct, <2 x i64>* %vYp, i8* %skiplist, <2 x i64> %a1) nounwind {
-entry:
- %tmp25 = bitcast <2 x i64> %a1 to <8 x i16> ; <<8 x i16>> [#uses=1]
- br label %bb
-bb: ; preds = %bb, %entry
- %skiplist_addr.0.rec = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
- %vYp_addr.0.rec = shl i32 %skiplist_addr.0.rec, 3 ; <i32> [#uses=3]
- %vDct_addr.0 = getelementptr <2 x i64>* %vDct, i32 %vYp_addr.0.rec ; <<2 x i64>*> [#uses=1]
- %vYp_addr.0 = getelementptr <2 x i64>* %vYp, i32 %vYp_addr.0.rec ; <<2 x i64>*> [#uses=1]
- %skiplist_addr.0 = getelementptr i8* %skiplist, i32 %skiplist_addr.0.rec ; <i8*> [#uses=1]
- %vDct_addr.0.sum43 = or i32 %vYp_addr.0.rec, 1 ; <i32> [#uses=1]
- %tmp7 = getelementptr <2 x i64>* %vDct, i32 %vDct_addr.0.sum43 ; <<2 x i64>*> [#uses=1]
- %tmp8 = load <2 x i64>* %tmp7, align 16 ; <<2 x i64>> [#uses=1]
- %tmp11 = load <2 x i64>* %vDct_addr.0, align 16 ; <<2 x i64>> [#uses=1]
- %tmp13 = bitcast <2 x i64> %tmp8 to <8 x i16> ; <<8 x i16>> [#uses=1]
- %tmp15 = bitcast <2 x i64> %tmp11 to <8 x i16> ; <<8 x i16>> [#uses=1]
- %tmp16 = shufflevector <8 x i16> %tmp15, <8 x i16> %tmp13, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
- %tmp26 = mul <8 x i16> %tmp25, %tmp16 ; <<8 x i16>> [#uses=1]
- %tmp27 = bitcast <8 x i16> %tmp26 to <2 x i64> ; <<2 x i64>> [#uses=1]
- store <2 x i64> %tmp27, <2 x i64>* %vYp_addr.0, align 16
- %tmp37 = load i8* %skiplist_addr.0, align 1 ; <i8> [#uses=1]
- %tmp38 = icmp eq i8 %tmp37, 0 ; <i1> [#uses=1]
- %indvar.next = add i32 %skiplist_addr.0.rec, 1 ; <i32> [#uses=1]
- br i1 %tmp38, label %return, label %bb
-return: ; preds = %bb
- ret void
-}
+++ /dev/null
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn | grep pslldq
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -mtriple=i686-apple-darwin9 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 6
-
-define <4 x float> @t3(<4 x float>* %P) nounwind {
- %tmp1 = load <4 x float>* %P
- %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
- ret <4 x float> %tmp2
-}
+++ /dev/null
-; RUN: llc < %s -o /dev/null -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
-; PR2485
-
-define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind {
-entry:
- %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> < i32 4, i32 0, i32 0, i32 0 > ; <<4 x i32>> [#uses=1]
- ret <4 x i32> %shuffle
-}
+++ /dev/null
-; RUN: llc < %s -o /dev/null -march=x86 -mcpu=corei7 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 2
-
-define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) nounwind {
-entry:
- shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:0 [#uses=1]
- ret <4 x float> %0
-}
+++ /dev/null
-; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llc < %s -march=x86-64 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12
-; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
-
-declare void @bar(double %x)
-declare void @barf(float %x)
-
-define double @foo() nounwind {
-
- call void @bar(double 0.0)
- ret double 0.0
-
-;CHECK-32: foo:
-;CHECK-32: call
-;CHECK-32: fldz
-;CHECK-32: ret
-
-;CHECK-64: foo:
-;CHECK-64: xorps
-;CHECK-64: call
-;CHECK-64: xorps
-;CHECK-64: ret
-}
-
-
-define float @foof() nounwind {
- call void @barf(float 0.0)
- ret float 0.0
-
-;CHECK-32: foof:
-;CHECK-32: call
-;CHECK-32: fldz
-;CHECK-32: ret
-
-;CHECK-64: foof:
-;CHECK-64: xorps
-;CHECK-64: call
-;CHECK-64: xorps
-;CHECK-64: ret
-}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux -regalloc=greedy | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; CHECK: LCPI
+; CHECK: LCPI
+; CHECK: LCPI
+; CHECK-NOT: LCPI
+
+; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X64stat
+; X64stat: 6 asm-printer
+
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
+; X32stat: 12 asm-printer
+
+declare float @qux(float %y)
+
+define float @array(float %a) nounwind {
+ %n = fmul float %a, 9.0
+ %m = call float @qux(float %n)
+ %o = fmul float %m, 9.0
+ ret float %o
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
+; RUN: llc < %s -mtriple=x86_64-win32 -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
+; STATS: 9 asm-printer
+
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; CHECK: leal 1({{%rsi|%rdx}}),
+
+define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2, i8* %ptr) nounwind optsize {
+entry:
+ %0 = add i32 %i2, 1 ; <i32> [#uses=1]
+ %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
+ %2 = getelementptr i8* %ptr, i64 %1 ; <i8*> [#uses=1]
+ %3 = load i8* %2, align 1 ; <i8> [#uses=1]
+ %4 = icmp eq i8 0, %3 ; <i1> [#uses=1]
+ br i1 %4, label %bb3, label %bb34
+
+bb3: ; preds = %entry
+ %5 = add i32 %i2, 4 ; <i32> [#uses=0]
+ %6 = trunc i32 %5 to i8
+ ret i8 %6
+
+bb34: ; preds = %entry
+ ret i8 0
+}
+
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats 2>&1 | grep asm-printer | grep 14
+
+define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind {
+entry:
+ %tmp7 = mul i32 %idxY, %ref_frame_stride ; <i32> [#uses=2]
+ %tmp9 = add i32 %tmp7, %idxX ; <i32> [#uses=1]
+ %tmp11 = getelementptr i8* %ref_frame_ptr, i32 %tmp9 ; <i8*> [#uses=1]
+ %tmp1112 = bitcast i8* %tmp11 to i32* ; <i32*> [#uses=1]
+ %tmp13 = load i32* %tmp1112, align 4 ; <i32> [#uses=1]
+ %tmp18 = add i32 %idxX, 4 ; <i32> [#uses=1]
+ %tmp20.sum = add i32 %tmp18, %tmp7 ; <i32> [#uses=1]
+ %tmp21 = getelementptr i8* %ref_frame_ptr, i32 %tmp20.sum ; <i8*> [#uses=1]
+ %tmp2122 = bitcast i8* %tmp21 to i16* ; <i16*> [#uses=1]
+ %tmp23 = load i16* %tmp2122, align 2 ; <i16> [#uses=1]
+ %tmp2425 = zext i16 %tmp23 to i64 ; <i64> [#uses=1]
+ %tmp26 = shl i64 %tmp2425, 32 ; <i64> [#uses=1]
+ %tmp2728 = zext i32 %tmp13 to i64 ; <i64> [#uses=1]
+ %tmp29 = or i64 %tmp26, %tmp2728 ; <i64> [#uses=1]
+ %tmp3454 = bitcast i64 %tmp29 to double ; <double> [#uses=1]
+ %tmp35 = insertelement <2 x double> undef, double %tmp3454, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp36 = insertelement <2 x double> %tmp35, double 0.000000e+00, i32 1 ; <<2 x double>> [#uses=1]
+ %tmp42 = bitcast <2 x double> %tmp36 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp43 = shufflevector <8 x i16> %tmp42, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 1, i32 2, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp47 = bitcast <8 x i16> %tmp43 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp48 = extractelement <4 x i32> %tmp47, i32 0 ; <i32> [#uses=1]
+ ret i32 %tmp48
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -stats -O2 2>&1 | grep "1 machine-licm"
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.7.2"
+
+@"\01L_OBJC_METH_VAR_NAME_" = internal global [4 x i8] c"foo\00", section "__TEXT,__objc_methname,cstring_literals", align 1
+@"\01L_OBJC_SELECTOR_REFERENCES_" = internal global i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i64 0, i64 0), section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip"
+@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] [i32 0, i32 16], section "__DATA, __objc_imageinfo, regular, no_dead_strip"
+@llvm.used = appending global [3 x i8*] [i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_" to i8*), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*)], section "llvm.metadata"
+
+define void @test(i8* %x) uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %0 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_", align 8, !invariant.load !0
+ %call = tail call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %x, i8* %0)
+ %inc = add i32 %i.01, 1
+ %exitcond = icmp eq i32 %inc, 10000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+declare i8* @objc_msgSend(i8*, i8*, ...) nonlazybind
+
+!0 = metadata !{}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc -mtriple=x86_64-apple-darwin -march=x86-64 < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 3
+
+; MachineLICM should be able to hoist the symbolic addresses out of
+; the inner loops.
+
+@main.flags = internal global [8193 x i8] zeroinitializer, align 16 ; <[8193 x i8]*> [#uses=3]
+@.str = private constant [11 x i8] c"Count: %d\0A\00" ; <[11 x i8]*> [#uses=1]
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp {
+entry:
+ %cmp = icmp eq i32 %argc, 2 ; <i1> [#uses=1]
+ br i1 %cmp, label %while.cond.preheader, label %bb.nph53
+
+while.cond.preheader: ; preds = %entry
+ %arrayidx = getelementptr inbounds i8** %argv, i64 1 ; <i8**> [#uses=1]
+ %tmp2 = load i8** %arrayidx ; <i8*> [#uses=1]
+ %call = tail call i32 @atoi(i8* %tmp2) nounwind ; <i32> [#uses=2]
+ %tobool51 = icmp eq i32 %call, 0 ; <i1> [#uses=1]
+ br i1 %tobool51, label %while.end, label %bb.nph53
+
+while.cond.loopexit: ; preds = %for.inc35
+ %indvar.next77 = add i32 %indvar76, 1 ; <i32> [#uses=2]
+ %exitcond78 = icmp eq i32 %indvar.next77, %NUM.0.ph80 ; <i1> [#uses=1]
+ br i1 %exitcond78, label %while.end, label %bb.nph
+
+bb.nph53: ; preds = %entry, %while.cond.preheader
+ %NUM.0.ph80 = phi i32 [ %call, %while.cond.preheader ], [ 17000, %entry ] ; <i32> [#uses=1]
+ br label %bb.nph
+
+bb.nph: ; preds = %while.cond.loopexit, %bb.nph53
+ %indvar76 = phi i32 [ 0, %bb.nph53 ], [ %indvar.next77, %while.cond.loopexit ] ; <i32> [#uses=1]
+ br label %for.body
+
+for.body: ; preds = %for.body, %bb.nph
+ %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] ; <i64> [#uses=2]
+ %tmp = add i64 %indvar, 2 ; <i64> [#uses=1]
+ %arrayidx10 = getelementptr [8193 x i8]* @main.flags, i64 0, i64 %tmp ; <i8*> [#uses=1]
+ store i8 1, i8* %arrayidx10
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, 8191 ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.body15, label %for.body
+
+for.body15: ; preds = %for.body, %for.inc35
+ %indvar57 = phi i64 [ %indvar.next58, %for.inc35 ], [ 0, %for.body ] ; <i64> [#uses=4]
+ %count.248 = phi i32 [ %count.1, %for.inc35 ], [ 0, %for.body ] ; <i32> [#uses=2]
+ %tmp68 = add i64 %indvar57, 2 ; <i64> [#uses=2]
+ %tmp70 = mul i64 %indvar57, 3 ; <i64> [#uses=1]
+ %tmp71 = add i64 %tmp70, 6 ; <i64> [#uses=1]
+ %tmp73 = shl i64 %indvar57, 1 ; <i64> [#uses=1]
+ %add = add i64 %tmp73, 4 ; <i64> [#uses=2]
+ %arrayidx17 = getelementptr [8193 x i8]* @main.flags, i64 0, i64 %tmp68 ; <i8*> [#uses=1]
+ %tmp18 = load i8* %arrayidx17 ; <i8> [#uses=1]
+ %tobool19 = icmp eq i8 %tmp18, 0 ; <i1> [#uses=1]
+ br i1 %tobool19, label %for.inc35, label %if.then
+
+if.then: ; preds = %for.body15
+ %cmp2443 = icmp slt i64 %add, 8193 ; <i1> [#uses=1]
+ br i1 %cmp2443, label %for.body25, label %for.end32
+
+for.body25: ; preds = %if.then, %for.body25
+ %indvar55 = phi i64 [ %indvar.next56, %for.body25 ], [ 0, %if.then ] ; <i64> [#uses=2]
+ %tmp60 = mul i64 %tmp68, %indvar55 ; <i64> [#uses=2]
+ %tmp75 = add i64 %add, %tmp60 ; <i64> [#uses=1]
+ %arrayidx27 = getelementptr [8193 x i8]* @main.flags, i64 0, i64 %tmp75 ; <i8*> [#uses=1]
+ store i8 0, i8* %arrayidx27
+ %add31 = add i64 %tmp71, %tmp60 ; <i64> [#uses=1]
+ %cmp24 = icmp slt i64 %add31, 8193 ; <i1> [#uses=1]
+ %indvar.next56 = add i64 %indvar55, 1 ; <i64> [#uses=1]
+ br i1 %cmp24, label %for.body25, label %for.end32
+
+for.end32: ; preds = %for.body25, %if.then
+ %inc34 = add nsw i32 %count.248, 1 ; <i32> [#uses=1]
+ br label %for.inc35
+
+for.inc35: ; preds = %for.body15, %for.end32
+ %count.1 = phi i32 [ %inc34, %for.end32 ], [ %count.248, %for.body15 ] ; <i32> [#uses=2]
+ %indvar.next58 = add i64 %indvar57, 1 ; <i64> [#uses=2]
+ %exitcond67 = icmp eq i64 %indvar.next58, 8191 ; <i1> [#uses=1]
+ br i1 %exitcond67, label %while.cond.loopexit, label %for.body15
+
+while.end: ; preds = %while.cond.loopexit, %while.cond.preheader
+ %count.0.lcssa = phi i32 [ 0, %while.cond.preheader ], [ %count.1, %while.cond.loopexit ] ; <i32> [#uses=1]
+ %call40 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i64 0, i64 0), i32 %count.0.lcssa) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @atoi(i8* nocapture) nounwind readonly
+
+declare i32 @printf(i8* nocapture, ...) nounwind
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 6
+; PR1296
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @foo(i32 %A, i32 %B, i32 %C) nounwind {
+entry:
+ switch i32 %A, label %out [
+ i32 1, label %bb
+ i32 0, label %bb13
+ i32 2, label %bb35
+ ]
+
+bb: ; preds = %cond_next, %entry
+ %i.144.1 = phi i32 [ 0, %entry ], [ %tmp7, %cond_next ] ; <i32> [#uses=2]
+ %tmp4 = and i32 %i.144.1, %B ; <i32> [#uses=1]
+ icmp eq i32 %tmp4, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_next, label %out
+
+cond_next: ; preds = %bb
+ %tmp7 = add i32 %i.144.1, 1 ; <i32> [#uses=2]
+ icmp slt i32 %tmp7, 1000 ; <i1>:1 [#uses=1]
+ br i1 %1, label %bb, label %out
+
+bb13: ; preds = %cond_next18, %entry
+ %i.248.1 = phi i32 [ 0, %entry ], [ %tmp20, %cond_next18 ] ; <i32> [#uses=2]
+ %tmp16 = and i32 %i.248.1, %C ; <i32> [#uses=1]
+ icmp eq i32 %tmp16, 0 ; <i1>:2 [#uses=1]
+ br i1 %2, label %cond_next18, label %out
+
+cond_next18: ; preds = %bb13
+ %tmp20 = add i32 %i.248.1, 1 ; <i32> [#uses=2]
+ icmp slt i32 %tmp20, 1000 ; <i1>:3 [#uses=1]
+ br i1 %3, label %bb13, label %out
+
+bb27: ; preds = %bb35
+ %tmp30 = and i32 %i.3, %C ; <i32> [#uses=1]
+ icmp eq i32 %tmp30, 0 ; <i1>:4 [#uses=1]
+ br i1 %4, label %cond_next32, label %out
+
+cond_next32: ; preds = %bb27
+ %indvar.next = add i32 %i.3, 1 ; <i32> [#uses=1]
+ br label %bb35
+
+bb35: ; preds = %entry, %cond_next32
+ %i.3 = phi i32 [ %indvar.next, %cond_next32 ], [ 0, %entry ] ; <i32> [#uses=3]
+ icmp slt i32 %i.3, 1000 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb27, label %out
+
+out: ; preds = %bb27, %bb35, %bb13, %cond_next18, %bb, %cond_next, %entry
+ %result.0 = phi i32 [ 0, %entry ], [ 1, %bb ], [ 0, %cond_next ], [ 1, %bb13 ], [ 0, %cond_next18 ], [ 1, %bb27 ], [ 0, %bb35 ] ; <i32> [#uses=1]
+ ret i32 %result.0
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -stats 2>&1 | not grep "instructions sunk"
+; PR3522
+
+target triple = "i386-pc-linux-gnu"
+@.str = external constant [13 x i8] ; <[13 x i8]*> [#uses=1]
+
+define void @_ada_c34018a() {
+entry:
+ %0 = tail call i32 @report__ident_int(i32 90) ; <i32> [#uses=1]
+ %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
+ invoke void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 32) noreturn
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %entry
+ unreachable
+
+bb22: ; preds = %lpad
+ ret void
+
+return: ; preds = %lpad
+ ret void
+
+lpad: ; preds = %entry
+ %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0
+ cleanup
+ %2 = icmp eq i8 %1, 90 ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb22
+}
+
+declare void @__gnat_rcheck_12(i8*, i32) noreturn
+
+declare i32 @report__ident_int(i32)
+
+declare i32 @__gxx_personality_v0(...)
--- /dev/null
+; REQUIRES: asserts
+;; Both functions in this testcase should codegen to the same function, and
+;; neither of them should require spilling anything to the stack.
+
+; RUN: llc < %s -march=x86 -stats 2>&1 | \
+; RUN: not grep "Number of register spills"
+
+;; This can be compiled to use three registers if the loads are not
+;; folded into the multiplies, 2 registers otherwise.
+
+define i32 @regpressure1(i32* %P) {
+ %A = load i32* %P ; <i32> [#uses=1]
+ %Bp = getelementptr i32* %P, i32 1 ; <i32*> [#uses=1]
+ %B = load i32* %Bp ; <i32> [#uses=1]
+ %s1 = mul i32 %A, %B ; <i32> [#uses=1]
+ %Cp = getelementptr i32* %P, i32 2 ; <i32*> [#uses=1]
+ %C = load i32* %Cp ; <i32> [#uses=1]
+ %s2 = mul i32 %s1, %C ; <i32> [#uses=1]
+ %Dp = getelementptr i32* %P, i32 3 ; <i32*> [#uses=1]
+ %D = load i32* %Dp ; <i32> [#uses=1]
+ %s3 = mul i32 %s2, %D ; <i32> [#uses=1]
+ %Ep = getelementptr i32* %P, i32 4 ; <i32*> [#uses=1]
+ %E = load i32* %Ep ; <i32> [#uses=1]
+ %s4 = mul i32 %s3, %E ; <i32> [#uses=1]
+ %Fp = getelementptr i32* %P, i32 5 ; <i32*> [#uses=1]
+ %F = load i32* %Fp ; <i32> [#uses=1]
+ %s5 = mul i32 %s4, %F ; <i32> [#uses=1]
+ %Gp = getelementptr i32* %P, i32 6 ; <i32*> [#uses=1]
+ %G = load i32* %Gp ; <i32> [#uses=1]
+ %s6 = mul i32 %s5, %G ; <i32> [#uses=1]
+ %Hp = getelementptr i32* %P, i32 7 ; <i32*> [#uses=1]
+ %H = load i32* %Hp ; <i32> [#uses=1]
+ %s7 = mul i32 %s6, %H ; <i32> [#uses=1]
+ %Ip = getelementptr i32* %P, i32 8 ; <i32*> [#uses=1]
+ %I = load i32* %Ip ; <i32> [#uses=1]
+ %s8 = mul i32 %s7, %I ; <i32> [#uses=1]
+ %Jp = getelementptr i32* %P, i32 9 ; <i32*> [#uses=1]
+ %J = load i32* %Jp ; <i32> [#uses=1]
+ %s9 = mul i32 %s8, %J ; <i32> [#uses=1]
+ ret i32 %s9
+}
+
+define i32 @regpressure2(i32* %P) {
+ %A = load i32* %P ; <i32> [#uses=1]
+ %Bp = getelementptr i32* %P, i32 1 ; <i32*> [#uses=1]
+ %B = load i32* %Bp ; <i32> [#uses=1]
+ %Cp = getelementptr i32* %P, i32 2 ; <i32*> [#uses=1]
+ %C = load i32* %Cp ; <i32> [#uses=1]
+ %Dp = getelementptr i32* %P, i32 3 ; <i32*> [#uses=1]
+ %D = load i32* %Dp ; <i32> [#uses=1]
+ %Ep = getelementptr i32* %P, i32 4 ; <i32*> [#uses=1]
+ %E = load i32* %Ep ; <i32> [#uses=1]
+ %Fp = getelementptr i32* %P, i32 5 ; <i32*> [#uses=1]
+ %F = load i32* %Fp ; <i32> [#uses=1]
+ %Gp = getelementptr i32* %P, i32 6 ; <i32*> [#uses=1]
+ %G = load i32* %Gp ; <i32> [#uses=1]
+ %Hp = getelementptr i32* %P, i32 7 ; <i32*> [#uses=1]
+ %H = load i32* %Hp ; <i32> [#uses=1]
+ %Ip = getelementptr i32* %P, i32 8 ; <i32*> [#uses=1]
+ %I = load i32* %Ip ; <i32> [#uses=1]
+ %Jp = getelementptr i32* %P, i32 9 ; <i32*> [#uses=1]
+ %J = load i32* %Jp ; <i32> [#uses=1]
+ %s1 = mul i32 %A, %B ; <i32> [#uses=1]
+ %s2 = mul i32 %s1, %C ; <i32> [#uses=1]
+ %s3 = mul i32 %s2, %D ; <i32> [#uses=1]
+ %s4 = mul i32 %s3, %E ; <i32> [#uses=1]
+ %s5 = mul i32 %s4, %F ; <i32> [#uses=1]
+ %s6 = mul i32 %s5, %G ; <i32> [#uses=1]
+ %s7 = mul i32 %s6, %H ; <i32> [#uses=1]
+ %s8 = mul i32 %s7, %I ; <i32> [#uses=1]
+ %s9 = mul i32 %s8, %J ; <i32> [#uses=1]
+ ret i32 %s9
+}
+
+define i32 @regpressure3(i16* %P, i1 %Cond, i32* %Other) {
+ %A = load i16* %P ; <i16> [#uses=1]
+ %Bp = getelementptr i16* %P, i32 1 ; <i16*> [#uses=1]
+ %B = load i16* %Bp ; <i16> [#uses=1]
+ %Cp = getelementptr i16* %P, i32 2 ; <i16*> [#uses=1]
+ %C = load i16* %Cp ; <i16> [#uses=1]
+ %Dp = getelementptr i16* %P, i32 3 ; <i16*> [#uses=1]
+ %D = load i16* %Dp ; <i16> [#uses=1]
+ %Ep = getelementptr i16* %P, i32 4 ; <i16*> [#uses=1]
+ %E = load i16* %Ep ; <i16> [#uses=1]
+ %Fp = getelementptr i16* %P, i32 5 ; <i16*> [#uses=1]
+ %F = load i16* %Fp ; <i16> [#uses=1]
+ %Gp = getelementptr i16* %P, i32 6 ; <i16*> [#uses=1]
+ %G = load i16* %Gp ; <i16> [#uses=1]
+ %Hp = getelementptr i16* %P, i32 7 ; <i16*> [#uses=1]
+ %H = load i16* %Hp ; <i16> [#uses=1]
+ %Ip = getelementptr i16* %P, i32 8 ; <i16*> [#uses=1]
+ %I = load i16* %Ip ; <i16> [#uses=1]
+ %Jp = getelementptr i16* %P, i32 9 ; <i16*> [#uses=1]
+ %J = load i16* %Jp ; <i16> [#uses=1]
+ %A.upgrd.1 = sext i16 %A to i32 ; <i32> [#uses=1]
+ %B.upgrd.2 = sext i16 %B to i32 ; <i32> [#uses=1]
+ %D.upgrd.3 = sext i16 %D to i32 ; <i32> [#uses=1]
+ %C.upgrd.4 = sext i16 %C to i32 ; <i32> [#uses=1]
+ %E.upgrd.5 = sext i16 %E to i32 ; <i32> [#uses=1]
+ %F.upgrd.6 = sext i16 %F to i32 ; <i32> [#uses=1]
+ %G.upgrd.7 = sext i16 %G to i32 ; <i32> [#uses=1]
+ %H.upgrd.8 = sext i16 %H to i32 ; <i32> [#uses=1]
+ %I.upgrd.9 = sext i16 %I to i32 ; <i32> [#uses=1]
+ %J.upgrd.10 = sext i16 %J to i32 ; <i32> [#uses=1]
+ %s1 = add i32 %A.upgrd.1, %B.upgrd.2 ; <i32> [#uses=1]
+ %s2 = add i32 %C.upgrd.4, %s1 ; <i32> [#uses=1]
+ %s3 = add i32 %D.upgrd.3, %s2 ; <i32> [#uses=1]
+ %s4 = add i32 %E.upgrd.5, %s3 ; <i32> [#uses=1]
+ %s5 = add i32 %F.upgrd.6, %s4 ; <i32> [#uses=1]
+ %s6 = add i32 %G.upgrd.7, %s5 ; <i32> [#uses=1]
+ %s7 = add i32 %H.upgrd.8, %s6 ; <i32> [#uses=1]
+ %s8 = add i32 %I.upgrd.9, %s7 ; <i32> [#uses=1]
+ %s9 = add i32 %J.upgrd.10, %s8 ; <i32> [#uses=1]
+ ret i32 %s9
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
+; RUN: grep "twoaddrinstr" | grep "Number of instructions aggressively commuted"
+; rdar://6480363
+
+target triple = "i386-apple-darwin9.6"
+
+define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
+entry:
+ %tmp.i3 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp2.i = or <2 x i64> %tmp.i3, <i64 4607632778762754458, i64 4607632778762754458> ; <<2 x i64>> [#uses=1]
+ %tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
+ %tmp.i2 = fadd <2 x double> %tmp3.i, %A ; <<2 x double>> [#uses=1]
+ %tmp.i = fadd <2 x double> %tmp.i2, %C ; <<2 x double>> [#uses=1]
+ ret <2 x double> %tmp.i
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | grep "Number of 3-address instructions sunk"
+
+define void @t2(<2 x i64>* %vDct, <2 x i64>* %vYp, i8* %skiplist, <2 x i64> %a1) nounwind {
+entry:
+ %tmp25 = bitcast <2 x i64> %a1 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ br label %bb
+bb: ; preds = %bb, %entry
+ %skiplist_addr.0.rec = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %vYp_addr.0.rec = shl i32 %skiplist_addr.0.rec, 3 ; <i32> [#uses=3]
+ %vDct_addr.0 = getelementptr <2 x i64>* %vDct, i32 %vYp_addr.0.rec ; <<2 x i64>*> [#uses=1]
+ %vYp_addr.0 = getelementptr <2 x i64>* %vYp, i32 %vYp_addr.0.rec ; <<2 x i64>*> [#uses=1]
+ %skiplist_addr.0 = getelementptr i8* %skiplist, i32 %skiplist_addr.0.rec ; <i8*> [#uses=1]
+ %vDct_addr.0.sum43 = or i32 %vYp_addr.0.rec, 1 ; <i32> [#uses=1]
+ %tmp7 = getelementptr <2 x i64>* %vDct, i32 %vDct_addr.0.sum43 ; <<2 x i64>*> [#uses=1]
+ %tmp8 = load <2 x i64>* %tmp7, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp11 = load <2 x i64>* %vDct_addr.0, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp13 = bitcast <2 x i64> %tmp8 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp15 = bitcast <2 x i64> %tmp11 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp16 = shufflevector <8 x i16> %tmp15, <8 x i16> %tmp13, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
+ %tmp26 = mul <8 x i16> %tmp25, %tmp16 ; <<8 x i16>> [#uses=1]
+ %tmp27 = bitcast <8 x i16> %tmp26 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ store <2 x i64> %tmp27, <2 x i64>* %vYp_addr.0, align 16
+ %tmp37 = load i8* %skiplist_addr.0, align 1 ; <i8> [#uses=1]
+ %tmp38 = icmp eq i8 %tmp37, 0 ; <i1> [#uses=1]
+ %indvar.next = add i32 %skiplist_addr.0.rec, 1 ; <i32> [#uses=1]
+ br i1 %tmp38, label %return, label %bb
+return: ; preds = %bb
+ ret void
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn | grep pslldq
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -mtriple=i686-apple-darwin9 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 6
+
+define <4 x float> @t3(<4 x float>* %P) nounwind {
+ %tmp1 = load <4 x float>* %P
+ %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
+ ret <4 x float> %tmp2
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -o /dev/null -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
+; PR2485
+
+define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind {
+entry:
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> < i32 4, i32 0, i32 0, i32 0 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %shuffle
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -o /dev/null -march=x86 -mcpu=corei7 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 2
+
+define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) nounwind {
+entry:
+ shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:0 [#uses=1]
+ ret <4 x float> %0
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86-64 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12
+; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
+
+declare void @bar(double %x)
+declare void @barf(float %x)
+
+define double @foo() nounwind {
+
+ call void @bar(double 0.0)
+ ret double 0.0
+
+;CHECK-32: foo:
+;CHECK-32: call
+;CHECK-32: fldz
+;CHECK-32: ret
+
+;CHECK-64: foo:
+;CHECK-64: xorps
+;CHECK-64: call
+;CHECK-64: xorps
+;CHECK-64: ret
+}
+
+
+define float @foof() nounwind {
+ call void @barf(float 0.0)
+ ret float 0.0
+
+;CHECK-32: foof:
+;CHECK-32: call
+;CHECK-32: fldz
+;CHECK-32: ret
+
+;CHECK-64: foof:
+;CHECK-64: xorps
+;CHECK-64: call
+;CHECK-64: xorps
+;CHECK-64: ret
+}
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-; RUN: opt < %s -basicaa -gvn -stats -disable-output 2>&1 | grep "Number of loads deleted"
-; rdar://7363102
-
-; GVN should be able to eliminate load %tmp22.i, because it is redundant with
-; load %tmp8.i. This requires being able to prove that %tmp7.i doesn't
-; alias the malloc'd value %tmp.i20.i.i, which it can do since %tmp7.i
-; is derived from %tmp5.i which is computed from a load, and %tmp.i20.i.i
-; is never stored and does not escape.
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-target triple = "x86_64-apple-darwin10.0"
-
-%"struct.llvm::MallocAllocator" = type <{ i8 }>
-%"struct.llvm::StringMap<void*,llvm::MallocAllocator>" = type { %"struct.llvm::StringMapImpl", %"struct.llvm::MallocAllocator" }
-%"struct.llvm::StringMapEntry<void*>" = type { %"struct.llvm::StringMapEntryBase", i8* }
-%"struct.llvm::StringMapEntryBase" = type { i32 }
-%"struct.llvm::StringMapImpl" = type { %"struct.llvm::StringMapImpl::ItemBucket"*, i32, i32, i32, i32 }
-%"struct.llvm::StringMapImpl::ItemBucket" = type { i32, %"struct.llvm::StringMapEntryBase"* }
-%"struct.llvm::StringRef" = type { i8*, i64 }
-
-define %"struct.llvm::StringMapEntry<void*>"* @_Z3fooRN4llvm9StringMapIPvNS_15MallocAllocatorEEEPKc(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, i8* %P) ssp {
-entry:
- %tmp = alloca %"struct.llvm::StringRef", align 8
- %tmp.i = getelementptr inbounds %"struct.llvm::StringRef"* %tmp, i64 0, i32 0
- store i8* %P, i8** %tmp.i, align 8
- %tmp1.i = call i64 @strlen(i8* %P) nounwind readonly
- %tmp2.i = getelementptr inbounds %"struct.llvm::StringRef"* %tmp, i64 0, i32 1
- store i64 %tmp1.i, i64* %tmp2.i, align 8
- %tmp1 = call %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, %"struct.llvm::StringRef"* %tmp) ssp
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp1
-}
-
-declare i64 @strlen(i8* nocapture) nounwind readonly
-
-declare noalias i8* @malloc(i64) nounwind
-
-declare i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"*, i64, i64)
-
-define linkonce_odr %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, %"struct.llvm::StringRef"* nocapture %Key) ssp align 2 {
-entry:
- %elt = bitcast %"struct.llvm::StringRef"* %Key to i64*
- %val = load i64* %elt
- %tmp = getelementptr inbounds %"struct.llvm::StringRef"* %Key, i64 0, i32 1
- %val2 = load i64* %tmp
- %tmp2.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0
- %tmp3.i = tail call i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"* %tmp2.i, i64 %val, i64 %val2)
- %tmp4.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 0
- %tmp5.i = load %"struct.llvm::StringMapImpl::ItemBucket"** %tmp4.i, align 8
- %tmp6.i = zext i32 %tmp3.i to i64
- %tmp7.i = getelementptr inbounds %"struct.llvm::StringMapImpl::ItemBucket"* %tmp5.i, i64 %tmp6.i, i32 1
- %tmp8.i = load %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8
- %tmp9.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, null
- %tmp13.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*)
- %or.cond.i = or i1 %tmp9.i, %tmp13.i
- br i1 %or.cond.i, label %bb4.i, label %bb6.i
-
-bb4.i: ; preds = %entry
- %tmp41.i = inttoptr i64 %val to i8*
- %tmp4.i35.i = getelementptr inbounds i8* %tmp41.i, i64 %val2
- %tmp.i.i = ptrtoint i8* %tmp4.i35.i to i64
- %tmp1.i.i = trunc i64 %tmp.i.i to i32
- %tmp3.i.i = trunc i64 %val to i32
- %tmp4.i.i = sub i32 %tmp1.i.i, %tmp3.i.i
- %tmp5.i.i = add i32 %tmp4.i.i, 17
- %tmp8.i.i = zext i32 %tmp5.i.i to i64
- %tmp.i20.i.i = tail call noalias i8* @malloc(i64 %tmp8.i.i) nounwind
- %tmp10.i.i = bitcast i8* %tmp.i20.i.i to %"struct.llvm::StringMapEntry<void*>"*
- %tmp12.i.i = icmp eq i8* %tmp.i20.i.i, null
- br i1 %tmp12.i.i, label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i, label %bb.i.i
-
-bb.i.i: ; preds = %bb4.i
- %tmp.i.i.i.i = bitcast i8* %tmp.i20.i.i to i32*
- store i32 %tmp4.i.i, i32* %tmp.i.i.i.i, align 4
- %tmp1.i19.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 8
- %0 = bitcast i8* %tmp1.i19.i.i to i8**
- store i8* null, i8** %0, align 8
- br label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
-
-_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i: ; preds = %bb.i.i, %bb4.i
- %tmp.i18.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 16
- %tmp15.i.i = zext i32 %tmp4.i.i to i64
- tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp.i18.i.i, i8* %tmp41.i, i64 %tmp15.i.i, i32 1, i1 false)
- %tmp.i18.sum.i.i = add i64 %tmp15.i.i, 16
- %tmp17.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 %tmp.i18.sum.i.i
- store i8 0, i8* %tmp17.i.i, align 1
- %tmp.i.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 8
- %1 = bitcast i8* %tmp.i.i.i to i8**
- store i8* null, i8** %1, align 8
- %tmp22.i = load %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8
- %tmp24.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp22.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*)
- br i1 %tmp24.i, label %bb9.i, label %_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit
-
-bb6.i: ; preds = %entry
- %tmp16.i = bitcast %"struct.llvm::StringMapEntryBase"* %tmp8.i to %"struct.llvm::StringMapEntry<void*>"*
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp16.i
-
-bb9.i: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
- %tmp25.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 3
- %tmp26.i = load i32* %tmp25.i, align 8
- %tmp27.i = add i32 %tmp26.i, -1
- store i32 %tmp27.i, i32* %tmp25.i, align 8
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
-
-_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
-}
-
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -basicaa -gvn -stats -disable-output 2>&1 | grep "Number of loads deleted"
+; rdar://7363102
+
+; GVN should be able to eliminate load %tmp22.i, because it is redundant with
+; load %tmp8.i. This requires being able to prove that %tmp7.i doesn't
+; alias the malloc'd value %tmp.i20.i.i, which it can do since %tmp7.i
+; is derived from %tmp5.i which is computed from a load, and %tmp.i20.i.i
+; is never stored and does not escape.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+%"struct.llvm::MallocAllocator" = type <{ i8 }>
+%"struct.llvm::StringMap<void*,llvm::MallocAllocator>" = type { %"struct.llvm::StringMapImpl", %"struct.llvm::MallocAllocator" }
+%"struct.llvm::StringMapEntry<void*>" = type { %"struct.llvm::StringMapEntryBase", i8* }
+%"struct.llvm::StringMapEntryBase" = type { i32 }
+%"struct.llvm::StringMapImpl" = type { %"struct.llvm::StringMapImpl::ItemBucket"*, i32, i32, i32, i32 }
+%"struct.llvm::StringMapImpl::ItemBucket" = type { i32, %"struct.llvm::StringMapEntryBase"* }
+%"struct.llvm::StringRef" = type { i8*, i64 }
+
+define %"struct.llvm::StringMapEntry<void*>"* @_Z3fooRN4llvm9StringMapIPvNS_15MallocAllocatorEEEPKc(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, i8* %P) ssp {
+entry:
+ %tmp = alloca %"struct.llvm::StringRef", align 8
+ %tmp.i = getelementptr inbounds %"struct.llvm::StringRef"* %tmp, i64 0, i32 0
+ store i8* %P, i8** %tmp.i, align 8
+ %tmp1.i = call i64 @strlen(i8* %P) nounwind readonly
+ %tmp2.i = getelementptr inbounds %"struct.llvm::StringRef"* %tmp, i64 0, i32 1
+ store i64 %tmp1.i, i64* %tmp2.i, align 8
+ %tmp1 = call %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, %"struct.llvm::StringRef"* %tmp) ssp
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp1
+}
+
+declare i64 @strlen(i8* nocapture) nounwind readonly
+
+declare noalias i8* @malloc(i64) nounwind
+
+declare i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"*, i64, i64)
+
+define linkonce_odr %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, %"struct.llvm::StringRef"* nocapture %Key) ssp align 2 {
+entry:
+ %elt = bitcast %"struct.llvm::StringRef"* %Key to i64*
+ %val = load i64* %elt
+ %tmp = getelementptr inbounds %"struct.llvm::StringRef"* %Key, i64 0, i32 1
+ %val2 = load i64* %tmp
+ %tmp2.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0
+ %tmp3.i = tail call i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"* %tmp2.i, i64 %val, i64 %val2)
+ %tmp4.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 0
+ %tmp5.i = load %"struct.llvm::StringMapImpl::ItemBucket"** %tmp4.i, align 8
+ %tmp6.i = zext i32 %tmp3.i to i64
+ %tmp7.i = getelementptr inbounds %"struct.llvm::StringMapImpl::ItemBucket"* %tmp5.i, i64 %tmp6.i, i32 1
+ %tmp8.i = load %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8
+ %tmp9.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, null
+ %tmp13.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*)
+ %or.cond.i = or i1 %tmp9.i, %tmp13.i
+ br i1 %or.cond.i, label %bb4.i, label %bb6.i
+
+bb4.i: ; preds = %entry
+ %tmp41.i = inttoptr i64 %val to i8*
+ %tmp4.i35.i = getelementptr inbounds i8* %tmp41.i, i64 %val2
+ %tmp.i.i = ptrtoint i8* %tmp4.i35.i to i64
+ %tmp1.i.i = trunc i64 %tmp.i.i to i32
+ %tmp3.i.i = trunc i64 %val to i32
+ %tmp4.i.i = sub i32 %tmp1.i.i, %tmp3.i.i
+ %tmp5.i.i = add i32 %tmp4.i.i, 17
+ %tmp8.i.i = zext i32 %tmp5.i.i to i64
+ %tmp.i20.i.i = tail call noalias i8* @malloc(i64 %tmp8.i.i) nounwind
+ %tmp10.i.i = bitcast i8* %tmp.i20.i.i to %"struct.llvm::StringMapEntry<void*>"*
+ %tmp12.i.i = icmp eq i8* %tmp.i20.i.i, null
+ br i1 %tmp12.i.i, label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i, label %bb.i.i
+
+bb.i.i: ; preds = %bb4.i
+ %tmp.i.i.i.i = bitcast i8* %tmp.i20.i.i to i32*
+ store i32 %tmp4.i.i, i32* %tmp.i.i.i.i, align 4
+ %tmp1.i19.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 8
+ %0 = bitcast i8* %tmp1.i19.i.i to i8**
+ store i8* null, i8** %0, align 8
+ br label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
+
+_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i: ; preds = %bb.i.i, %bb4.i
+ %tmp.i18.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 16
+ %tmp15.i.i = zext i32 %tmp4.i.i to i64
+ tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp.i18.i.i, i8* %tmp41.i, i64 %tmp15.i.i, i32 1, i1 false)
+ %tmp.i18.sum.i.i = add i64 %tmp15.i.i, 16
+ %tmp17.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 %tmp.i18.sum.i.i
+ store i8 0, i8* %tmp17.i.i, align 1
+ %tmp.i.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 8
+ %1 = bitcast i8* %tmp.i.i.i to i8**
+ store i8* null, i8** %1, align 8
+ %tmp22.i = load %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8
+ %tmp24.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp22.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*)
+ br i1 %tmp24.i, label %bb9.i, label %_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit
+
+bb6.i: ; preds = %entry
+ %tmp16.i = bitcast %"struct.llvm::StringMapEntryBase"* %tmp8.i to %"struct.llvm::StringMapEntry<void*>"*
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp16.i
+
+bb9.i: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
+ %tmp25.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 3
+ %tmp26.i = load i32* %tmp25.i, align 8
+ %tmp27.i = add i32 %tmp26.i, -1
+ store i32 %tmp27.i, i32* %tmp25.i, align 8
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
+
+_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -globalopt -stats -disable-output 2>&1 | grep "1 globalopt - Number of global vars shrunk to booleans"
+
+@Stop = internal global i32 0 ; <i32*> [#uses=3]
+
+define i32 @foo(i32 %i) nounwind ssp {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !3)
+ %0 = icmp eq i32 %i, 1, !dbg !7 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %bb1, !dbg !7
+
+bb: ; preds = %entry
+ store i32 0, i32* @Stop, align 4, !dbg !9
+ %1 = mul nsw i32 %i, 42, !dbg !10 ; <i32> [#uses=1]
+ call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !3), !dbg !10
+ br label %bb2, !dbg !10
+
+bb1: ; preds = %entry
+ store i32 1, i32* @Stop, align 4, !dbg !11
+ br label %bb2, !dbg !11
+
+bb2: ; preds = %bb1, %bb
+ %i_addr.0 = phi i32 [ %1, %bb ], [ %i, %bb1 ] ; <i32> [#uses=1]
+ br label %return, !dbg !12
+
+return: ; preds = %bb2
+ ret i32 %i_addr.0, !dbg !12
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+define i32 @bar() nounwind ssp {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load i32* @Stop, align 4, !dbg !13 ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 1, !dbg !13 ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb1, !dbg !13
+
+bb: ; preds = %entry
+ br label %bb2, !dbg !18
+
+bb1: ; preds = %entry
+ br label %bb2, !dbg !19
+
+bb2: ; preds = %bb1, %bb
+ %.0 = phi i32 [ 0, %bb ], [ 1, %bb1 ] ; <i32> [#uses=1]
+ br label %return, !dbg !19
+
+return: ; preds = %bb2
+ ret i32 %.0, !dbg !19
+}
+
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+
+!llvm.dbg.gv = !{!0}
+
+!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"Stop", metadata !"Stop", metadata !"", metadata !1, i32 2, metadata !2, i1 true, i1 true, i32* @Stop} ; [ DW_TAG_variable ]
+!1 = metadata !{i32 458769, i32 0, i32 1, metadata !"g.c", metadata !"/tmp", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
+!2 = metadata !{i32 458788, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
+!3 = metadata !{i32 459009, metadata !4, metadata !"i", metadata !1, i32 4, metadata !2} ; [ DW_TAG_arg_variable ]
+!4 = metadata !{i32 458798, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 4, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
+!5 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!6 = metadata !{metadata !2, metadata !2}
+!7 = metadata !{i32 5, i32 0, metadata !8, null}
+!8 = metadata !{i32 458763, metadata !4, i32 0, i32 0} ; [ DW_TAG_lexical_block ]
+!9 = metadata !{i32 6, i32 0, metadata !8, null}
+!10 = metadata !{i32 7, i32 0, metadata !8, null}
+!11 = metadata !{i32 9, i32 0, metadata !8, null}
+!12 = metadata !{i32 11, i32 0, metadata !8, null}
+!13 = metadata !{i32 14, i32 0, metadata !14, null}
+!14 = metadata !{i32 458763, metadata !15, i32 0, i32 0} ; [ DW_TAG_lexical_block ]
+!15 = metadata !{i32 458798, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"bar", metadata !1, i32 13, metadata !16, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
+!16 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !17, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!17 = metadata !{metadata !2}
+!18 = metadata !{i32 15, i32 0, metadata !14, null}
+!19 = metadata !{i32 16, i32 0, metadata !14, null}
+++ /dev/null
-; RUN: opt < %s -globalopt -stats -disable-output 2>&1 | grep "1 globalopt - Number of global vars shrunk to booleans"
-
-@Stop = internal global i32 0 ; <i32*> [#uses=3]
-
-define i32 @foo(i32 %i) nounwind ssp {
-entry:
- %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !3)
- %0 = icmp eq i32 %i, 1, !dbg !7 ; <i1> [#uses=1]
- br i1 %0, label %bb, label %bb1, !dbg !7
-
-bb: ; preds = %entry
- store i32 0, i32* @Stop, align 4, !dbg !9
- %1 = mul nsw i32 %i, 42, !dbg !10 ; <i32> [#uses=1]
- call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !3), !dbg !10
- br label %bb2, !dbg !10
-
-bb1: ; preds = %entry
- store i32 1, i32* @Stop, align 4, !dbg !11
- br label %bb2, !dbg !11
-
-bb2: ; preds = %bb1, %bb
- %i_addr.0 = phi i32 [ %1, %bb ], [ %i, %bb1 ] ; <i32> [#uses=1]
- br label %return, !dbg !12
-
-return: ; preds = %bb2
- ret i32 %i_addr.0, !dbg !12
-}
-
-declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
-
-define i32 @bar() nounwind ssp {
-entry:
- %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- %0 = load i32* @Stop, align 4, !dbg !13 ; <i32> [#uses=1]
- %1 = icmp eq i32 %0, 1, !dbg !13 ; <i1> [#uses=1]
- br i1 %1, label %bb, label %bb1, !dbg !13
-
-bb: ; preds = %entry
- br label %bb2, !dbg !18
-
-bb1: ; preds = %entry
- br label %bb2, !dbg !19
-
-bb2: ; preds = %bb1, %bb
- %.0 = phi i32 [ 0, %bb ], [ 1, %bb1 ] ; <i32> [#uses=1]
- br label %return, !dbg !19
-
-return: ; preds = %bb2
- ret i32 %.0, !dbg !19
-}
-
-declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
-
-!llvm.dbg.gv = !{!0}
-
-!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"Stop", metadata !"Stop", metadata !"", metadata !1, i32 2, metadata !2, i1 true, i1 true, i32* @Stop} ; [ DW_TAG_variable ]
-!1 = metadata !{i32 458769, i32 0, i32 1, metadata !"g.c", metadata !"/tmp", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
-!2 = metadata !{i32 458788, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
-!3 = metadata !{i32 459009, metadata !4, metadata !"i", metadata !1, i32 4, metadata !2} ; [ DW_TAG_arg_variable ]
-!4 = metadata !{i32 458798, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 4, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
-!5 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, null} ; [ DW_TAG_subroutine_type ]
-!6 = metadata !{metadata !2, metadata !2}
-!7 = metadata !{i32 5, i32 0, metadata !8, null}
-!8 = metadata !{i32 458763, metadata !4, i32 0, i32 0} ; [ DW_TAG_lexical_block ]
-!9 = metadata !{i32 6, i32 0, metadata !8, null}
-!10 = metadata !{i32 7, i32 0, metadata !8, null}
-!11 = metadata !{i32 9, i32 0, metadata !8, null}
-!12 = metadata !{i32 11, i32 0, metadata !8, null}
-!13 = metadata !{i32 14, i32 0, metadata !14, null}
-!14 = metadata !{i32 458763, metadata !15, i32 0, i32 0} ; [ DW_TAG_lexical_block ]
-!15 = metadata !{i32 458798, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"bar", metadata !1, i32 13, metadata !16, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
-!16 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !17, i32 0, null} ; [ DW_TAG_subroutine_type ]
-!17 = metadata !{metadata !2}
-!18 = metadata !{i32 15, i32 0, metadata !14, null}
-!19 = metadata !{i32 16, i32 0, metadata !14, null}
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-; RUN: opt < %s -indvars -disable-output -stats -info-output-file - | FileCheck %s
-; Check that IndVarSimplify is not creating unnecessary canonical IVs
-; that will never be used.
-; CHECK-NOT: indvars
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-
-@ue = external global i64
-
-define i32 @foo() nounwind {
-entry:
- br label %bb38.i
-
-bb14.i27:
- %t0 = load i64* @ue, align 8
- %t1 = sub i64 %t0, %i.0.i35
- %t2 = add i64 %t1, 1
- br i1 undef, label %bb15.i28, label %bb19.i31
-
-bb15.i28:
- br label %bb19.i31
-
-bb19.i31:
- %y.0.i = phi i64 [ %t2, %bb15.i28 ], [ %t2, %bb14.i27 ]
- br label %bb35.i
-
-bb35.i:
- br i1 undef, label %bb37.i, label %bb14.i27
-
-bb37.i:
- %t3 = add i64 %i.0.i35, 1
- br label %bb38.i
-
-bb38.i:
- %i.0.i35 = phi i64 [ 1, %entry ], [ %t3, %bb37.i ]
- br label %bb35.i
-}
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -indvars -disable-output -stats -info-output-file - | FileCheck %s
+; Check that IndVarSimplify is not creating unnecessary canonical IVs
+; that will never be used.
+; CHECK-NOT: indvars
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+@ue = external global i64
+
+define i32 @foo() nounwind {
+entry:
+ br label %bb38.i
+
+bb14.i27:
+ %t0 = load i64* @ue, align 8
+ %t1 = sub i64 %t0, %i.0.i35
+ %t2 = add i64 %t1, 1
+ br i1 undef, label %bb15.i28, label %bb19.i31
+
+bb15.i28:
+ br label %bb19.i31
+
+bb19.i31:
+ %y.0.i = phi i64 [ %t2, %bb15.i28 ], [ %t2, %bb14.i27 ]
+ br label %bb35.i
+
+bb35.i:
+ br i1 undef, label %bb37.i, label %bb14.i27
+
+bb37.i:
+ %t3 = add i64 %i.0.i35, 1
+ br label %bb38.i
+
+bb38.i:
+ %i.0.i35 = phi i64 [ 1, %entry ], [ %t3, %bb37.i ]
+ br label %bb35.i
+}
+++ /dev/null
-; RUN: opt -S -inline -stats < %s 2>&1 | FileCheck %s
-; CHECK: Number of functions inlined
-
-; RUN: opt -S -inline -functionattrs -stats < %s 2>&1 | FileCheck -check-prefix=FUNCTIONATTRS %s
-; CHECK-FUNCTIONATTRS: Number of call sites deleted, not inlined
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
-target triple = "i386-apple-darwin9.8"
-
-define internal i32 @test(i32 %x, i32 %y, i32 %z) nounwind {
-entry:
- %0 = add nsw i32 %y, %z ; <i32> [#uses=1]
- %1 = mul i32 %0, %x ; <i32> [#uses=1]
- %2 = mul i32 %y, %z ; <i32> [#uses=1]
- %3 = add nsw i32 %1, %2 ; <i32> [#uses=1]
- ret i32 %3
-}
-
-define i32 @test2() nounwind {
-entry:
- %0 = call i32 @test(i32 1, i32 2, i32 4) nounwind ; <i32> [#uses=1]
- ret i32 14
-}
-
-
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -S -inline -stats < %s 2>&1 | FileCheck %s
+; CHECK: Number of functions inlined
+
+; RUN: opt -S -inline -functionattrs -stats < %s 2>&1 | FileCheck -check-prefix=FUNCTIONATTRS %s
+; CHECK-FUNCTIONATTRS: Number of call sites deleted, not inlined
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+target triple = "i386-apple-darwin9.8"
+
+define internal i32 @test(i32 %x, i32 %y, i32 %z) nounwind {
+entry:
+ %0 = add nsw i32 %y, %z ; <i32> [#uses=1]
+ %1 = mul i32 %0, %x ; <i32> [#uses=1]
+ %2 = mul i32 %y, %z ; <i32> [#uses=1]
+ %3 = add nsw i32 %1, %2 ; <i32> [#uses=1]
+ ret i32 %3
+}
+
+define i32 @test2() nounwind {
+entry:
+ %0 = call i32 @test(i32 1, i32 2, i32 4) nounwind ; <i32> [#uses=1]
+ ret i32 14
+}
+
+
+++ /dev/null
-; RUN: opt < %s -licm -stats -S 2>&1 | grep "1 licm"
-
-@"\01L_OBJC_METH_VAR_NAME_" = internal global [4 x i8] c"foo\00", section "__TEXT,__objc_methname,cstring_literals", align 1
-@"\01L_OBJC_SELECTOR_REFERENCES_" = internal global i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip"
-@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] [i32 0, i32 16], section "__DATA, __objc_imageinfo, regular, no_dead_strip"
-@llvm.used = appending global [3 x i8*] [i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_" to i8*), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*)], section "llvm.metadata"
-
-define void @test(i8* %x) uwtable ssp {
-entry:
- %x.addr = alloca i8*, align 8
- %i = alloca i32, align 4
- store i8* %x, i8** %x.addr, align 8
- store i32 0, i32* %i, align 4
- br label %for.cond
-
-for.cond: ; preds = %for.inc, %entry
- %0 = load i32* %i, align 4
- %cmp = icmp ult i32 %0, 10000
- br i1 %cmp, label %for.body, label %for.end
-
-for.body: ; preds = %for.cond
- %1 = load i8** %x.addr, align 8
- %2 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_", !invariant.load !0
- %call = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %1, i8* %2)
- br label %for.inc
-
-for.inc: ; preds = %for.body
- %3 = load i32* %i, align 4
- %inc = add i32 %3, 1
- store i32 %inc, i32* %i, align 4
- br label %for.cond
-
-for.end: ; preds = %for.cond
- ret void
-}
-
-declare i8* @objc_msgSend(i8*, i8*, ...) nonlazybind
-
-!0 = metadata !{}
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -licm -stats -S 2>&1 | grep "1 licm"
+
+@"\01L_OBJC_METH_VAR_NAME_" = internal global [4 x i8] c"foo\00", section "__TEXT,__objc_methname,cstring_literals", align 1
+@"\01L_OBJC_SELECTOR_REFERENCES_" = internal global i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip"
+@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] [i32 0, i32 16], section "__DATA, __objc_imageinfo, regular, no_dead_strip"
+@llvm.used = appending global [3 x i8*] [i8* getelementptr inbounds ([4 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_" to i8*), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*)], section "llvm.metadata"
+
+define void @test(i8* %x) uwtable ssp {
+entry:
+ %x.addr = alloca i8*, align 8
+ %i = alloca i32, align 4
+ store i8* %x, i8** %x.addr, align 8
+ store i32 0, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32* %i, align 4
+ %cmp = icmp ult i32 %0, 10000
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i8** %x.addr, align 8
+ %2 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_", !invariant.load !0
+ %call = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %1, i8* %2)
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %3 = load i32* %i, align 4
+ %inc = add i32 %3, 1
+ store i32 %inc, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ ret void
+}
+
+declare i8* @objc_msgSend(i8*, i8*, ...) nonlazybind
+
+!0 = metadata !{}
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-; RUN: opt < %s -disable-output -stats -loop-unroll -unroll-runtime -unroll-threshold=400 -info-output-file - | FileCheck %s --check-prefix=STATS
-
-; Test that nested loops can be unrolled. We need to increase threshold to do it
-
-; STATS: 2 loop-unroll - Number of loops unrolled (completely or otherwise)
-
-define i32 @nested(i32* nocapture %a, i32 %n, i32 %m) nounwind uwtable readonly {
-entry:
- %cmp11 = icmp sgt i32 %n, 0
- br i1 %cmp11, label %for.cond1.preheader.lr.ph, label %for.end7
-
-for.cond1.preheader.lr.ph: ; preds = %entry
- %cmp28 = icmp sgt i32 %m, 0
- br label %for.cond1.preheader
-
-for.cond1.preheader: ; preds = %for.inc5, %for.cond1.preheader.lr.ph
- %indvars.iv16 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next17, %for.inc5 ]
- %sum.012 = phi i32 [ 0, %for.cond1.preheader.lr.ph ], [ %sum.1.lcssa, %for.inc5 ]
- br i1 %cmp28, label %for.body3, label %for.inc5
-
-for.body3: ; preds = %for.cond1.preheader, %for.body3
- %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 0, %for.cond1.preheader ]
- %sum.19 = phi i32 [ %add4, %for.body3 ], [ %sum.012, %for.cond1.preheader ]
- %0 = add nsw i64 %indvars.iv, %indvars.iv16
- %arrayidx = getelementptr inbounds i32* %a, i64 %0
- %1 = load i32* %arrayidx, align 4
- %add4 = add nsw i32 %1, %sum.19
- %indvars.iv.next = add i64 %indvars.iv, 1
- %lftr.wideiv = trunc i64 %indvars.iv.next to i32
- %exitcond = icmp eq i32 %lftr.wideiv, %m
- br i1 %exitcond, label %for.inc5, label %for.body3
-
-for.inc5: ; preds = %for.body3, %for.cond1.preheader
- %sum.1.lcssa = phi i32 [ %sum.012, %for.cond1.preheader ], [ %add4, %for.body3 ]
- %indvars.iv.next17 = add i64 %indvars.iv16, 1
- %lftr.wideiv18 = trunc i64 %indvars.iv.next17 to i32
- %exitcond19 = icmp eq i32 %lftr.wideiv18, %n
- br i1 %exitcond19, label %for.end7, label %for.cond1.preheader
-
-for.end7: ; preds = %for.inc5, %entry
- %sum.0.lcssa = phi i32 [ 0, %entry ], [ %sum.1.lcssa, %for.inc5 ]
- ret i32 %sum.0.lcssa
-}
-
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -disable-output -stats -loop-unroll -unroll-runtime -unroll-threshold=400 -info-output-file - | FileCheck %s --check-prefix=STATS
+
+; Test that nested loops can be unrolled. We need to increase threshold to do it
+
+; STATS: 2 loop-unroll - Number of loops unrolled (completely or otherwise)
+
+define i32 @nested(i32* nocapture %a, i32 %n, i32 %m) nounwind uwtable readonly {
+entry:
+ %cmp11 = icmp sgt i32 %n, 0
+ br i1 %cmp11, label %for.cond1.preheader.lr.ph, label %for.end7
+
+for.cond1.preheader.lr.ph: ; preds = %entry
+ %cmp28 = icmp sgt i32 %m, 0
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc5, %for.cond1.preheader.lr.ph
+ %indvars.iv16 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next17, %for.inc5 ]
+ %sum.012 = phi i32 [ 0, %for.cond1.preheader.lr.ph ], [ %sum.1.lcssa, %for.inc5 ]
+ br i1 %cmp28, label %for.body3, label %for.inc5
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 0, %for.cond1.preheader ]
+ %sum.19 = phi i32 [ %add4, %for.body3 ], [ %sum.012, %for.cond1.preheader ]
+ %0 = add nsw i64 %indvars.iv, %indvars.iv16
+ %arrayidx = getelementptr inbounds i32* %a, i64 %0
+ %1 = load i32* %arrayidx, align 4
+ %add4 = add nsw i32 %1, %sum.19
+ %indvars.iv.next = add i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %m
+ br i1 %exitcond, label %for.inc5, label %for.body3
+
+for.inc5: ; preds = %for.body3, %for.cond1.preheader
+ %sum.1.lcssa = phi i32 [ %sum.012, %for.cond1.preheader ], [ %add4, %for.body3 ]
+ %indvars.iv.next17 = add i64 %indvars.iv16, 1
+ %lftr.wideiv18 = trunc i64 %indvars.iv.next17 to i32
+ %exitcond19 = icmp eq i32 %lftr.wideiv18, %n
+ br i1 %exitcond19, label %for.end7, label %for.cond1.preheader
+
+for.end7: ; preds = %for.inc5, %entry
+ %sum.0.lcssa = phi i32 [ 0, %entry ], [ %sum.1.lcssa, %for.inc5 ]
+ ret i32 %sum.0.lcssa
+}
+
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -loop-unswitch -stats -disable-output 2>&1 | grep "1 loop-unswitch - Number of branches unswitched" | count 1
+; PR 3170
+define i32 @a(i32 %x, i32 %y) nounwind {
+entry:
+ %0 = icmp ult i32 0, %y ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %bb4
+
+bb.nph: ; preds = %entry
+ %1 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb.nph, %bb3
+ %i.01 = phi i32 [ %3, %bb3 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
+ br i1 %1, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %2 = tail call i32 (...)* @b() nounwind ; <i32> [#uses=0]
+ br label %bb2
+
+bb2: ; preds = %bb, %bb1
+ %3 = add i32 %i.01, 1 ; <i32> [#uses=2]
+ br label %bb3
+
+bb3: ; preds = %bb2
+ %i.0 = phi i32 [ %3, %bb2 ] ; <i32> [#uses=1]
+ %4 = icmp ult i32 %i.0, %y ; <i1> [#uses=1]
+ br i1 %4, label %bb, label %bb3.bb4_crit_edge
+
+bb3.bb4_crit_edge: ; preds = %bb3
+ br label %bb4
+
+bb4: ; preds = %bb3.bb4_crit_edge, %entry
+ ret i32 0
+}
+
+declare i32 @b(...)
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -loop-unswitch -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
+; RUN: opt -S -loop-unswitch -verify-loop-info -verify-dom-info < %s | FileCheck %s
+
+; STATS: 1 loop-simplify - Number of pre-header or exit blocks inserted
+; STATS: 2 loop-unswitch - Number of switches unswitched
+
+; CHECK: %1 = icmp eq i32 %c, 1
+; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
+
+; CHECK: ..split_crit_edge: ; preds = %0
+; CHECK-NEXT: br label %.split
+
+; CHECK: .split.us: ; preds = %0
+; CHECK-NEXT: br label %loop_begin.us
+
+; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
+; CHECK-NEXT: %var_val.us = load i32* %var
+; CHECK-NEXT: switch i32 1, label %default.us-lcssa.us [
+; CHECK-NEXT: i32 1, label %inc.us
+
+; CHECK: inc.us: ; preds = %loop_begin.us
+; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
+; CHECK-NEXT: br label %loop_begin.backedge.us
+
+; CHECK: .split: ; preds = %..split_crit_edge
+; CHECK-NEXT: %2 = icmp eq i32 %c, 2
+; CHECK-NEXT: br i1 %2, label %.split.split.us, label %.split..split.split_crit_edge
+
+; CHECK: .split..split.split_crit_edge: ; preds = %.split
+; CHECK-NEXT: br label %.split.split
+
+; CHECK: .split.split.us: ; preds = %.split
+; CHECK-NEXT: br label %loop_begin.us1
+
+; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us5, %.split.split.us
+; CHECK-NEXT: %var_val.us2 = load i32* %var
+; CHECK-NEXT: switch i32 2, label %default.us-lcssa.us-lcssa.us [
+; CHECK-NEXT: i32 1, label %inc.us4
+; CHECK-NEXT: i32 2, label %dec.us3
+; CHECK-NEXT: ]
+
+; CHECK: dec.us3: ; preds = %loop_begin.us1
+; CHECK-NEXT: call void @decf() [[NOR_NUW]]
+; CHECK-NEXT: br label %loop_begin.backedge.us5
+
+; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
+; CHECK-NEXT: br label %loop_begin
+
+; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
+; CHECK-NEXT: %var_val = load i32* %var
+; CHECK-NEXT: switch i32 %c, label %default.us-lcssa.us-lcssa [
+; CHECK-NEXT: i32 1, label %inc
+; CHECK-NEXT: i32 2, label %dec
+; CHECK-NEXT: ]
+
+; CHECK: inc: ; preds = %loop_begin
+; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc.split
+
+; CHECK: dec: ; preds = %loop_begin
+; CHECK-NEXT: br i1 true, label %us-unreachable6, label %dec.split
+
+define i32 @test(i32* %var) {
+ %mem = alloca i32
+ store i32 2, i32* %mem
+ %c = load i32* %mem
+
+ br label %loop_begin
+
+loop_begin:
+
+ %var_val = load i32* %var
+
+ switch i32 %c, label %default [
+ i32 1, label %inc
+ i32 2, label %dec
+ ]
+
+inc:
+ call void @incf() noreturn nounwind
+ br label %loop_begin
+dec:
+ call void @decf() noreturn nounwind
+ br label %loop_begin
+default:
+ br label %loop_exit
+loop_exit:
+ ret i32 0
+}
+
+declare void @incf() noreturn
+declare void @decf() noreturn
+
+; CHECK: attributes #0 = { noreturn }
+; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -loop-unswitch -loop-unswitch-threshold 13 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
+; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 13 -verify-loop-info -verify-dom-info < %s | FileCheck %s
+
+; STATS: 1 loop-simplify - Number of pre-header or exit blocks inserted
+; STATS: 1 loop-unswitch - Number of switches unswitched
+
+; ModuleID = '../llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll'
+
+; CHECK: %1 = icmp eq i32 %c, 1
+; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
+
+; CHECK: ..split_crit_edge: ; preds = %0
+; CHECK-NEXT: br label %.split
+
+; CHECK: .split.us: ; preds = %0
+; CHECK-NEXT: br label %loop_begin.us
+
+; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
+; CHECK: switch i32 1, label %second_switch.us [
+; CHECK-NEXT: i32 1, label %inc.us
+
+; CHECK: second_switch.us: ; preds = %loop_begin.us
+; CHECK-NEXT: switch i32 %d, label %default.us [
+; CHECK-NEXT: i32 1, label %inc.us
+; CHECK-NEXT: ]
+
+; CHECK: inc.us: ; preds = %second_switch.us, %loop_begin.us
+; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
+; CHECK-NEXT: br label %loop_begin.backedge.us
+
+; CHECK: .split: ; preds = %..split_crit_edge
+; CHECK-NEXT: br label %loop_begin
+
+; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split
+; CHECK: switch i32 %c, label %second_switch [
+; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
+; CHECK-NEXT: ]
+
+; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
+; CHECK-NEXT: br i1 true, label %us-unreachable, label %inc
+
+; CHECK: second_switch: ; preds = %loop_begin
+; CHECK-NEXT: switch i32 %d, label %default [
+; CHECK-NEXT: i32 1, label %inc
+; CHECK-NEXT: ]
+
+; CHECK: inc: ; preds = %loop_begin.inc_crit_edge, %second_switch
+; CHECK-NEXT: call void @incf() [[NOR_NUW]]
+; CHECK-NEXT: br label %loop_begin.backedge
+
+define i32 @test(i32* %var) {
+ %mem = alloca i32
+ store i32 2, i32* %mem
+ %c = load i32* %mem
+ %d = load i32* %mem
+
+ br label %loop_begin
+
+loop_begin:
+
+ %var_val = load i32* %var
+
+ switch i32 %c, label %second_switch [
+ i32 1, label %inc
+ ]
+
+second_switch:
+ switch i32 %d, label %default [
+ i32 1, label %inc
+ ]
+
+inc:
+ call void @incf() noreturn nounwind
+ br label %loop_begin
+
+default:
+ br label %loop_begin
+
+loop_exit:
+ ret i32 0
+}
+
+declare void @incf() noreturn
+declare void @decf() noreturn
+
+; CHECK: attributes #0 = { noreturn }
+; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -loop-unswitch -loop-unswitch-threshold 1000 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
+; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 1000 -verify-loop-info -verify-dom-info < %s | FileCheck %s
+
+; STATS: 1 loop-simplify - Number of pre-header or exit blocks inserted
+; STATS: 3 loop-unswitch - Number of switches unswitched
+
+; CHECK: %1 = icmp eq i32 %c, 1
+; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
+
+; CHECK: ..split_crit_edge: ; preds = %0
+; CHECK-NEXT: br label %.split
+
+; CHECK: .split.us: ; preds = %0
+; CHECK-NEXT: %2 = icmp eq i32 %d, 1
+; CHECK-NEXT: br i1 %2, label %.split.us.split.us, label %.split.us..split.us.split_crit_edge
+
+; CHECK: .split.us..split.us.split_crit_edge: ; preds = %.split.us
+; CHECK-NEXT: br label %.split.us.split
+
+; CHECK: .split.us.split.us: ; preds = %.split.us
+; CHECK-NEXT: br label %loop_begin.us.us
+
+; CHECK: loop_begin.us.us: ; preds = %loop_begin.backedge.us.us, %.split.us.split.us
+; CHECK-NEXT: %var_val.us.us = load i32* %var
+; CHECK-NEXT: switch i32 1, label %second_switch.us.us [
+; CHECK-NEXT: i32 1, label %inc.us.us
+
+; CHECK: second_switch.us.us: ; preds = %loop_begin.us.us
+; CHECK-NEXT: switch i32 1, label %default.us.us [
+; CHECK-NEXT: i32 1, label %inc.us.us
+
+; CHECK: inc.us.us: ; preds = %second_switch.us.us, %loop_begin.us.us
+; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
+; CHECK-NEXT: br label %loop_begin.backedge.us.us
+
+; CHECK: .split.us.split: ; preds = %.split.us..split.us.split_crit_edge
+; CHECK-NEXT: br label %loop_begin.us
+
+; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us.split
+; CHECK-NEXT: %var_val.us = load i32* %var
+; CHECK-NEXT: switch i32 1, label %second_switch.us [
+; CHECK-NEXT: i32 1, label %inc.us
+
+; CHECK: second_switch.us: ; preds = %loop_begin.us
+; CHECK-NEXT: switch i32 %d, label %default.us [
+; CHECK-NEXT: i32 1, label %second_switch.us.inc.us_crit_edge
+; CHECK-NEXT: ]
+
+; CHECK: second_switch.us.inc.us_crit_edge: ; preds = %second_switch.us
+; CHECK-NEXT: br i1 true, label %us-unreachable8, label %inc.us
+
+; CHECK: inc.us: ; preds = %second_switch.us.inc.us_crit_edge, %loop_begin.us
+; CHECK-NEXT: call void @incf() [[NOR_NUW]]
+; CHECK-NEXT: br label %loop_begin.backedge.us
+
+; CHECK: .split: ; preds = %..split_crit_edge
+; CHECK-NEXT: %3 = icmp eq i32 %d, 1
+; CHECK-NEXT: br i1 %3, label %.split.split.us, label %.split..split.split_crit_edge
+
+; CHECK: .split..split.split_crit_edge: ; preds = %.split
+; CHECK-NEXT: br label %.split.split
+
+; CHECK: .split.split.us: ; preds = %.split
+; CHECK-NEXT: br label %loop_begin.us1
+
+; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us6, %.split.split.us
+; CHECK-NEXT: %var_val.us2 = load i32* %var
+; CHECK-NEXT: switch i32 %c, label %second_switch.us3 [
+; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge.us
+; CHECK-NEXT: ]
+
+; CHECK: second_switch.us3: ; preds = %loop_begin.us1
+; CHECK-NEXT: switch i32 1, label %default.us5 [
+; CHECK-NEXT: i32 1, label %inc.us4
+; CHECK-NEXT: ]
+
+; CHECK: inc.us4: ; preds = %loop_begin.inc_crit_edge.us, %second_switch.us3
+; CHECK-NEXT: call void @incf() [[NOR_NUW]]
+; CHECK-NEXT: br label %loop_begin.backedge.us6
+
+; CHECK: loop_begin.inc_crit_edge.us: ; preds = %loop_begin.us1
+; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa.us, label %inc.us4
+
+; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
+; CHECK-NEXT: br label %loop_begin
+
+; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
+; CHECK-NEXT: %var_val = load i32* %var
+; CHECK-NEXT: switch i32 %c, label %second_switch [
+; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
+; CHECK-NEXT: ]
+
+; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
+; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc
+
+; CHECK: second_switch: ; preds = %loop_begin
+; CHECK-NEXT: switch i32 %d, label %default [
+; CHECK-NEXT: i32 1, label %second_switch.inc_crit_edge
+; CHECK-NEXT: ]
+
+; CHECK: second_switch.inc_crit_edge: ; preds = %second_switch
+; CHECK-NEXT: br i1 true, label %us-unreachable7, label %inc
+
+
+define i32 @test(i32* %var) {
+ %mem = alloca i32
+ store i32 2, i32* %mem
+ %c = load i32* %mem
+ %d = load i32* %mem
+
+ br label %loop_begin
+
+loop_begin:
+
+ %var_val = load i32* %var
+
+ switch i32 %c, label %second_switch [
+ i32 1, label %inc
+ ]
+
+second_switch:
+ switch i32 %d, label %default [
+ i32 1, label %inc
+ ]
+
+inc:
+ call void @incf() noreturn nounwind
+ br label %loop_begin
+
+default:
+ br label %loop_begin
+
+loop_exit:
+ ret i32 0
+}
+
+declare void @incf() noreturn
+declare void @decf() noreturn
+
+; CHECK: attributes #0 = { noreturn }
+; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
+++ /dev/null
-; RUN: opt < %s -loop-unswitch -stats -disable-output 2>&1 | grep "1 loop-unswitch - Number of branches unswitched" | count 1
-; PR 3170
-define i32 @a(i32 %x, i32 %y) nounwind {
-entry:
- %0 = icmp ult i32 0, %y ; <i1> [#uses=1]
- br i1 %0, label %bb.nph, label %bb4
-
-bb.nph: ; preds = %entry
- %1 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
- br label %bb
-
-bb: ; preds = %bb.nph, %bb3
- %i.01 = phi i32 [ %3, %bb3 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
- br i1 %1, label %bb2, label %bb1
-
-bb1: ; preds = %bb
- %2 = tail call i32 (...)* @b() nounwind ; <i32> [#uses=0]
- br label %bb2
-
-bb2: ; preds = %bb, %bb1
- %3 = add i32 %i.01, 1 ; <i32> [#uses=2]
- br label %bb3
-
-bb3: ; preds = %bb2
- %i.0 = phi i32 [ %3, %bb2 ] ; <i32> [#uses=1]
- %4 = icmp ult i32 %i.0, %y ; <i1> [#uses=1]
- br i1 %4, label %bb, label %bb3.bb4_crit_edge
-
-bb3.bb4_crit_edge: ; preds = %bb3
- br label %bb4
-
-bb4: ; preds = %bb3.bb4_crit_edge, %entry
- ret i32 0
-}
-
-declare i32 @b(...)
+++ /dev/null
-; RUN: opt -loop-unswitch -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
-; RUN: opt -S -loop-unswitch -verify-loop-info -verify-dom-info < %s | FileCheck %s
-
-; STATS: 1 loop-simplify - Number of pre-header or exit blocks inserted
-; STATS: 2 loop-unswitch - Number of switches unswitched
-
-; CHECK: %1 = icmp eq i32 %c, 1
-; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
-
-; CHECK: ..split_crit_edge: ; preds = %0
-; CHECK-NEXT: br label %.split
-
-; CHECK: .split.us: ; preds = %0
-; CHECK-NEXT: br label %loop_begin.us
-
-; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
-; CHECK-NEXT: %var_val.us = load i32* %var
-; CHECK-NEXT: switch i32 1, label %default.us-lcssa.us [
-; CHECK-NEXT: i32 1, label %inc.us
-
-; CHECK: inc.us: ; preds = %loop_begin.us
-; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
-; CHECK-NEXT: br label %loop_begin.backedge.us
-
-; CHECK: .split: ; preds = %..split_crit_edge
-; CHECK-NEXT: %2 = icmp eq i32 %c, 2
-; CHECK-NEXT: br i1 %2, label %.split.split.us, label %.split..split.split_crit_edge
-
-; CHECK: .split..split.split_crit_edge: ; preds = %.split
-; CHECK-NEXT: br label %.split.split
-
-; CHECK: .split.split.us: ; preds = %.split
-; CHECK-NEXT: br label %loop_begin.us1
-
-; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us5, %.split.split.us
-; CHECK-NEXT: %var_val.us2 = load i32* %var
-; CHECK-NEXT: switch i32 2, label %default.us-lcssa.us-lcssa.us [
-; CHECK-NEXT: i32 1, label %inc.us4
-; CHECK-NEXT: i32 2, label %dec.us3
-; CHECK-NEXT: ]
-
-; CHECK: dec.us3: ; preds = %loop_begin.us1
-; CHECK-NEXT: call void @decf() [[NOR_NUW]]
-; CHECK-NEXT: br label %loop_begin.backedge.us5
-
-; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
-; CHECK-NEXT: br label %loop_begin
-
-; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
-; CHECK-NEXT: %var_val = load i32* %var
-; CHECK-NEXT: switch i32 %c, label %default.us-lcssa.us-lcssa [
-; CHECK-NEXT: i32 1, label %inc
-; CHECK-NEXT: i32 2, label %dec
-; CHECK-NEXT: ]
-
-; CHECK: inc: ; preds = %loop_begin
-; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc.split
-
-; CHECK: dec: ; preds = %loop_begin
-; CHECK-NEXT: br i1 true, label %us-unreachable6, label %dec.split
-
-define i32 @test(i32* %var) {
- %mem = alloca i32
- store i32 2, i32* %mem
- %c = load i32* %mem
-
- br label %loop_begin
-
-loop_begin:
-
- %var_val = load i32* %var
-
- switch i32 %c, label %default [
- i32 1, label %inc
- i32 2, label %dec
- ]
-
-inc:
- call void @incf() noreturn nounwind
- br label %loop_begin
-dec:
- call void @decf() noreturn nounwind
- br label %loop_begin
-default:
- br label %loop_exit
-loop_exit:
- ret i32 0
-}
-
-declare void @incf() noreturn
-declare void @decf() noreturn
-
-; CHECK: attributes #0 = { noreturn }
-; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
+++ /dev/null
-; RUN: opt -loop-unswitch -loop-unswitch-threshold 13 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
-; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 13 -verify-loop-info -verify-dom-info < %s | FileCheck %s
-
-; STATS: 1 loop-simplify - Number of pre-header or exit blocks inserted
-; STATS: 1 loop-unswitch - Number of switches unswitched
-
-; ModuleID = '../llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll'
-
-; CHECK: %1 = icmp eq i32 %c, 1
-; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
-
-; CHECK: ..split_crit_edge: ; preds = %0
-; CHECK-NEXT: br label %.split
-
-; CHECK: .split.us: ; preds = %0
-; CHECK-NEXT: br label %loop_begin.us
-
-; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
-; CHECK: switch i32 1, label %second_switch.us [
-; CHECK-NEXT: i32 1, label %inc.us
-
-; CHECK: second_switch.us: ; preds = %loop_begin.us
-; CHECK-NEXT: switch i32 %d, label %default.us [
-; CHECK-NEXT: i32 1, label %inc.us
-; CHECK-NEXT: ]
-
-; CHECK: inc.us: ; preds = %second_switch.us, %loop_begin.us
-; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
-; CHECK-NEXT: br label %loop_begin.backedge.us
-
-; CHECK: .split: ; preds = %..split_crit_edge
-; CHECK-NEXT: br label %loop_begin
-
-; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split
-; CHECK: switch i32 %c, label %second_switch [
-; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
-; CHECK-NEXT: ]
-
-; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
-; CHECK-NEXT: br i1 true, label %us-unreachable, label %inc
-
-; CHECK: second_switch: ; preds = %loop_begin
-; CHECK-NEXT: switch i32 %d, label %default [
-; CHECK-NEXT: i32 1, label %inc
-; CHECK-NEXT: ]
-
-; CHECK: inc: ; preds = %loop_begin.inc_crit_edge, %second_switch
-; CHECK-NEXT: call void @incf() [[NOR_NUW]]
-; CHECK-NEXT: br label %loop_begin.backedge
-
-define i32 @test(i32* %var) {
- %mem = alloca i32
- store i32 2, i32* %mem
- %c = load i32* %mem
- %d = load i32* %mem
-
- br label %loop_begin
-
-loop_begin:
-
- %var_val = load i32* %var
-
- switch i32 %c, label %second_switch [
- i32 1, label %inc
- ]
-
-second_switch:
- switch i32 %d, label %default [
- i32 1, label %inc
- ]
-
-inc:
- call void @incf() noreturn nounwind
- br label %loop_begin
-
-default:
- br label %loop_begin
-
-loop_exit:
- ret i32 0
-}
-
-declare void @incf() noreturn
-declare void @decf() noreturn
-
-; CHECK: attributes #0 = { noreturn }
-; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
+++ /dev/null
-; RUN: opt -loop-unswitch -loop-unswitch-threshold 1000 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
-; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 1000 -verify-loop-info -verify-dom-info < %s | FileCheck %s
-
-; STATS: 1 loop-simplify - Number of pre-header or exit blocks inserted
-; STATS: 3 loop-unswitch - Number of switches unswitched
-
-; CHECK: %1 = icmp eq i32 %c, 1
-; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
-
-; CHECK: ..split_crit_edge: ; preds = %0
-; CHECK-NEXT: br label %.split
-
-; CHECK: .split.us: ; preds = %0
-; CHECK-NEXT: %2 = icmp eq i32 %d, 1
-; CHECK-NEXT: br i1 %2, label %.split.us.split.us, label %.split.us..split.us.split_crit_edge
-
-; CHECK: .split.us..split.us.split_crit_edge: ; preds = %.split.us
-; CHECK-NEXT: br label %.split.us.split
-
-; CHECK: .split.us.split.us: ; preds = %.split.us
-; CHECK-NEXT: br label %loop_begin.us.us
-
-; CHECK: loop_begin.us.us: ; preds = %loop_begin.backedge.us.us, %.split.us.split.us
-; CHECK-NEXT: %var_val.us.us = load i32* %var
-; CHECK-NEXT: switch i32 1, label %second_switch.us.us [
-; CHECK-NEXT: i32 1, label %inc.us.us
-
-; CHECK: second_switch.us.us: ; preds = %loop_begin.us.us
-; CHECK-NEXT: switch i32 1, label %default.us.us [
-; CHECK-NEXT: i32 1, label %inc.us.us
-
-; CHECK: inc.us.us: ; preds = %second_switch.us.us, %loop_begin.us.us
-; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
-; CHECK-NEXT: br label %loop_begin.backedge.us.us
-
-; CHECK: .split.us.split: ; preds = %.split.us..split.us.split_crit_edge
-; CHECK-NEXT: br label %loop_begin.us
-
-; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us.split
-; CHECK-NEXT: %var_val.us = load i32* %var
-; CHECK-NEXT: switch i32 1, label %second_switch.us [
-; CHECK-NEXT: i32 1, label %inc.us
-
-; CHECK: second_switch.us: ; preds = %loop_begin.us
-; CHECK-NEXT: switch i32 %d, label %default.us [
-; CHECK-NEXT: i32 1, label %second_switch.us.inc.us_crit_edge
-; CHECK-NEXT: ]
-
-; CHECK: second_switch.us.inc.us_crit_edge: ; preds = %second_switch.us
-; CHECK-NEXT: br i1 true, label %us-unreachable8, label %inc.us
-
-; CHECK: inc.us: ; preds = %second_switch.us.inc.us_crit_edge, %loop_begin.us
-; CHECK-NEXT: call void @incf() [[NOR_NUW]]
-; CHECK-NEXT: br label %loop_begin.backedge.us
-
-; CHECK: .split: ; preds = %..split_crit_edge
-; CHECK-NEXT: %3 = icmp eq i32 %d, 1
-; CHECK-NEXT: br i1 %3, label %.split.split.us, label %.split..split.split_crit_edge
-
-; CHECK: .split..split.split_crit_edge: ; preds = %.split
-; CHECK-NEXT: br label %.split.split
-
-; CHECK: .split.split.us: ; preds = %.split
-; CHECK-NEXT: br label %loop_begin.us1
-
-; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us6, %.split.split.us
-; CHECK-NEXT: %var_val.us2 = load i32* %var
-; CHECK-NEXT: switch i32 %c, label %second_switch.us3 [
-; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge.us
-; CHECK-NEXT: ]
-
-; CHECK: second_switch.us3: ; preds = %loop_begin.us1
-; CHECK-NEXT: switch i32 1, label %default.us5 [
-; CHECK-NEXT: i32 1, label %inc.us4
-; CHECK-NEXT: ]
-
-; CHECK: inc.us4: ; preds = %loop_begin.inc_crit_edge.us, %second_switch.us3
-; CHECK-NEXT: call void @incf() [[NOR_NUW]]
-; CHECK-NEXT: br label %loop_begin.backedge.us6
-
-; CHECK: loop_begin.inc_crit_edge.us: ; preds = %loop_begin.us1
-; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa.us, label %inc.us4
-
-; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
-; CHECK-NEXT: br label %loop_begin
-
-; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
-; CHECK-NEXT: %var_val = load i32* %var
-; CHECK-NEXT: switch i32 %c, label %second_switch [
-; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
-; CHECK-NEXT: ]
-
-; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
-; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc
-
-; CHECK: second_switch: ; preds = %loop_begin
-; CHECK-NEXT: switch i32 %d, label %default [
-; CHECK-NEXT: i32 1, label %second_switch.inc_crit_edge
-; CHECK-NEXT: ]
-
-; CHECK: second_switch.inc_crit_edge: ; preds = %second_switch
-; CHECK-NEXT: br i1 true, label %us-unreachable7, label %inc
-
-
-define i32 @test(i32* %var) {
- %mem = alloca i32
- store i32 2, i32* %mem
- %c = load i32* %mem
- %d = load i32* %mem
-
- br label %loop_begin
-
-loop_begin:
-
- %var_val = load i32* %var
-
- switch i32 %c, label %second_switch [
- i32 1, label %inc
- ]
-
-second_switch:
- switch i32 %d, label %default [
- i32 1, label %inc
- ]
-
-inc:
- call void @incf() noreturn nounwind
- br label %loop_begin
-
-default:
- br label %loop_begin
-
-loop_exit:
- ret i32 0
-}
-
-declare void @incf() noreturn
-declare void @decf() noreturn
-
-; CHECK: attributes #0 = { noreturn }
-; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
+++ /dev/null
-; RUN: opt -loop-unswitch -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
-; RUN: opt -loop-unswitch -simplifycfg -S < %s | FileCheck %s
-; PR5373
-
-; Loop unswitching shouldn't trivially unswitch the true case of condition %a
-; in the code here because it leads to an infinite loop. While this doesn't
-; contain any instructions with side effects, it's still a kind of side effect.
-; It can trivially unswitch on the false cas of condition %a though.
-
-; STATS: 2 loop-unswitch - Number of branches unswitched
-; STATS: 1 loop-unswitch - Number of unswitches that are trivial
-
-; CHECK: @func_16
-; CHECK-NEXT: entry:
-; CHECK-NEXT: br i1 %a, label %entry.split, label %abort0.split
-
-; CHECK: entry.split:
-; CHECK-NEXT: br i1 %b, label %cond.end.us, label %abort1
-
-; CHECK: cond.end.us:
-; CHECK-NEXT: br label %cond.end.us
-
-; CHECK: abort0.split:
-; CHECK-NEXT: call void @end0() [[NOR_NUW:#[0-9]+]]
-; CHECK-NEXT: unreachable
-
-; CHECK: abort1:
-; CHECK-NEXT: call void @end1() [[NOR_NUW]]
-; CHECK-NEXT: unreachable
-
-; CHECK: }
-
-define void @func_16(i1 %a, i1 %b) nounwind {
-entry:
- br label %for.body
-
-for.body:
- br i1 %a, label %cond.end, label %abort0
-
-cond.end:
- br i1 %b, label %for.body, label %abort1
-
-abort0:
- call void @end0() noreturn nounwind
- unreachable
-
-abort1:
- call void @end1() noreturn nounwind
- unreachable
-}
-
-declare void @end0() noreturn
-declare void @end1() noreturn
-
-; CHECK: attributes #0 = { nounwind }
-; CHECK: attributes #1 = { noreturn }
-; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -loop-unswitch -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
+; RUN: opt -loop-unswitch -simplifycfg -S < %s | FileCheck %s
+; PR5373
+
+; Loop unswitching shouldn't trivially unswitch the true case of condition %a
+; in the code here because it leads to an infinite loop. While this doesn't
+; contain any instructions with side effects, it's still a kind of side effect.
+; It can trivially unswitch on the false cas of condition %a though.
+
+; STATS: 2 loop-unswitch - Number of branches unswitched
+; STATS: 1 loop-unswitch - Number of unswitches that are trivial
+
+; CHECK: @func_16
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 %a, label %entry.split, label %abort0.split
+
+; CHECK: entry.split:
+; CHECK-NEXT: br i1 %b, label %cond.end.us, label %abort1
+
+; CHECK: cond.end.us:
+; CHECK-NEXT: br label %cond.end.us
+
+; CHECK: abort0.split:
+; CHECK-NEXT: call void @end0() [[NOR_NUW:#[0-9]+]]
+; CHECK-NEXT: unreachable
+
+; CHECK: abort1:
+; CHECK-NEXT: call void @end1() [[NOR_NUW]]
+; CHECK-NEXT: unreachable
+
+; CHECK: }
+
+define void @func_16(i1 %a, i1 %b) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ br i1 %a, label %cond.end, label %abort0
+
+cond.end:
+ br i1 %b, label %for.body, label %abort1
+
+abort0:
+ call void @end0() noreturn nounwind
+ unreachable
+
+abort1:
+ call void @end1() noreturn nounwind
+ unreachable
+}
+
+declare void @end0() noreturn
+declare void @end1() noreturn
+
+; CHECK: attributes #0 = { nounwind }
+; CHECK: attributes #1 = { noreturn }
+; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
+++ /dev/null
-; RUN: opt < %s -mergefunc -stats -disable-output 2>&1 | not grep "functions merged"
-
-define i32 @foo1(i32 %x) {
-entry:
- %A = add i32 %x, 1
- %B = call i32 @foo1(i32 %A)
- br label %loop
-loop:
- %C = phi i32 [%B, %entry], [%D, %loop]
- %D = add i32 %x, 2
- %E = icmp ugt i32 %D, 10000
- br i1 %E, label %loopexit, label %loop
-loopexit:
- ret i32 %D
-}
-
-define i32 @foo2(i32 %x) {
-entry:
- %0 = add i32 %x, 1
- %1 = call i32 @foo2(i32 %0)
- br label %loop
-loop:
- %2 = phi i32 [%1, %entry], [%3, %loop]
- %3 = add i32 %2, 2
- %4 = icmp ugt i32 %3, 10000
- br i1 %4, label %loopexit, label %loop
-loopexit:
- ret i32 %3
-}
+++ /dev/null
-; RUN: opt < %s -mergefunc -stats -disable-output 2>&1 | grep "functions merged"
-
-define i32 @foo1(i32 %x) {
-entry:
- %A = add i32 %x, 1
- %B = call i32 @foo1(i32 %A)
- br label %loop
-loop:
- %C = phi i32 [%B, %entry], [%D, %loop]
- %D = add i32 %C, 2
- %E = icmp ugt i32 %D, 10000
- br i1 %E, label %loopexit, label %loop
-loopexit:
- ret i32 %D
-}
-
-define i32 @foo2(i32 %x) {
-entry:
- %0 = add i32 %x, 1
- %1 = call i32 @foo2(i32 %0)
- br label %loop
-loop:
- %2 = phi i32 [%1, %entry], [%3, %loop]
- %3 = add i32 %2, 2
- %4 = icmp ugt i32 %3, 10000
- br i1 %4, label %loopexit, label %loop
-loopexit:
- ret i32 %3
-}
+++ /dev/null
-; RUN: opt -mergefunc -stats -disable-output < %s 2>&1 | grep "functions merged"
-
-; This test is checks whether we can merge
-; vector<intptr_t>::push_back(0)
-; and
-; vector<void *>::push_back(0)
-; .
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
-target triple = "x86_64-unknown-linux-gnu"
-
-%0 = type { i32, void ()* }
-%1 = type { i64, i1 }
-%"class.std::vector" = type { [24 x i8] }
-
-@vi = global %"class.std::vector" zeroinitializer, align 8
-@__dso_handle = external unnamed_addr global i8*
-@vp = global %"class.std::vector" zeroinitializer, align 8
-@llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_a }]
-
-define linkonce_odr void @_ZNSt6vectorIlSaIlEED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 {
-entry:
- %tmp2.i.i = bitcast %"class.std::vector"* %this to i64**
- %tmp3.i.i = load i64** %tmp2.i.i, align 8, !tbaa !0
- %tobool.i.i.i = icmp eq i64* %tmp3.i.i, null
- br i1 %tobool.i.i.i, label %_ZNSt6vectorIlSaIlEED2Ev.exit, label %if.then.i.i.i
-
-if.then.i.i.i: ; preds = %entry
- %0 = bitcast i64* %tmp3.i.i to i8*
- tail call void @_ZdlPv(i8* %0) nounwind
- ret void
-
-_ZNSt6vectorIlSaIlEED2Ev.exit: ; preds = %entry
- ret void
-}
-
-declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*)
-
-define linkonce_odr void @_ZNSt6vectorIPvSaIS0_EED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 {
-entry:
- %tmp2.i.i = bitcast %"class.std::vector"* %this to i8***
- %tmp3.i.i = load i8*** %tmp2.i.i, align 8, !tbaa !0
- %tobool.i.i.i = icmp eq i8** %tmp3.i.i, null
- br i1 %tobool.i.i.i, label %_ZNSt6vectorIPvSaIS0_EED2Ev.exit, label %if.then.i.i.i
-
-if.then.i.i.i: ; preds = %entry
- %0 = bitcast i8** %tmp3.i.i to i8*
- tail call void @_ZdlPv(i8* %0) nounwind
- ret void
-
-_ZNSt6vectorIPvSaIS0_EED2Ev.exit: ; preds = %entry
- ret void
-}
-
-declare void @_Z1fv()
-
-declare void @_ZNSt6vectorIPvSaIS0_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS0_S2_EERKS0_(%"class.std::vector"* nocapture %this, i8** %__position.coerce, i8** nocapture %__x) align 2
-
-declare void @_ZdlPv(i8*) nounwind
-
-declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
-
-declare void @_ZSt17__throw_bad_allocv() noreturn
-
-declare noalias i8* @_Znwm(i64)
-
-declare void @_ZNSt6vectorIlSaIlEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPlS1_EERKl(%"class.std::vector"* nocapture %this, i64* %__position.coerce, i64* nocapture %__x) align 2
-
-declare void @_GLOBAL__I_a()
-
-declare %1 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
-
-!0 = metadata !{metadata !"any pointer", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
-!3 = metadata !{metadata !"long", metadata !1}
+++ /dev/null
-; RUN: opt -mergefunc < %s -disable-output -stats | not grep merged
-; This used to crash with an assert.
-
-define <2 x i8> @v1(<2 x i8> %x) {
- ret <2 x i8> %x
-}
-
-define <4 x i8> @v2(<4 x i8> %x) {
- ret <4 x i8> %x
-}
-
-define [2 x i8] @a1([2 x i8] %x) {
- ret [2 x i8] %x
-}
-
-define [4 x i8] @a2([4 x i8] %x) {
- ret [4 x i8] %x
-}
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -mergefunc -stats -disable-output 2>&1 | not grep "functions merged"
+
+define i32 @foo1(i32 %x) {
+entry:
+ %A = add i32 %x, 1
+ %B = call i32 @foo1(i32 %A)
+ br label %loop
+loop:
+ %C = phi i32 [%B, %entry], [%D, %loop]
+ %D = add i32 %x, 2
+ %E = icmp ugt i32 %D, 10000
+ br i1 %E, label %loopexit, label %loop
+loopexit:
+ ret i32 %D
+}
+
+define i32 @foo2(i32 %x) {
+entry:
+ %0 = add i32 %x, 1
+ %1 = call i32 @foo2(i32 %0)
+ br label %loop
+loop:
+ %2 = phi i32 [%1, %entry], [%3, %loop]
+ %3 = add i32 %2, 2
+ %4 = icmp ugt i32 %3, 10000
+ br i1 %4, label %loopexit, label %loop
+loopexit:
+ ret i32 %3
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -mergefunc -stats -disable-output 2>&1 | grep "functions merged"
+
+define i32 @foo1(i32 %x) {
+entry:
+ %A = add i32 %x, 1
+ %B = call i32 @foo1(i32 %A)
+ br label %loop
+loop:
+ %C = phi i32 [%B, %entry], [%D, %loop]
+ %D = add i32 %C, 2
+ %E = icmp ugt i32 %D, 10000
+ br i1 %E, label %loopexit, label %loop
+loopexit:
+ ret i32 %D
+}
+
+define i32 @foo2(i32 %x) {
+entry:
+ %0 = add i32 %x, 1
+ %1 = call i32 @foo2(i32 %0)
+ br label %loop
+loop:
+ %2 = phi i32 [%1, %entry], [%3, %loop]
+ %3 = add i32 %2, 2
+ %4 = icmp ugt i32 %3, 10000
+ br i1 %4, label %loopexit, label %loop
+loopexit:
+ ret i32 %3
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -mergefunc -stats -disable-output < %s 2>&1 | grep "functions merged"
+
+; This test is checks whether we can merge
+; vector<intptr_t>::push_back(0)
+; and
+; vector<void *>::push_back(0)
+; .
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+%0 = type { i32, void ()* }
+%1 = type { i64, i1 }
+%"class.std::vector" = type { [24 x i8] }
+
+@vi = global %"class.std::vector" zeroinitializer, align 8
+@__dso_handle = external unnamed_addr global i8*
+@vp = global %"class.std::vector" zeroinitializer, align 8
+@llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_a }]
+
+define linkonce_odr void @_ZNSt6vectorIlSaIlEED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 {
+entry:
+ %tmp2.i.i = bitcast %"class.std::vector"* %this to i64**
+ %tmp3.i.i = load i64** %tmp2.i.i, align 8, !tbaa !0
+ %tobool.i.i.i = icmp eq i64* %tmp3.i.i, null
+ br i1 %tobool.i.i.i, label %_ZNSt6vectorIlSaIlEED2Ev.exit, label %if.then.i.i.i
+
+if.then.i.i.i: ; preds = %entry
+ %0 = bitcast i64* %tmp3.i.i to i8*
+ tail call void @_ZdlPv(i8* %0) nounwind
+ ret void
+
+_ZNSt6vectorIlSaIlEED2Ev.exit: ; preds = %entry
+ ret void
+}
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*)
+
+define linkonce_odr void @_ZNSt6vectorIPvSaIS0_EED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 {
+entry:
+ %tmp2.i.i = bitcast %"class.std::vector"* %this to i8***
+ %tmp3.i.i = load i8*** %tmp2.i.i, align 8, !tbaa !0
+ %tobool.i.i.i = icmp eq i8** %tmp3.i.i, null
+ br i1 %tobool.i.i.i, label %_ZNSt6vectorIPvSaIS0_EED2Ev.exit, label %if.then.i.i.i
+
+if.then.i.i.i: ; preds = %entry
+ %0 = bitcast i8** %tmp3.i.i to i8*
+ tail call void @_ZdlPv(i8* %0) nounwind
+ ret void
+
+_ZNSt6vectorIPvSaIS0_EED2Ev.exit: ; preds = %entry
+ ret void
+}
+
+declare void @_Z1fv()
+
+declare void @_ZNSt6vectorIPvSaIS0_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS0_S2_EERKS0_(%"class.std::vector"* nocapture %this, i8** %__position.coerce, i8** nocapture %__x) align 2
+
+declare void @_ZdlPv(i8*) nounwind
+
+declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
+
+declare void @_ZSt17__throw_bad_allocv() noreturn
+
+declare noalias i8* @_Znwm(i64)
+
+declare void @_ZNSt6vectorIlSaIlEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPlS1_EERKl(%"class.std::vector"* nocapture %this, i64* %__position.coerce, i64* nocapture %__x) align 2
+
+declare void @_GLOBAL__I_a()
+
+declare %1 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
+
+!0 = metadata !{metadata !"any pointer", metadata !1}
+!1 = metadata !{metadata !"omnipotent char", metadata !2}
+!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
+!3 = metadata !{metadata !"long", metadata !1}
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt -mergefunc < %s -disable-output -stats | not grep merged
+; This used to crash with an assert.
+
+define <2 x i8> @v1(<2 x i8> %x) {
+ ret <2 x i8> %x
+}
+
+define <4 x i8> @v2(<4 x i8> %x) {
+ ret <4 x i8> %x
+}
+
+define [2 x i8] @a1([2 x i8] %x) {
+ ret [2 x i8] %x
+}
+
+define [4 x i8] @a2([4 x i8] %x) {
+ ret [4 x i8] %x
+}
+++ /dev/null
-; This function contains two tail calls, which should be eliminated
-; RUN: opt < %s -tailcallelim -stats -disable-output 2>&1 | grep "2 tailcallelim"
-
-define i32 @Ack(i32 %M.1, i32 %N.1) {
-entry:
- %tmp.1 = icmp eq i32 %M.1, 0 ; <i1> [#uses=1]
- br i1 %tmp.1, label %then.0, label %endif.0
-then.0: ; preds = %entry
- %tmp.4 = add i32 %N.1, 1 ; <i32> [#uses=1]
- ret i32 %tmp.4
-endif.0: ; preds = %entry
- %tmp.6 = icmp eq i32 %N.1, 0 ; <i1> [#uses=1]
- br i1 %tmp.6, label %then.1, label %endif.1
-then.1: ; preds = %endif.0
- %tmp.10 = add i32 %M.1, -1 ; <i32> [#uses=1]
- %tmp.8 = call i32 @Ack( i32 %tmp.10, i32 1 ) ; <i32> [#uses=1]
- ret i32 %tmp.8
-endif.1: ; preds = %endif.0
- %tmp.13 = add i32 %M.1, -1 ; <i32> [#uses=1]
- %tmp.17 = add i32 %N.1, -1 ; <i32> [#uses=1]
- %tmp.14 = call i32 @Ack( i32 %M.1, i32 %tmp.17 ) ; <i32> [#uses=1]
- %tmp.11 = call i32 @Ack( i32 %tmp.13, i32 %tmp.14 ) ; <i32> [#uses=1]
- ret i32 %tmp.11
-}
-
+++ /dev/null
-; Duplicate the return into if.end to enable TCE.
-; RUN: opt -tailcallelim -stats -disable-output < %s 2>&1 | FileCheck %s
-
-; CHECK: Number of return duplicated
-
-define i32 @fib(i32 %n) nounwind ssp {
-entry:
- %cmp = icmp slt i32 %n, 2
- br i1 %cmp, label %if.then, label %if.end
-
-if.then: ; preds = %entry
- br label %return
-
-if.end: ; preds = %entry
- %sub = add nsw i32 %n, -2
- %call = call i32 @fib(i32 %sub)
- %sub3 = add nsw i32 %n, -1
- %call4 = call i32 @fib(i32 %sub3)
- %add = add nsw i32 %call, %call4
- br label %return
-
-return: ; preds = %if.end, %if.then
- %retval.0 = phi i32 [ 1, %if.then ], [ %add, %if.end ]
- ret i32 %retval.0
-}
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
--- /dev/null
+; REQUIRES: asserts
+; This function contains two tail calls, which should be eliminated
+; RUN: opt < %s -tailcallelim -stats -disable-output 2>&1 | grep "2 tailcallelim"
+
+define i32 @Ack(i32 %M.1, i32 %N.1) {
+entry:
+ %tmp.1 = icmp eq i32 %M.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %then.0, label %endif.0
+then.0: ; preds = %entry
+ %tmp.4 = add i32 %N.1, 1 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+endif.0: ; preds = %entry
+ %tmp.6 = icmp eq i32 %N.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.6, label %then.1, label %endif.1
+then.1: ; preds = %endif.0
+ %tmp.10 = add i32 %M.1, -1 ; <i32> [#uses=1]
+ %tmp.8 = call i32 @Ack( i32 %tmp.10, i32 1 ) ; <i32> [#uses=1]
+ ret i32 %tmp.8
+endif.1: ; preds = %endif.0
+ %tmp.13 = add i32 %M.1, -1 ; <i32> [#uses=1]
+ %tmp.17 = add i32 %N.1, -1 ; <i32> [#uses=1]
+ %tmp.14 = call i32 @Ack( i32 %M.1, i32 %tmp.17 ) ; <i32> [#uses=1]
+ %tmp.11 = call i32 @Ack( i32 %tmp.13, i32 %tmp.14 ) ; <i32> [#uses=1]
+ ret i32 %tmp.11
+}
+
--- /dev/null
+; REQUIRES: asserts
+; Duplicate the return into if.end to enable TCE.
+; RUN: opt -tailcallelim -stats -disable-output < %s 2>&1 | FileCheck %s
+
+; CHECK: Number of return duplicated
+
+define i32 @fib(i32 %n) nounwind ssp {
+entry:
+ %cmp = icmp slt i32 %n, 2
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ br label %return
+
+if.end: ; preds = %entry
+ %sub = add nsw i32 %n, -2
+ %call = call i32 @fib(i32 %sub)
+ %sub3 = add nsw i32 %n, -1
+ %call4 = call i32 @fib(i32 %sub3)
+ %add = add nsw i32 %call, %call4
+ br label %return
+
+return: ; preds = %if.end, %if.then
+ %retval.0 = phi i32 [ 1, %if.then ], [ %add, %if.end ]
+ ret i32 %retval.0
+}
--- /dev/null
+; REQUIRES: asserts
+; RUN: opt < %s -tailduplicate -taildup-threshold=3 -stats -disable-output 2>&1 | not grep tailduplicate
+; XFAIL: *
+
+define i32 @foo(i32 %l) nounwind {
+entry:
+ %cond = icmp eq i32 %l, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb, label %bb9
+
+bb: ; preds = %entry
+ br label %bb9
+
+bb5: ; preds = %bb9
+ %tmp7 = call i32 (...)* @bar( i32 %x.0 ) nounwind ; <i32> [#uses=1]
+ br label %bb9
+
+bb9: ; preds = %bb5, %bb, %entry
+ %x.0 = phi i32 [ 0, %entry ], [ %tmp7, %bb5 ], [ 1525, %bb ] ; <i32> [#uses=2]
+ %l_addr.0 = phi i32 [ %l, %entry ], [ %tmp11, %bb5 ], [ %l, %bb ] ; <i32> [#uses=1]
+ %tmp11 = add i32 %l_addr.0, -1 ; <i32> [#uses=2]
+ %tmp13 = icmp eq i32 %tmp11, -1 ; <i1> [#uses=1]
+ br i1 %tmp13, label %bb15, label %bb5
+
+bb15: ; preds = %bb9
+ ret i32 %x.0
+}
+
+declare i32 @bar(...)
+++ /dev/null
-; RUN: opt < %s -tailduplicate -taildup-threshold=3 -stats -disable-output 2>&1 | not grep tailduplicate
-; XFAIL: *
-
-define i32 @foo(i32 %l) nounwind {
-entry:
- %cond = icmp eq i32 %l, 1 ; <i1> [#uses=1]
- br i1 %cond, label %bb, label %bb9
-
-bb: ; preds = %entry
- br label %bb9
-
-bb5: ; preds = %bb9
- %tmp7 = call i32 (...)* @bar( i32 %x.0 ) nounwind ; <i32> [#uses=1]
- br label %bb9
-
-bb9: ; preds = %bb5, %bb, %entry
- %x.0 = phi i32 [ 0, %entry ], [ %tmp7, %bb5 ], [ 1525, %bb ] ; <i32> [#uses=2]
- %l_addr.0 = phi i32 [ %l, %entry ], [ %tmp11, %bb5 ], [ %l, %bb ] ; <i32> [#uses=1]
- %tmp11 = add i32 %l_addr.0, -1 ; <i32> [#uses=2]
- %tmp13 = icmp eq i32 %tmp11, -1 ; <i1> [#uses=1]
- br i1 %tmp13, label %bb15, label %bb5
-
-bb15: ; preds = %bb9
- ret i32 %x.0
-}
-
-declare i32 @bar(...)
+++ /dev/null
-config.suffixes = ['.ll', '.c', '.cpp']
-
-if not config.root.enable_assertions:
- config.unsupported = True
projects / oota-llvm.git / commitdiff