SelectionDAG &DAG) const {
SDLoc dl(Op);
+ if (Op.getValueType() == MVT::i1)
+ // KORTEST instruction should be selected
+ return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
+ DAG.getConstant(0, Op.getValueType()));
+
// CF and OF aren't always set the way we want. Determine which
// of these we need.
bool NeedCF = false;
NeedOF = true;
break;
}
-
// See if we can use the EFLAGS value from the operand instead of
// doing a separate TEST. TEST always sets OF and CF to 0, so unless
// we prove that the arithmetic won't overflow, we can't use OF or CF.
if (Op.getResNo() != 0 || NeedOF || NeedCF) {
// Emit a CMP with 0, which is the TEST pattern.
- if (Op.getValueType() == MVT::i1)
- return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op,
- DAG.getConstant(0, MVT::i1));
+ //if (Op.getValueType() == MVT::i1)
+ // return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op,
+ // DAG.getConstant(0, MVT::i1));
return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
DAG.getConstant(0, Op.getValueType()));
}
return EmitTest(Op0, X86CC, DAG);
if (Op0.getValueType() == MVT::i1) {
+ // invert the value
Op0 = DAG.getNode(ISD::XOR, dl, MVT::i1, Op0,
DAG.getConstant(-1, MVT::i1));
- return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op0,
- DAG.getConstant(0, MVT::i1));
+ return EmitTest(Op0, X86CC, DAG);
}
}
ret i32 %or
}
+define i32 @test8(i32 %a1, i32 %a2, i32 %a3) {
+ %tmp1 = icmp eq i32 %a1, -1
+ %tmp2 = icmp eq i32 %a2, -2147483648
+ %tmp3 = and i1 %tmp1, %tmp2
+ %tmp4 = icmp eq i32 %a3, 0
+ %tmp5 = or i1 %tmp3, %tmp4
+ %res = select i1 %tmp5, i32 1, i32 %a3
+ ret i32 %res
+ }
\ No newline at end of file