- check that -mcpu=slm uses the call register indirect optimization
- check that -mcpu=slm runs the scheduler
- check that -mcpu=slm supports the movbe instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190814
91177308-0d34-0410-b5e6-
96231b3b80d8
; RUN: llc < %s -mcpu=core2 -mtriple=i686-linux | FileCheck -check-prefix=ATOM-NOT32 %s
; RUN: llc < %s -mcpu=atom -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM64 %s
; RUN: llc < %s -mcpu=core2 -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM-NOT64 %s
+; RUN: llc < %s -mcpu=slm -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
+; RUN: llc < %s -mcpu=slm -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
; fn_ptr.ll
;ATOM64: movq (%rcx), %rcx
;ATOM64: callq *%rcx
;ATOM-NOT64: callq *(%rcx)
+ ;SLM32: movl (%ecx), %ecx
+ ;SLM32: calll *%ecx
+ ;SLM64: movq (%rcx), %rcx
+ ;SLM64: callq *%rcx
tail call void %1(%class.A* %call)
ret i32 0
}
;ATOM64: movq (%rax), %rax
;ATOM64: callq *%rax
;ATOM-NOT64: callq *(%rax)
+ ;SLM32: movl (%eax), %eax
+ ;SLM32: calll *%eax
+ ;SLM64: movq (%rax), %rax
+ ;SLM64: callq *%rax
tail call void %1(i32 2)
ret i32 0
}
; RUN: llc <%s -O2 -mcpu=atom -march=x86 -relocation-model=static | FileCheck -check-prefix=atom %s
+; RUN: llc <%s -O2 -mcpu=slm -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s
; RUN: llc <%s -O2 -mcpu=core2 -march=x86 -relocation-model=static | FileCheck %s
;
; atom: imull
; atom-NOT: movl
; atom: imull
+; slm: imull
+; slm-NOT: movl
+; slm: imull
; CHECK: imull
; CHECK: movl
; CHECK: imull
; RUN: llc -mtriple=x86_64-linux -mcpu=atom < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-linux -mcpu=slm < %s | FileCheck %s -check-prefix=SLM
declare i32 @llvm.bswap.i32(i32) nounwind readnone
declare i64 @llvm.bswap.i64(i64) nounwind readnone
ret void
; CHECK-LABEL: test1:
; CHECK: movbel %esi, (%rdi)
+; SLM-LABEL: test1:
+; SLM: movbel %esi, (%rdi)
}
define i32 @test2(i32* %x) nounwind {
ret i32 %bswap
; CHECK-LABEL: test2:
; CHECK: movbel (%rdi), %eax
+; SLM-LABEL: test2:
+; SLM: movbel (%rdi), %eax
}
define void @test3(i64* %x, i64 %y) nounwind {
ret void
; CHECK-LABEL: test3:
; CHECK: movbeq %rsi, (%rdi)
+; SLM-LABEL: test3:
+; SLM: movbeq %rsi, (%rdi)
}
define i64 @test4(i64* %x) nounwind {
ret i64 %bswap
; CHECK-LABEL: test4:
; CHECK: movbeq (%rdi), %rax
+; SLM-LABEL: test4:
+; SLM: movbeq (%rdi), %rax
}