typedef std::vector<MachineInstr*> Index2MiMap;
Index2MiMap i2miMap_;
- typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
+ typedef std::map<unsigned, LiveInterval*> Reg2IntervalMap;
Reg2IntervalMap r2iMap_;
BitVector allocatableRegs_;
LiveInterval &getInterval(unsigned reg) {
Reg2IntervalMap::iterator I = r2iMap_.find(reg);
assert(I != r2iMap_.end() && "Interval does not exist for register");
- return I->second;
+ return *I->second;
}
const LiveInterval &getInterval(unsigned reg) const {
Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
assert(I != r2iMap_.end() && "Interval does not exist for register");
- return I->second;
+ return *I->second;
}
bool hasInterval(unsigned reg) const {
Reg2IntervalMap::iterator I = r2iMap_.find(reg);
if (I == r2iMap_.end())
I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
- return I->second;
+ return *I->second;
}
/// addLiveRangeToEndOfBlock - Given a register and an instruction,
// Interval removal
void removeInterval(unsigned Reg) {
- r2iMap_.erase(Reg);
+ std::map<unsigned, LiveInterval*>::iterator I = r2iMap_.find(Reg);
+ delete I->second;
+ r2iMap_.erase(I);
}
/// isRemoved - returns true if the specified machine instr has been
std::map<unsigned,unsigned> &MBBVRegsMap,
std::vector<LiveInterval*> &NewLIs, float &SSWeight);
- static LiveInterval createInterval(unsigned Reg);
+ static LiveInterval* createInterval(unsigned Reg);
void printRegName(unsigned reg) const;
};
}
void LiveIntervals::releaseMemory() {
+ // Free the live intervals themselves.
+ for (std::map<unsigned, LiveInterval*>::iterator I = r2iMap_.begin(),
+ E = r2iMap_.end(); I != E; ++I)
+ delete I->second;
+
MBB2IdxMap.clear();
Idx2MBBMap.clear();
mi2iMap_.clear();
if (!OldI2MI.empty())
for (iterator OI = begin(), OE = end(); OI != OE; ++OI) {
- for (LiveInterval::iterator LI = OI->second.begin(),
- LE = OI->second.end(); LI != LE; ++LI) {
+ for (LiveInterval::iterator LI = OI->second->begin(),
+ LE = OI->second->end(); LI != LE; ++LI) {
// Remap the start index of the live range to the corresponding new
// number, or our best guess at what it _should_ correspond to if the
}
}
- for (LiveInterval::vni_iterator VNI = OI->second.vni_begin(),
- VNE = OI->second.vni_end(); VNI != VNE; ++VNI) {
+ for (LiveInterval::vni_iterator VNI = OI->second->vni_begin(),
+ VNE = OI->second->vni_end(); VNI != VNE; ++VNI) {
VNInfo* vni = *VNI;
// Remap the VNInfo def index, which works the same as the
DOUT << "********** INTERVALS **********\n";
for (iterator I = begin(), E = end(); I != E; ++I) {
- I->second.print(DOUT, tri_);
+ I->second->print(DOUT, tri_);
DOUT << "\n";
}
void LiveIntervals::print(std::ostream &O, const Module* ) const {
O << "********** INTERVALS **********\n";
for (const_iterator I = begin(), E = end(); I != E; ++I) {
- I->second.print(O, tri_);
+ I->second->print(O, tri_);
O << "\n";
}
}
-LiveInterval LiveIntervals::createInterval(unsigned reg) {
+LiveInterval* LiveIntervals::createInterval(unsigned reg) {
float Weight = TargetRegisterInfo::isPhysicalRegister(reg) ?
HUGE_VALF : 0.0F;
- return LiveInterval(reg, Weight);
+ return new LiveInterval(reg, Weight);
}
/// getVNInfoSourceReg - Helper function that parses the specified VNInfo
"interval sets should be empty on initialization");
for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
- if (TargetRegisterInfo::isPhysicalRegister(i->second.reg)) {
- reginfo_->setPhysRegUsed(i->second.reg);
- fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
+ if (TargetRegisterInfo::isPhysicalRegister(i->second->reg)) {
+ reginfo_->setPhysRegUsed(i->second->reg);
+ fixed_.push_back(std::make_pair(i->second, i->second->begin()));
} else
- unhandled_.push(&i->second);
+ unhandled_.push(i->second);
}
}
MachineFunction::iterator EntryMBB = mf_->begin();
SmallVector<MachineBasicBlock*, 8> LiveInMBBs;
for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
- LiveInterval &cur = i->second;
+ LiveInterval &cur = *i->second;
unsigned Reg = 0;
bool isPhys = TargetRegisterInfo::isPhysicalRegister(cur.reg);
if (isPhys)
- Reg = i->second.reg;
+ Reg = cur.reg;
else if (vrm_->isAssignedReg(cur.reg))
Reg = attemptTrivialCoalescing(cur, vrm_->getPhys(cur.reg));
if (!Reg)
joinIntervals();
DOUT << "********** INTERVALS POST JOINING **********\n";
for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I){
- I->second.print(DOUT, tri_);
+ I->second->print(DOUT, tri_);
DOUT << "\n";
}
}
}
for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I) {
- LiveInterval &LI = I->second;
+ LiveInterval &LI = *I->second;
if (TargetRegisterInfo::isVirtualRegister(LI.reg)) {
// If the live interval length is essentially zero, i.e. in every live
// range the use follows def immediately, it doesn't make sense to spill