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(parent: 50bf86e) | patch
Fix pr11266.
authorNadav Rotem <nadav.rotem@intel.com>
Sun, 30 Oct 2011 13:24:22 +0000 (13:24 +0000)
committerNadav Rotem <nadav.rotem@intel.com>
Sun, 30 Oct 2011 13:24:22 +0000 (13:24 +0000)
commitfb0dfbbff7fb3a9cff09301c174a65aec7b98760
tree029856aabf6a78871d347e2126e7675bd0ae6a3ctree | snapshot
parent50bf86ea8a757be4059a56a2c38270873dcf9e2ecommit | diff
Fix pr11266.

On x86: (shl V, 1) -> add V,V

Hardware support for vector-shift is sparse and in many cases we scalarize the
result. Additionally, on sandybridge padd is faster than shl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143311 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
test/CodeGen/X86/2011-10-30-padd.ll [new file with mode: 0644] blob
test/CodeGen/X86/x86-shifts.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors