ARM: check predicate bits for thumb instructions
authorAmaury de la Vieuville <amaury.dlv@gmail.com>
Mon, 24 Jun 2013 09:15:01 +0000 (09:15 +0000)
committerAmaury de la Vieuville <amaury.dlv@gmail.com>
Mon, 24 Jun 2013 09:15:01 +0000 (09:15 +0000)
commitebc3938ae717d7352de800344c3ad5a1bceb74e5
tree67c7db18cabf43a3191c20fdc60e24e97ea5369a
parent07c3e159d8fffc8b16bcd52cc395a78007c62910
ARM: check predicate bits for thumb instructions

When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184707 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
test/MC/Disassembler/ARM/invalid-NEON-thumb.txt [new file with mode: 0644]
test/MC/Disassembler/ARM/invalid-VFP-thumb.txt [new file with mode: 0644]