Define store instructions with base+register offset addressing mode
authorJyotsna Verma <jverma@codeaurora.org>
Tue, 4 Dec 2012 21:58:25 +0000 (21:58 +0000)
committerJyotsna Verma <jverma@codeaurora.org>
Tue, 4 Dec 2012 21:58:25 +0000 (21:58 +0000)
commite198626f87cbe7b89a299313d5b7d0293d19f4da
tree3c8133d68e8c546a377b5024d5b6094590aed672
parent9493dae613847b01b79914502f337814fe3e00ac
Define store instructions with base+register offset addressing mode
using multiclass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169314 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonInstrInfoV4.td