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(parent: dd4924c) | patch
Properly handle 'm' inline asm constraints. If a GV is being selected for the address...
authorEvan Cheng <evan.cheng@apple.com>
Wed, 24 Sep 2008 00:05:32 +0000 (00:05 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Wed, 24 Sep 2008 00:05:32 +0000 (00:05 +0000)
commitda43bcf624acb56a3d77bb5ae9a02728af032613
treedd93cba15bfa2de5c6708211ff7d67d79792c3d6tree | snapshot
parentdd4924c564c7a661b78b604ebf16dfef7aa62b35commit | diff
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetLowering.h diff | blob | history
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp diff | blob | history
lib/CodeGen/SelectionDAG/TargetLowering.cpp diff | blob | history
lib/Target/CellSPU/SPUISelLowering.cpp diff | blob | history
lib/Target/CellSPU/SPUISelLowering.h diff | blob | history
lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
lib/Target/PowerPC/PPCISelLowering.h diff | blob | history
lib/Target/X86/X86ISelDAGToDAG.cpp diff | blob | history
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
lib/Target/X86/X86ISelLowering.h diff | blob | history
test/CodeGen/X86/inline-asm-pic.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors