ARM: correct Dwarf output for non-contiguous VFP saves.
authorTim Northover <tnorthover@apple.com>
Wed, 12 Mar 2014 11:29:23 +0000 (11:29 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 12 Mar 2014 11:29:23 +0000 (11:29 +0000)
commitd4517fa24da8d678e2541ec9b4def40b5b99753a
treea529372d70b820ba59e3f23b41659336a0f2640d
parent792a1d7191561cb0a3f7eba3844fd3a45b80d088
ARM: correct Dwarf output for non-contiguous VFP saves.

When the list of VFP registers to be saved was non-contiguous (so multiple
vpush/vpop instructions were needed) these were being ordered oddly, as in:
    vpush {d8, d9}
    vpush {d11}

This led to the layout in memory being [d11, d8, d9] which is ugly and doesn't
match the CFI_INSTRUCTIONs we're generating either (so Dwarf info would be
broken).

This switches the order of vpush/vpop (in both prologue and epilogue,
obviously) so that the Dwarf locations are correct again.

rdar://problem/16264856

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203655 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMFrameLowering.cpp
test/CodeGen/ARM/2010-12-07-PEIBug.ll
test/CodeGen/ARM/vfp-regs-dwarf.ll [new file with mode: 0644]