[ARM] Allow SP in rGPR, starting from ARMv8
authorArtyom Skrobov <Artyom.Skrobov@arm.com>
Wed, 28 Oct 2015 13:58:36 +0000 (13:58 +0000)
committerArtyom Skrobov <Artyom.Skrobov@arm.com>
Wed, 28 Oct 2015 13:58:36 +0000 (13:58 +0000)
commitd024add676337be2a2bc79982fc374e2eafd0fc1
treec96e346bab0a2077b2a42be61f4b0cc336f791f6
parent52482cc2412babf2c9b04f125fe90f5f21913406
[ARM] Allow SP in rGPR, starting from ARMv8

Summary:
This patch handles assembly and disassembly, but not codegen, as of yet.

Additionally, it fixes a bug whereby SP and PC as shifted-reg operands
were treated as predictable in ARMv7 Thumb; and it enables the tests
for invalid and unpredictable instructions to run on both ARMv7 and ARMv8.

Reviewers: jmolloy, rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D14141

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251516 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
test/MC/ARM/basic-thumb2-instructions-v8.s
test/MC/ARM/diagnostics.s
test/MC/ARM/thumb-shift-encoding.s
test/MC/ARM/thumb2-diagnostics.s
test/MC/Disassembler/ARM/invalid-thumbv7.txt
test/MC/Disassembler/ARM/thumb-v8.txt