[Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instruction...
authorVladimir Medic <Vladimir.Medic@imgtec.com>
Wed, 21 Jan 2015 10:47:36 +0000 (10:47 +0000)
committerVladimir Medic <Vladimir.Medic@imgtec.com>
Wed, 21 Jan 2015 10:47:36 +0000 (10:47 +0000)
commitcde587f359cb032f80ea73b84a8bf574341adeac
treebd959bf89fae04851ba891bb0aa30d06014a4884
parent74670deb21333f50f0421e34862410d46bab9235
[Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instructions for mips r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method that properly handles decoding of these instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226652 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
lib/Target/Mips/Mips32r6InstrInfo.td
test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
test/MC/Disassembler/Mips/mips32r6/valid-xfail-mips32r6.txt
test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt