[AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
authorNadav Rotem <nadav.rotem@intel.com>
Sun, 15 Jan 2012 19:27:55 +0000 (19:27 +0000)
committerNadav Rotem <nadav.rotem@intel.com>
Sun, 15 Jan 2012 19:27:55 +0000 (19:27 +0000)
commitcc6165695fa1713230184d743368b8b3642faa5d
tree51c2d38fe6efb00576d04673458ac01d90c09ba5
parented4c8c633c52a40ad1a3e8687f290be4aeb1f0e8
[AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.

Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148225 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/TargetLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/blend-msb.ll [new file with mode: 0644]