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[mips] Don't use odd-numbered float registers for double arguments for fastcc
authorSasa Stankovic <Sasa.Stankovic@imgtec.com>
Fri, 22 Aug 2014 09:23:22 +0000 (09:23 +0000)
committerSasa Stankovic <Sasa.Stankovic@imgtec.com>
Fri, 22 Aug 2014 09:23:22 +0000 (09:23 +0000)
commitcc59c3f33500022940a12522a877204a70718866
tree94e48bbfd56785448d7e0b87bbb090844648c109tree | snapshot
parentc86bdc73e8b3f69708fafc1ce957216062c995cdcommit | diff
[mips] Don't use odd-numbered float registers for double arguments for fastcc
calling convention if FP is 64-bit and +nooddspreg is used.

Differential Revision: http://reviews.llvm.org/D4981.diff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216262 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsCallingConv.td diff | blob | history
test/CodeGen/Mips/fastcc.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors