[x86] Begin stubbing out the AVX support in the new vector shuffle
authorChandler Carruth <chandlerc@gmail.com>
Thu, 14 Aug 2014 12:13:59 +0000 (12:13 +0000)
committerChandler Carruth <chandlerc@gmail.com>
Thu, 14 Aug 2014 12:13:59 +0000 (12:13 +0000)
commitcad1711154c7e6a1fba0e8cd75872c4ee6956fbf
treefcf5e00af1eaeca1d05f9720d26be271a8570eb9
parentcdcacd75689d685f15f940b3ab8c8d860d8f0f57
[x86] Begin stubbing out the AVX support in the new vector shuffle
lowering scheme.

Currently, this just directly bails to the fallback path of splitting
the 256-bit vector into two 128-bit vectors, operating there, and then
joining the results back together. While the results are far from
perfect, they are *shockingly* good for what we're doing here. I'll be
layering the rest of the functionality on top of this piece by piece and
updating tests as I go.

Note that 256-bit vectors in this mode are still somewhat WIP. While
I think the code paths that I'm adding here are clean and good-to-go,
there are still a lot of 128-bit assumptions that I'll need to stomp out
as I march through the functional spread here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215637 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/vector-shuffle-256-v4.ll [new file with mode: 0644]