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[AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 register
authorOliver Stannard <oliver.stannard@arm.com>
Thu, 26 Nov 2015 15:26:10 +0000 (15:26 +0000)
committerOliver Stannard <oliver.stannard@arm.com>
Thu, 26 Nov 2015 15:26:10 +0000 (15:26 +0000)
commitc9ad9814771201829c448583322a479a64c20e85
tree1a290faf0c283d4ece282f7c32f3d40d68e81b37tree | snapshot
parente6988659c9c86288e886f85e2c82a9606223200ecommit | diff
[AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 register

ARMv8.2-A adds a new ID register, ID_A64MMFR2_EL1, which behaves in the
same way as ID_A64MMFR0_EL1 and ID_A64MMFR1_EL1. It is a required part
of ARMv8.2-A, so no additional subtarget features are required.

Differential Revision: http://reviews.llvm.org/D15017

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254155 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/Utils/AArch64BaseInfo.cpp diff | blob | history
lib/Target/AArch64/Utils/AArch64BaseInfo.h diff | blob | history
test/MC/AArch64/armv8.2a-mmfr2.s [new file with mode: 0644] blob
test/MC/Disassembler/AArch64/armv8.2a-mmfr2.txt [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors