Don't cache the instruction and register info from the TargetMachine, because
authorBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 20:35:25 +0000 (20:35 +0000)
committerBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 20:35:25 +0000 (20:35 +0000)
commitc1dcb8d654d4468d63224269ee3c92480bf2385b
tree8b0fb75e23335957db8d6889ee0be7a445f5d4f5
parent8b0f77bb96353bf43c3bb0ad6fba8911eacc9989
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183565 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Sparc/DelaySlotFiller.cpp
lib/Target/Sparc/SparcInstrInfo.cpp
lib/Target/Sparc/SparcRegisterInfo.cpp
lib/Target/Sparc/SparcRegisterInfo.h