Fix instruction scheduling live register tracking
authorPawel Bylica <chfast@gmail.com>
Wed, 24 Jun 2015 12:49:42 +0000 (12:49 +0000)
committerPawel Bylica <chfast@gmail.com>
Wed, 24 Jun 2015 12:49:42 +0000 (12:49 +0000)
commitbf984670602be7a5fddf3532b7ec6573c590a048
tree53553fa6874687f059ffd354d1787024ae387235
parent611e493ece3f55fbc9ed4eda5826b4a35ecc614a
Fix instruction scheduling live register tracking

Summary:
This patch fixes PR23405 (https://llvm.org/bugs/show_bug.cgi?id=23405).

During a node unscheduling an entry in LiveRegGens can be replaced with a new value. That corrupts the live reg tracking and LiveReg* structure is not cleared as should be during unscheduling. Problematic condition that enforces Gen replacement is `I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()`. This condition should be checked only if LiveRegGen was set in current node unscheduling.

Test Plan: Regression test included.

Reviewers: hfinkel, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9993

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240538 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
test/CodeGen/X86/rrlist-livereg-corrutpion.ll [new file with mode: 0644]